Chemical mechanical polishing [CMP]

Industry

CPC
H01L2224/27616

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Parent Industries

HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00

Current Industry

H01L2224/27616Chemical mechanical polishing [CMP]

Industries

Patents Grantslast 30 patents

Information Patent Grant
Integrated circuit packages
- Patent number 12,057,439
- Issue date Aug 6, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Ming-Fa Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chemical mechanical polishing for copper dishing control
- Patent number 12,033,964
- Issue date Jul 9, 2024
- Applied Materials, Inc.
- Tyler Sherwood
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chemical mechanical polishing for hybrid bonding
- Patent number 11,552,041
- Issue date Jan 10, 2023
- ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
- Gaius Gillman Fountain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package and method
- Patent number 11,502,062
- Issue date Nov 15, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd
- Ming-Fa Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Die stack structure with hybrid bonding structure and method of fab...
- Patent number 11,251,157
- Issue date Feb 15, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd
- Ching-Jung Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Curved pillar interconnects
- Patent number 11,239,400
- Issue date Feb 1, 2022
- Facebook Technologies, LLC
- Zheng Sung Chio
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package and method
- Patent number 11,024,605
- Issue date Jun 1, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd
- Ming-Fa Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device production method
- Patent number 10,998,283
- Issue date May 4, 2021
- TOSHIBA MEMORY CORPORATION
- Takahiko Kawasaki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Solid-state imaging device including a sensor substrate and a logic...
- Patent number 10,978,505
- Issue date Apr 13, 2021
- Renesas Electronics Corporation
- Hidenori Sato
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dam for three-dimensional integrated circuit
- Patent number 10,867,878
- Issue date Dec 15, 2020
- Taiwan Semiconductor Manufacturing Company
- Tsung-Ding Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chemical mechanical polishing for hybrid bonding
- Patent number 10,840,205
- Issue date Nov 17, 2020
- INVENSAS BONDING TECHNOLOGIES, INC.
- Gaius Gillman Fountain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device including built-in crack-arresting film structure
- Patent number 10,615,139
- Issue date Apr 7, 2020
- International Business Machines Corporation
- Wei Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System and process for in situ byproduct removal and platen cooling...
- Patent number 10,350,728
- Issue date Jul 16, 2019
- Applied Materials, Inc.
- Jie Diao
- B24 - GRINDING POLISHING
Information Patent Grant
Semiconductor device including built-in crack-arresting film structure
- Patent number 10,211,178
- Issue date Feb 19, 2019
- International Business Machines Corporation
- Wei Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dam for three-dimensional integrated circuit
- Patent number 10,020,236
- Issue date Jul 10, 2018
- Taiwan Semiconductar Manufacturing Campany
- Tsung-Ding Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for a wafer seal ring
- Patent number 9,673,169
- Issue date Jun 6, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yi-Chuan Teng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Trap rich layer for semiconductor devices
- Patent number 9,570,558
- Issue date Feb 14, 2017
- QUALCOMM Incorporated
- Christopher N. Brindle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bonded processed semiconductor structures and carriers
- Patent number 9,553,014
- Issue date Jan 24, 2017
- Soitec
- Mariam Sadaka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for the formation of a trap rich layer
- Patent number 9,153,434
- Issue date Oct 6, 2015
- Silanna Semiconductor U.S.A., Inc.
- Chris N. Brindle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3D integrated heterostructures having low-temperature bonded interf...
- Patent number 9,117,686
- Issue date Aug 25, 2015
- Soitec
- Gweltaz Gaudin
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Bonded processed semiconductor structures and carriers
- Patent number 9,041,214
- Issue date May 26, 2015
- Soitec
- Mariam Sadaka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for the formation of a trap rich layer
- Patent number 8,835,281
- Issue date Sep 16, 2014
- Silanna Semiconductor U.S.A., Inc.
- Chris Brindle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low-temperature bonding process
- Patent number 8,790,992
- Issue date Jul 29, 2014
- Soitec
- Gweltaz Gaudin
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Method of fabricating a TSV for 3D packaging of semiconductor device
- Patent number 8,513,061
- Issue date Aug 20, 2013
- Korea Institute of Machinery & Materials
- Jae-Hak Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Trap rich layer for semiconductor devices
- Patent number 8,466,036
- Issue date Jun 18, 2013
- IO Semiconductor, Inc.
- Chris Brindle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming bonded semiconductor structures using a temporar...
- Patent number 8,461,017
- Issue date Jun 11, 2013
- Soitec
- Mariam Sadaka
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME
- Publication number 20240395774
- Publication date Nov 28, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ching-Jung Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHEMICAL MECHANICAL POLISHING FOR HYBRID BONDING
- Publication number 20240379607
- Publication date Nov 14, 2024
- ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
- Gaius Gillman Fountain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGES
- Publication number 20240355782
- Publication date Oct 24, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Ming-Fa Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME
- Publication number 20240332261
- Publication date Oct 3, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ching-Jung Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WET ATOMIC LAYER ETCHING METHOD AND METHOD OF MANUFACTURING THE SAME
- Publication number 20240321805
- Publication date Sep 26, 2024
- Samsung Electronics Co., Ltd.
- Seungho Hahn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHEMICAL MECHANICAL POLISHING FOR HYBRID BONDING
- Publication number 20230268308
- Publication date Aug 24, 2023
- ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
- Gaius Gillman Fountain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHEMICAL MECHANICAL POLISHING FOR COPPER DISHING CONTROL
- Publication number 20230066610
- Publication date Mar 2, 2023
- Applied Materials, Inc.
- Tyler Sherwood
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHEMICAL MECHANICAL POLISHING FOR HYBRID BONDING
- Publication number 20210066233
- Publication date Mar 4, 2021
- INVENSAS BONDING TECHNOLOGIES, INC.
- Gaius Gillman FOUNTAIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE PRODUCTION METHOD
- Publication number 20200035636
- Publication date Jan 30, 2020
- Toshiba Memory Corporation
- Takahiro KAWASAKI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SOLID-STATE IMAGING DEVICE AND METHOD FOR MANUFACTURING THE SAME
- Publication number 20190273108
- Publication date Sep 5, 2019
- RENESAS ELECTRONICS CORPORATION
- Hidenori SATO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHEMICAL MECHANICAL POLISHING FOR HYBRID BONDING
- Publication number 20190096842
- Publication date Mar 28, 2019
- INVENSAS BONDING TECHNOLOGIES, INC.
- Gaius Gillman FOUNTAIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Dam for Three-Dimensional Integrated Circuit
- Publication number 20180323118
- Publication date Nov 8, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tsung-Ding Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING BUILT-IN CRACK-ARRESTING FILM STRUCTURE
- Publication number 20170221850
- Publication date Aug 3, 2017
- International Business Machines Corporation
- Wei Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods for the Formation of a Trap Rich Layer
- Publication number 20140377908
- Publication date Dec 25, 2014
- Chris N. Brindle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D INTEGRATED HETEROSTRUCTURES HAVING LOW-TEMPERATURE BONDED INTERF...
- Publication number 20140327113
- Publication date Nov 6, 2014
- Gweltaz Gaudin
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Method and Apparatus for a Wafer Seal Ring
- Publication number 20140220735
- Publication date Aug 7, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yi-Chuan Teng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods for the Formation of a Trap Rich Layer
- Publication number 20130280884
- Publication date Oct 24, 2013
- Chris Brindle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BONDED PROCESSED SEMICONDUCTOR STRUCTURES AND CARRIERS
- Publication number 20130256907
- Publication date Oct 3, 2013
- Mariam Sadaka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Trap Rich Layer for Semiconductor Devices
- Publication number 20120161310
- Publication date Jun 28, 2012
- IO SEMICONDUCTOR, INC.
- Chris Brindle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TSV FOR 3D PACKAGING OF SEMICONDUCTOR DEVICE AND FABRICATION METHOD...
- Publication number 20120153496
- Publication date Jun 21, 2012
- KOREA INSTITUTE OF MACHINERY & MATERIALS
- Jae-Hak Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW-TEMPERATURE BONDING PROCESS
- Publication number 20120043647
- Publication date Feb 23, 2012
- Gweltaz M. Gaudin
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
TEMPORARY SEMICONDUCTOR STRUCTURE BONDING METHODS AND RELATED BONDE...
- Publication number 20120013013
- Publication date Jan 19, 2012
- Mariam Sadaka
- H01 - BASIC ELECTRIC ELEMENTS

Chemical mechanical polishing [CMP]

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Integrated circuit packages

Chemical mechanical polishing for copper dishing control

Chemical mechanical polishing for hybrid bonding

Integrated circuit package and method

Die stack structure with hybrid bonding structure and method of fab...

Curved pillar interconnects

Integrated circuit package and method

Semiconductor device production method

Solid-state imaging device including a sensor substrate and a logic...

Dam for three-dimensional integrated circuit

Chemical mechanical polishing for hybrid bonding

Semiconductor device including built-in crack-arresting film structure

System and process for in situ byproduct removal and platen cooling...

Semiconductor device including built-in crack-arresting film structure

Dam for three-dimensional integrated circuit

Method and apparatus for a wafer seal ring

Trap rich layer for semiconductor devices

Bonded processed semiconductor structures and carriers

Methods for the formation of a trap rich layer

3D integrated heterostructures having low-temperature bonded interf...

Bonded processed semiconductor structures and carriers

Methods for the formation of a trap rich layer

Low-temperature bonding process

Method of fabricating a TSV for 3D packaging of semiconductor device

Trap rich layer for semiconductor devices

Methods of forming bonded semiconductor structures using a temporar...

Patents Applicationslast 30 patents

PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME

CHEMICAL MECHANICAL POLISHING FOR HYBRID BONDING

INTEGRATED CIRCUIT PACKAGES

PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME

WET ATOMIC LAYER ETCHING METHOD AND METHOD OF MANUFACTURING THE SAME

CHEMICAL MECHANICAL POLISHING FOR HYBRID BONDING

CHEMICAL MECHANICAL POLISHING FOR COPPER DISHING CONTROL

CHEMICAL MECHANICAL POLISHING FOR HYBRID BONDING

SEMICONDUCTOR DEVICE PRODUCTION METHOD

SOLID-STATE IMAGING DEVICE AND METHOD FOR MANUFACTURING THE SAME

CHEMICAL MECHANICAL POLISHING FOR HYBRID BONDING

Dam for Three-Dimensional Integrated Circuit

SEMICONDUCTOR DEVICE INCLUDING BUILT-IN CRACK-ARRESTING FILM STRUCTURE

Methods for the Formation of a Trap Rich Layer

3D INTEGRATED HETEROSTRUCTURES HAVING LOW-TEMPERATURE BONDED INTERF...

Method and Apparatus for a Wafer Seal Ring

Methods for the Formation of a Trap Rich Layer

BONDED PROCESSED SEMICONDUCTOR STRUCTURES AND CARRIERS

Trap Rich Layer for Semiconductor Devices

TSV FOR 3D PACKAGING OF SEMICONDUCTOR DEVICE AND FABRICATION METHOD...

LOW-TEMPERATURE BONDING PROCESS

TEMPORARY SEMICONDUCTOR STRUCTURE BONDING METHODS AND RELATED BONDE...