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HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00

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Patents Grantslast 30 patents

Information Patent Grant
Bonding structures of integrated circuit devices and method forming...
- Patent number 12,132,016
- Issue date Oct 29, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chen-Yu Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bonding structures of integrated circuit devices and method forming...
- Patent number 11,990,430
- Issue date May 21, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chen-Yu Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Die encapsulation in oxide bonded wafer stack
- Patent number 10,784,234
- Issue date Sep 22, 2020
- Raytheon Company
- John J. Drab
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Die encapsulation in oxide bonded wafer stack
- Patent number 10,242,967
- Issue date Mar 26, 2019
- Raytheon Company
- John J. Drab
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical nanoribbon array (VERNA) thermal interface materials with...
- Patent number 10,170,338
- Issue date Jan 1, 2019
- Northrop Grumman Systems Corporation
- John A. Starkovich
- C25 - ELECTROLYTIC OR ELECTROPHORETIC PROCESSES APPARATUS THEREFOR
Information Patent Grant
Method for performing direct bonding between two structures
- Patent number 9,922,954
- Issue date Mar 20, 2018
- Commisariat A l'Energie Atomique et Aux Energies Alternatives
- Hubert Moriceau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor manufacturing method and associated semiconductor man...
- Patent number 9,704,820
- Issue date Jul 11, 2017
- Taiwan Semiconductor Manufacturing Company Ltd.
- Xin-Hua Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for bonding metallic contact areas with solution of a sacrif...
- Patent number 9,640,510
- Issue date May 2, 2017
- EV Group E. Thallner GmbH
- Bernhard Rebhan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package and method of making same
- Patent number 9,613,932
- Issue date Apr 4, 2017
- General Electric Company
- Paul Alan McConnelee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bonding pad for thermocompression bonding, process for producing a...
- Patent number 9,281,280
- Issue date Mar 8, 2016
- Robert Bosch GmbH
- Christoph Schelling
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Reducing formation of oxide on solder
- Patent number 9,132,496
- Issue date Sep 15, 2015
- Raytheon Company
- Buu Q. Diep
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
3D integrated heterostructures having low-temperature bonded interf...
- Patent number 9,117,686
- Issue date Aug 25, 2015
- Soitec
- Gweltaz Gaudin
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Reducing formation of oxide on solder
- Patent number 8,844,793
- Issue date Sep 30, 2014
- Raytheon Company
- Buu Diep
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Low-temperature bonding process
- Patent number 8,790,992
- Issue date Jul 29, 2014
- Soitec
- Gweltaz Gaudin
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Patternable adhesive composition, semiconductor package using the s...
- Patent number 8,558,388
- Issue date Oct 15, 2013
- Samsung Electronics Co., Ltd.
- Joon-Yong Park
- C09 - DYES PAINTS POLISHES NATURAL RESINS ADHESIVES MISCELLANEOUS COMPOSITION...

Patents Applicationslast 30 patents

Information Patent Application
BONDING STRUCTURES OF INTEGRATED CIRCUIT DEVICES AND METHOD FORMING...
- Publication number 20240371804
- Publication date Nov 7, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chen-Yu Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BONDING STRUCTURES OF INTEGRATED CIRCUIT DEVICES AND METHOD FORMING...
- Publication number 20230387051
- Publication date Nov 30, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chen-Yu Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE WITH METAL SILICIDE LAYER
- Publication number 20230317667
- Publication date Oct 5, 2023
- INFINEON TECHNOLOGIES AG
- Mark HARRISON
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Bonding Structures of Integrated Circuit Devices and Method Forming...
- Publication number 20220238466
- Publication date Jul 28, 2022
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chen-Yu Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIE ENCAPSULATION IN OXIDE BONDED WAFER STACK
- Publication number 20190221547
- Publication date Jul 18, 2019
- Raytheon Company
- John J. Drab
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICAL NANORIBBON ARRAY (VERNA) THERMAL INTERFACE MATERIALS WITH...
- Publication number 20180342405
- Publication date Nov 29, 2018
- Northrop Grumman Systems Corporation
- John A. Starkovich
- C25 - ELECTROLYTIC OR ELECTROPHORETIC PROCESSES APPARATUS THEREFOR
Information Patent Application
METHOD FOR PERFORMING DIRECT BONDING BETWEEN TWO STRUCTURES
- Publication number 20170179073
- Publication date Jun 22, 2017
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Hubert MORICEAU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR BONDING METALLIC CONTACT AREAS WITH DISSOLUTION OF A SAC...
- Publication number 20160071817
- Publication date Mar 10, 2016
- EV GROUP E. THALLNER GMBH
- Bernhard Rebhan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE AND METHOD OF MAKING SAME
- Publication number 20150287699
- Publication date Oct 8, 2015
- GENERAL ELECTRIC COMPANY
- Paul Alan McConnelee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D INTEGRATED HETEROSTRUCTURES HAVING LOW-TEMPERATURE BONDED INTERF...
- Publication number 20140327113
- Publication date Nov 6, 2014
- Gweltaz Gaudin
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
BONDING PAD FOR THERMOCOMPRESSION BONDING, PROCESS FOR PRODUCING A...
- Publication number 20140035168
- Publication date Feb 6, 2014
- ROBERT BOSCH GmbH
- Christoph Schelling
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
INTEGRATED CIRCUIT PACKAGE AND METHOD OF MAKING SAME
- Publication number 20130334706
- Publication date Dec 19, 2013
- Paul Alan McConnelee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PATTERNABLE ADHESIVE COMPOSITION, SEMICONDUCTOR PACKAGE USING THE S...
- Publication number 20120181703
- Publication date Jul 19, 2012
- Samsung Electronics Co., Ltd.
- Joon-Yong PARK
- C09 - DYES PAINTS POLISHES NATURAL RESINS ADHESIVES MISCELLANEOUS COMPOSITION...
Information Patent Application
METHOD OF PREPARING SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR DIE FOR...
- Publication number 20120181686
- Publication date Jul 19, 2012
- Samsung Electronics Co., Ltd.
- Joon Yong PARK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Reducing Formation Of Oxide On Solder
- Publication number 20120111925
- Publication date May 10, 2012
- Raytheon Company
- Buu Diep
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Application
LOW-TEMPERATURE BONDING PROCESS
- Publication number 20120043647
- Publication date Feb 23, 2012
- Gweltaz M. Gaudin
- B81 - MICRO-STRUCTURAL TECHNOLOGY

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Bonding structures of integrated circuit devices and method forming...

Bonding structures of integrated circuit devices and method forming...

Die encapsulation in oxide bonded wafer stack

Die encapsulation in oxide bonded wafer stack

Vertical nanoribbon array (VERNA) thermal interface materials with...

Method for performing direct bonding between two structures

Semiconductor manufacturing method and associated semiconductor man...

Method for bonding metallic contact areas with solution of a sacrif...

Integrated circuit package and method of making same

Bonding pad for thermocompression bonding, process for producing a...

Reducing formation of oxide on solder

3D integrated heterostructures having low-temperature bonded interf...

Reducing formation of oxide on solder

Low-temperature bonding process

Patternable adhesive composition, semiconductor package using the s...

Patents Applicationslast 30 patents

BONDING STRUCTURES OF INTEGRATED CIRCUIT DEVICES AND METHOD FORMING...

BONDING STRUCTURES OF INTEGRATED CIRCUIT DEVICES AND METHOD FORMING...

SEMICONDUCTOR DEVICE WITH METAL SILICIDE LAYER

Bonding Structures of Integrated Circuit Devices and Method Forming...

DIE ENCAPSULATION IN OXIDE BONDED WAFER STACK

VERTICAL NANORIBBON ARRAY (VERNA) THERMAL INTERFACE MATERIALS WITH...

METHOD FOR PERFORMING DIRECT BONDING BETWEEN TWO STRUCTURES

METHOD FOR BONDING METALLIC CONTACT AREAS WITH DISSOLUTION OF A SAC...

INTEGRATED CIRCUIT PACKAGE AND METHOD OF MAKING SAME

3D INTEGRATED HETEROSTRUCTURES HAVING LOW-TEMPERATURE BONDED INTERF...

BONDING PAD FOR THERMOCOMPRESSION BONDING, PROCESS FOR PRODUCING A...

INTEGRATED CIRCUIT PACKAGE AND METHOD OF MAKING SAME

PATTERNABLE ADHESIVE COMPOSITION, SEMICONDUCTOR PACKAGE USING THE S...

METHOD OF PREPARING SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR DIE FOR...

Reducing Formation Of Oxide On Solder

LOW-TEMPERATURE BONDING PROCESS