Clock circuits aspects

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CPC
G01R31/31727

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GPHYSICS G01Measuring instruments G01RMEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES G01R31/00Arrangements for testing electric properties Arrangements for locating electric faults Arrangements for electrical testing characterised by what is being tested not provided for elsewhere

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G01R31/31727Clock circuits aspects

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Patents Grantslast 30 patents

Information Patent Grant
Scan circuit and method
- Patent number 12,360,161
- Issue date Jul 15, 2025
- STMICROELECTRONICS INTERNATIONAL N.V.
- Venkata Narayanan Srinivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Determination device, test system, and generation device
- Patent number 12,345,765
- Issue date Jul 1, 2025
- Kioxia Corporation
- Mikio Shiraishi
- G01 - MEASURING TESTING
Information Patent Grant
Transmitter for ultra-high speed and storage device including the same
- Patent number 12,332,307
- Issue date Jun 17, 2025
- Samsung Electronics Co., Ltd.
- Ikjin Jo
- G01 - MEASURING TESTING
Information Patent Grant
Test device for testing on-chip clock controller having debug function
- Patent number 12,320,847
- Issue date Jun 3, 2025
- Realtek Semiconductor Corporation
- Sheng-Ping Yung
- G01 - MEASURING TESTING
Information Patent Grant
Electronic device and method for performing clock gating in electro...
- Patent number 12,320,846
- Issue date Jun 3, 2025
- Realtek Semiconductor Corp.
- Ching-Feng Huang
- G01 - MEASURING TESTING
Information Patent Grant
Adaptive voltage scaling using temperature and performance sensors
- Patent number 12,301,229
- Issue date May 13, 2025
- Texas Instruments Incorporated
- Jose Luis Flores
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low-frequency oscillator monitoring circuit
- Patent number 12,298,345
- Issue date May 13, 2025
- Texas Instruments Incorporated
- Brett Forejt
- G01 - MEASURING TESTING
Information Patent Grant
Detection circuit and detection method
- Patent number 12,270,856
- Issue date Apr 8, 2025
- Realtek Semiconductor Corporation
- Chun-Yi Kuo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock recovery unit adjustment
- Patent number 12,255,979
- Issue date Mar 18, 2025
- Keysight Technologies, Inc.
- Marlin E. Viss
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Device and method for measuring a duty cycle of a clock signal
- Patent number 12,253,563
- Issue date Mar 18, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Eric Soenen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor device, debug system, and debug method
- Patent number 12,253,561
- Issue date Mar 18, 2025
- Renesas Electronics Corporation
- Masahide Matsumoto
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for capture clock control to minimize toggling...
- Patent number 12,241,931
- Issue date Mar 4, 2025
- MARVELL ASIA PTE. LTD.
- Balaji Upputuri
- G01 - MEASURING TESTING
Information Patent Grant
Methods for determining and calibrating non-linearity in a Phase In...
- Patent number 12,235,318
- Issue date Feb 25, 2025
- Samsung Electronics Co., Ltd.
- Gunjan Mandal
- G01 - MEASURING TESTING
Information Patent Grant
Method and circuit for performing error detection on a clock gated...
- Patent number 12,229,002
- Issue date Feb 18, 2025
- Imagination Technologies Limited
- Faizan Nazar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock shaper circuit for transition fault testing
- Patent number 12,216,160
- Issue date Feb 4, 2025
- Texas Instruments Incorporated
- Wilson Pradeep
- G11 - INFORMATION STORAGE
Information Patent Grant
Clock gating for power reduction during testing
- Patent number 12,210,058
- Issue date Jan 28, 2025
- MARVELL ASIA PTE. LTD.
- Sreekanth G. Pai
- G01 - MEASURING TESTING
Information Patent Grant
Device access port selection
- Patent number 12,210,060
- Issue date Jan 28, 2025
- Texas Instruments Incorporated
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Grant
Test element group and test method
- Patent number 12,210,059
- Issue date Jan 28, 2025
- Samsung Electronics Co., Ltd.
- Jeongha Kim
- G01 - MEASURING TESTING
Information Patent Grant
Test-time optimization with few slow scan pads
- Patent number 12,203,985
- Issue date Jan 21, 2025
- STMICROELECTRONICS INTERNATIONAL N.V.
- Sandeep Jain
- G01 - MEASURING TESTING
Information Patent Grant
Oscillation period detection circuit and method, and semiconductor...
- Patent number 12,188,981
- Issue date Jan 7, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Zhiqiang Zhang
- G01 - MEASURING TESTING
Information Patent Grant
Test method for delay circuit and test circuitry
- Patent number 12,188,982
- Issue date Jan 7, 2025
- Realtek Semiconductor Corp.
- Kuo-Wei Chi
- G01 - MEASURING TESTING
Information Patent Grant
Test access port with address and command capability
- Patent number 12,188,980
- Issue date Jan 7, 2025
- Texas Instruments Incorporated
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Grant
Frequency-detecting circuit, duty-cycle corrector, and electronic d...
- Patent number 12,184,287
- Issue date Dec 31, 2024
- GigaDevice Semiconductor Inc.
- Menghai Wang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
At-speed test access port operations
- Patent number 12,181,521
- Issue date Dec 31, 2024
- Texas Instruments Incorporated
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data correction and phase optimization in high-speed receivers
- Patent number 12,181,523
- Issue date Dec 31, 2024
- Diodes Incorporated
- Yu-Wei Lin
- G01 - MEASURING TESTING
Information Patent Grant
Systems and methods for fault detection and reporting through seria...
- Patent number 12,169,218
- Issue date Dec 17, 2024
- Maxim Integrated Products, Inc.
- Ling Liu
- G01 - MEASURING TESTING
Information Patent Grant
3D tap and scan port architectures
- Patent number 12,164,001
- Issue date Dec 10, 2024
- Texas Instruments Incorporated
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Grant
Time-to-digital converter circuit with self-testing function
- Patent number 12,164,002
- Issue date Dec 10, 2024
- STMICROELECTRONICS INTERNATIONAL N.V.
- John Kevin Moore
- G04 - HOROLOGY
Information Patent Grant
Electronic device for self-testing period of clock signal and monit...
- Patent number 12,153,089
- Issue date Nov 26, 2024
- Richtek Technology Corporation
- Fu-Shiang Lai
- G01 - MEASURING TESTING
Information Patent Grant
Electronic circuit and method of error correction
- Patent number 12,153,088
- Issue date Nov 26, 2024
- Taiwan Semiconductor Manufacturing Company Ltd.
- Chia-Chun Liao
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
TIME-ALIGNED RF ANALYSIS FROM GEOGRAPHICALLY DISTRIBUTED RECEIVERS
- Publication number 20250237699
- Publication date Jul 24, 2025
- Tektronix, Inc.
- Alejandro C. Buritica
- G01 - MEASURING TESTING
Information Patent Application
Latchup Detector and Clock Loss Detector
- Publication number 20250231234
- Publication date Jul 17, 2025
- Omni Design Technologies, Inc.
- Manar Ibrahim El-Chammas
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD FOR CHECKING AT LEAST ONE FIRST CLOCK GENERATOR OF A FIRST F...
- Publication number 20250224448
- Publication date Jul 10, 2025
- Endress+Hauser SE+Co. KG
- Alexander Vogel
- G01 - MEASURING TESTING
Information Patent Application
DEVICES AND METHODS FOR TESTING DIES WITH OFF-DIE CLOCKS
- Publication number 20250201637
- Publication date Jun 19, 2025
- ADVANCED MICRO DEVICES, INC.
- Russell Schreiber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Apparatus and Method for Clock Frequency Estimation With Subsets of...
- Publication number 20250180643
- Publication date Jun 5, 2025
- MICROCHIP TECHNOLOGY INCORPORATED
- Gary Qu Jin
- G01 - MEASURING TESTING
Information Patent Application
Device and Method for Measuring a Duty Cycle of a Clock Signal
- Publication number 20250180644
- Publication date Jun 5, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Eric SOENEN
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
CLOCK CONVERSION DEVICE, TEST SYSTEM INCLUDING THEREOF AND METHOD O...
- Publication number 20250174293
- Publication date May 29, 2025
- Samsung Electronics Co., Ltd.
- Jinuk Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CHIP AND CHIP TESTING METHOD
- Publication number 20250155501
- Publication date May 15, 2025
- REALTEK SEMICONDUCTOR CORPORATION
- Chang-Hsien Tai
- G01 - MEASURING TESTING
Information Patent Application
DEVICE ACCESS PORT SELECTION
- Publication number 20250155502
- Publication date May 15, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
TESTING CIRCUIT
- Publication number 20250155503
- Publication date May 15, 2025
- GLOBAL UNICHIP CORPORATION
- Yu-Lun Wan
- G01 - MEASURING TESTING
Information Patent Application
APPARATUSES AND METHODS FOR JITTER MEASUREMENT
- Publication number 20250155499
- Publication date May 15, 2025
- Analog Devices International Unlimited Company
- Seamus Anthony RYAN
- G01 - MEASURING TESTING
Information Patent Application
Supply Chain Security for Chiplets
- Publication number 20250155500
- Publication date May 15, 2025
- ADVANCED MICRO DEVICES, INC.
- Robert Landon Pelt
- G01 - MEASURING TESTING
Information Patent Application
METHOD OF MONITORING A CLOCK SIGNAL
- Publication number 20250138577
- Publication date May 1, 2025
- ARM Limited
- Amit Chhabra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AT-SPEED TEST ACCESS PORT OPERATIONS
- Publication number 20250130278
- Publication date Apr 24, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM FOR AUTOMATED DATA RETRIEVAL FROM AN INTEGRATED CIRCUIT FOR...
- Publication number 20250123329
- Publication date Apr 17, 2025
- NVIDIA Corporation
- Padmanabham Patki
- G01 - MEASURING TESTING
Information Patent Application
SYSTEM AND METHOD FOR GENERATING CLOCK PULSES FOR AT-SPEED TESTING...
- Publication number 20250116703
- Publication date Apr 10, 2025
- NXP B.V.
- Chandan Gupta
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CLOCK SYNCHRONIZATION CIRCUIT
- Publication number 20250116702
- Publication date Apr 10, 2025
- TEXAS INSTRUMENTS INCORPORATED
- David P MAGEE
- G01 - MEASURING TESTING
Information Patent Application
TESTING MULTI-CYCLE PATHS BASED ON CLOCK PATTERN
- Publication number 20250102570
- Publication date Mar 27, 2025
- ADVANCED MICRO DEVICES, INC.
- Nehal Patel
- G01 - MEASURING TESTING
Information Patent Application
FAILURE DETECTION CIRCUIT, SEMICONDUCTOR DEVICE AND FAILURE DETECTI...
- Publication number 20250102571
- Publication date Mar 27, 2025
- RENESAS ELECTRONICS CORPORATION
- Akira MIYAGUCHI
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
3D TAP & SCAN PORT ARCHITECTURES
- Publication number 20250102569
- Publication date Mar 27, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
APPARATUSES AND METHODS FOR FACILIATATING A DYNAMIC CLOCK FREQUENCY...
- Publication number 20250085344
- Publication date Mar 13, 2025
- NXP B.V.
- CHANDAN GUPTA
- G01 - MEASURING TESTING
Information Patent Application
DATA CORRECTION AND PHASE OPTIMIZATION IN HIGH-SPEED RECEIVERS
- Publication number 20250085345
- Publication date Mar 13, 2025
- DIODES INCORPORATED
- Yu-Wei Lin
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Diagnosing Identical Circuit Blocks in Data Streaming Environment
- Publication number 20250076376
- Publication date Mar 6, 2025
- Siemens Industry Software Inc.
- Wu-Tung Cheng
- G01 - MEASURING TESTING
Information Patent Application
INTERFACE TO FULL AND REDUCED PIN JTAG DEVICES
- Publication number 20250052811
- Publication date Feb 13, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
DEVICE, METHOD AND SYSTEM FOR IN-FIELD LANE TESTING AND REPAIR WITH...
- Publication number 20250052809
- Publication date Feb 13, 2025
- Intel Corporation
- Fei Su
- G01 - MEASURING TESTING
Information Patent Application
TEST-TIME OPTIMIZATION WITH FEW SLOW SCAN PADS
- Publication number 20250027994
- Publication date Jan 23, 2025
- STMicroelectronics International N.V.
- Sandeep JAIN
- G01 - MEASURING TESTING
Information Patent Application
CLOCK GATING CIRCUITS AND METHODS FOR DUAL-EDGE-TRIGGERED APPLICATIONS
- Publication number 20250027995
- Publication date Jan 23, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Arnab Khawas
- G01 - MEASURING TESTING
Information Patent Application
FULLY DIGITAL DOMAIN INTEGRATED FREQUENCY MONITOR
- Publication number 20250012857
- Publication date Jan 9, 2025
- NVIDIA Corporation
- Ofek Abadi
- G01 - MEASURING TESTING
Information Patent Application
SELECTABLE JTAG OR TRACE ACCESS WITH DATA STORE AND OUTPUT
- Publication number 20240402247
- Publication date Dec 5, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR DETECTING FAULTS IN INTEGRATED CIRCUITS
- Publication number 20240393391
- Publication date Nov 28, 2024
- NXP B.V.
- Jorge Ernesto Perez Chamorro
- G01 - MEASURING TESTING

Clock circuits aspects

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Scan circuit and method

Determination device, test system, and generation device

Transmitter for ultra-high speed and storage device including the same

Test device for testing on-chip clock controller having debug function

Electronic device and method for performing clock gating in electro...

Adaptive voltage scaling using temperature and performance sensors

Low-frequency oscillator monitoring circuit

Detection circuit and detection method

Clock recovery unit adjustment

Device and method for measuring a duty cycle of a clock signal

Semiconductor device, debug system, and debug method

Method and apparatus for capture clock control to minimize toggling...

Methods for determining and calibrating non-linearity in a Phase In...

Method and circuit for performing error detection on a clock gated...

Clock shaper circuit for transition fault testing

Clock gating for power reduction during testing

Device access port selection

Test element group and test method

Test-time optimization with few slow scan pads

Oscillation period detection circuit and method, and semiconductor...

Test method for delay circuit and test circuitry

Test access port with address and command capability

Frequency-detecting circuit, duty-cycle corrector, and electronic d...

At-speed test access port operations

Data correction and phase optimization in high-speed receivers

Systems and methods for fault detection and reporting through seria...

3D tap and scan port architectures

Time-to-digital converter circuit with self-testing function

Electronic device for self-testing period of clock signal and monit...

Electronic circuit and method of error correction

Patents Applicationslast 30 patents

TIME-ALIGNED RF ANALYSIS FROM GEOGRAPHICALLY DISTRIBUTED RECEIVERS

Latchup Detector and Clock Loss Detector

METHOD FOR CHECKING AT LEAST ONE FIRST CLOCK GENERATOR OF A FIRST F...

DEVICES AND METHODS FOR TESTING DIES WITH OFF-DIE CLOCKS

Apparatus and Method for Clock Frequency Estimation With Subsets of...

Device and Method for Measuring a Duty Cycle of a Clock Signal

CLOCK CONVERSION DEVICE, TEST SYSTEM INCLUDING THEREOF AND METHOD O...

CHIP AND CHIP TESTING METHOD

DEVICE ACCESS PORT SELECTION

TESTING CIRCUIT

APPARATUSES AND METHODS FOR JITTER MEASUREMENT

Supply Chain Security for Chiplets

METHOD OF MONITORING A CLOCK SIGNAL

AT-SPEED TEST ACCESS PORT OPERATIONS

SYSTEM FOR AUTOMATED DATA RETRIEVAL FROM AN INTEGRATED CIRCUIT FOR...

SYSTEM AND METHOD FOR GENERATING CLOCK PULSES FOR AT-SPEED TESTING...

CLOCK SYNCHRONIZATION CIRCUIT

TESTING MULTI-CYCLE PATHS BASED ON CLOCK PATTERN

FAILURE DETECTION CIRCUIT, SEMICONDUCTOR DEVICE AND FAILURE DETECTI...

3D TAP & SCAN PORT ARCHITECTURES

APPARATUSES AND METHODS FOR FACILIATATING A DYNAMIC CLOCK FREQUENCY...

DATA CORRECTION AND PHASE OPTIMIZATION IN HIGH-SPEED RECEIVERS

Diagnosing Identical Circuit Blocks in Data Streaming Environment

INTERFACE TO FULL AND REDUCED PIN JTAG DEVICES

DEVICE, METHOD AND SYSTEM FOR IN-FIELD LANE TESTING AND REPAIR WITH...

TEST-TIME OPTIMIZATION WITH FEW SLOW SCAN PADS

CLOCK GATING CIRCUITS AND METHODS FOR DUAL-EDGE-TRIGGERED APPLICATIONS

FULLY DIGITAL DOMAIN INTEGRATED FREQUENCY MONITOR

SELECTABLE JTAG OR TRACE ACCESS WITH DATA STORE AND OUTPUT

SYSTEM AND METHOD FOR DETECTING FAULTS IN INTEGRATED CIRCUITS