Connecting at different heights

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CPC
H01L2224/25105

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HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00

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H01L2224/25105Connecting at different heights

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Patents Grantslast 30 patents

Information Patent Grant
Semiconductor package and manufacturing method thereof
- Patent number 11,456,268
- Issue date Sep 27, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd
- Jung-Hua Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming complex electronic circuits by interconnecting g...
- Patent number 10,964,665
- Issue date Mar 30, 2021
- Nthdegree Technologies Worldwide, Inc.
- William Johnstone Ray
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Printing complex electronic circuits using a printable solution def...
- Patent number 10,499,499
- Issue date Dec 3, 2019
- NthDegree Technologies Worldwide Inc.
- William Johnstone Ray
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Lateral vias for connections to buried microconductors and methods...
- Patent number 10,262,931
- Issue date Apr 16, 2019
- National Technology & Engineering Solutions of Sandia, LLC
- David P. Adams
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fan-out semiconductor package
- Patent number 10,177,103
- Issue date Jan 8, 2019
- Samsung Electro-Mechanics Co., Ltd.
- Moon Hee Yi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Lateral vias for connections to buried microconductors
- Patent number 9,972,565
- Issue date May 15, 2018
- National Technology & Engineering Solutions of Sandia, LLC
- David P. Adams
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Printing complex electronic circuits using a patterned hydrophobic...
- Patent number 9,913,371
- Issue date Mar 6, 2018
- NthDegree Technologies Worldwide Inc.
- William Johnstone Ray
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Printing complex electronic circuits
- Patent number 9,572,249
- Issue date Feb 14, 2017
- Nthdegree Technologies Worldwide Inc.
- William Johnstone Ray
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-terminal printed devices interconnected as circuits
- Patent number 9,275,978
- Issue date Mar 1, 2016
- NthDegree Technologies Worldwide Inc.
- Richard Austin Blanchard
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-terminal printed devices interconnected as circuits
- Patent number 9,099,568
- Issue date Aug 4, 2015
- NthDegree Technologies Worldwide Inc.
- Richard Austin Blanchard
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked semiconductor package
- Patent number 8,803,325
- Issue date Aug 12, 2014
- SK Hynix Inc.
- Seong Cheol Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming fully embedded bumpless build-up layer packages...
- Patent number 8,580,616
- Issue date Nov 12, 2013
- Intel Corporation
- Ravi K. Nalla
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming fully embedded bumpless build-up layer packages...
- Patent number 8,304,913
- Issue date Nov 6, 2012
- Intel Corporation
- Ravi K Nalla
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
INTEGRATED CIRCUIT CHIP HAVING BS-PDN STRUCTURE
- Publication number 20220139863
- Publication date May 5, 2022
- Samsung Electronics Co., Ltd.
- Eunseok Song
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
- Publication number 20200235065
- Publication date Jul 23, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Jung-Hua Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FAN-OUT SEMICONDUCTOR PACKAGE
- Publication number 20190013282
- Publication date Jan 10, 2019
- Samsung Electro-Mechanics Co., Ltd.
- Moon Hee YI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LATERAL VIAS FOR CONNECTIONS TO BURIED MICROCONDUCTORS AND METHODS...
- Publication number 20180269143
- Publication date Sep 20, 2018
- National Technology & Engineering Solutions of Sandia, LLC
- David P. Adams
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PRINTING COMPLEX ELECTRONIC CIRCUITS
- Publication number 20140268591
- Publication date Sep 18, 2014
- NTHDEGREE TECHNOLOGIES WORLDWIDE INC.
- William Johnstone Ray
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-TERMINAL PRINTED DEVICES INTERCONNECTED AS CIRCUITS
- Publication number 20140264460
- Publication date Sep 18, 2014
- NTHDEGREE TECHNOLOGIES WORLDWIDE INC.
- Richard Austin Blanchard
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POWER SEMICONDUCTOR MODULE AND MANUFACTURING METHOD THEREOF
- Publication number 20140117524
- Publication date May 1, 2014
- Samsung Electro-Mechanics Co., Ltd.
- Kwang Soo KIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED SEMICONDUCTOR PACKAGE
- Publication number 20130292842
- Publication date Nov 7, 2013
- SK HYNIX INC.
- Seong Cheol KIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING FULLY EMBEDDED BUMPLESS BUILD-UP LAYER PACKAGES...
- Publication number 20130023088
- Publication date Jan 24, 2013
- Ravi K. Nalla
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING FULLY EMBEDDED BUMPLESS BUILD-UP LAYER PACKAGES...
- Publication number 20120074580
- Publication date Mar 29, 2012
- Ravi K. Nalla
- H01 - BASIC ELECTRIC ELEMENTS

Connecting at different heights

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Semiconductor package and manufacturing method thereof

Method for forming complex electronic circuits by interconnecting g...

Printing complex electronic circuits using a printable solution def...

Lateral vias for connections to buried microconductors and methods...

Fan-out semiconductor package

Lateral vias for connections to buried microconductors

Printing complex electronic circuits using a patterned hydrophobic...

Printing complex electronic circuits

Three-terminal printed devices interconnected as circuits

Three-terminal printed devices interconnected as circuits

Stacked semiconductor package

Methods of forming fully embedded bumpless build-up layer packages...

Methods of forming fully embedded bumpless build-up layer packages...

Patents Applicationslast 30 patents

INTEGRATED CIRCUIT CHIP HAVING BS-PDN STRUCTURE

SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF

FAN-OUT SEMICONDUCTOR PACKAGE

LATERAL VIAS FOR CONNECTIONS TO BURIED MICROCONDUCTORS AND METHODS...

PRINTING COMPLEX ELECTRONIC CIRCUITS

THREE-TERMINAL PRINTED DEVICES INTERCONNECTED AS CIRCUITS

POWER SEMICONDUCTOR MODULE AND MANUFACTURING METHOD THEREOF

STACKED SEMICONDUCTOR PACKAGE

METHODS OF FORMING FULLY EMBEDDED BUMPLESS BUILD-UP LAYER PACKAGES...

METHODS OF FORMING FULLY EMBEDDED BUMPLESS BUILD-UP LAYER PACKAGES...