Data output latches

Industry

CPC
G11C7/106

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C7/00Arrangements for writing information into, or reading information out from, a digital store

Current Industry

G11C7/106Data output latches

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Test circuit and receiving circuit having test function
- Patent number 12,288,589
- Issue date Apr 29, 2025
- SK hynix Inc.
- Gi Moon Hong
- G11 - INFORMATION STORAGE
Information Patent Grant
Storage devices and methods of operating storage devices
- Patent number 12,288,590
- Issue date Apr 29, 2025
- Samsung Electronics Co., Ltd.
- Eun Chu Oh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data storage device and non-volatile memory control method
- Patent number 12,287,988
- Issue date Apr 29, 2025
- Silicon Motion, Inc.
- Hsu-Ping Ou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor system
- Patent number 12,287,743
- Issue date Apr 29, 2025
- Samsung Electronics Co., Ltd.
- Hyun Jun Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
IMS memory cell, IMS method and IMS memory device
- Patent number 12,283,343
- Issue date Apr 22, 2025
- Macronix International Co., Ltd.
- Yun-Yuan Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for controlling sense amplifier and control device using the...
- Patent number 12,283,340
- Issue date Apr 22, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Jui-Jen Wu
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for input buffer data feedback equalization...
- Patent number 12,283,342
- Issue date Apr 22, 2025
- Micron Technology, Inc.
- Kohei Nakamura
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory circuit, signal transmission system and signal transmission...
- Patent number 12,283,302
- Issue date Apr 22, 2025
- NANYA TECHNOLOGY CORPORATION
- Shun-Ke Wu
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic clock mask based on read data for power saving
- Patent number 12,283,341
- Issue date Apr 22, 2025
- SanDisk Technologies LLC
- Tianyu Tang
- G11 - INFORMATION STORAGE
Information Patent Grant
Page buffer circuit and memory device including the same
- Patent number 12,277,995
- Issue date Apr 15, 2025
- Samsung Electronics Co., Ltd.
- Jin-Young Chun
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with reset voltage control
- Patent number 12,277,991
- Issue date Apr 15, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Ali Taghvaei
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory
- Patent number 12,277,994
- Issue date Apr 15, 2025
- Rohm Co., Ltd.
- Seiji Takenaka
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and method of operating the same
- Patent number 12,277,990
- Issue date Apr 15, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Meng-Sheng Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Compensation for conductance drift in analog memory in crossbar array
- Patent number 12,272,422
- Issue date Apr 8, 2025
- International Business Machines Corporation
- Charles Mackin
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods of operating a near memory processing-dual in-line memory m...
- Patent number 12,272,423
- Issue date Apr 8, 2025
- Samsung Electronics Co., Ltd.
- Sachin Suresh Upadhya
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory controller performing training to improve communication and...
- Patent number 12,272,425
- Issue date Apr 8, 2025
- SK Hynix Inc.
- Nam Hyeok Jeong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Duty cycle adjuster optimization training algorithm to minimize the...
- Patent number 12,272,426
- Issue date Apr 8, 2025
- Intel Corporation
- Arvind Kumar
- G11 - INFORMATION STORAGE
Information Patent Grant
Hybrid victim cache and write miss buffer with fence operation
- Patent number 12,265,477
- Issue date Apr 1, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flash memory controller, SD card device, method used in flash memor...
- Patent number 12,265,469
- Issue date Apr 1, 2025
- Silicon Motion Inc.
- Chao-Kuei Hsieh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory device and memory system
- Patent number 12,266,423
- Issue date Apr 1, 2025
- Kioxia Corporation
- Akio Sugahara
- G11 - INFORMATION STORAGE
Information Patent Grant
Communicating data with stacked memory dies
- Patent number 12,265,489
- Issue date Apr 1, 2025
- Robert Nasry Hasbun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Communication system with mixed threshold voltage transistors
- Patent number 12,266,422
- Issue date Apr 1, 2025
- Texas Instruments Incorporated
- Veeramanikandan Raju
- G11 - INFORMATION STORAGE
Information Patent Grant
Storage device and operating method thereof
- Patent number 12,260,932
- Issue date Mar 25, 2025
- SK hynix Inc.
- Seok Min Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and apparatus for multi-banked victim cache with dual datapath
- Patent number 12,259,826
- Issue date Mar 25, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data receiving circuit, data receiving system, and memory device
- Patent number 12,260,933
- Issue date Mar 25, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Feng Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device including internal transmission path and stack...
- Patent number 12,260,929
- Issue date Mar 25, 2025
- SK Hynix Inc.
- Jinhyung Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
High-speed multiplexer for reducing glitch power
- Patent number 12,254,955
- Issue date Mar 18, 2025
- Meta Platforms Technologies, LLC
- Sri Harsha Manjunath
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiplication-and-accumulation circuits and processing-in-memory d...
- Patent number 12,254,284
- Issue date Mar 18, 2025
- SK hynix Inc.
- Choung Ki Song
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device including page buffer, memory system including page b...
- Patent number 12,254,951
- Issue date Mar 18, 2025
- Yangtze Memory Technologies Co., Ltd.
- Yan Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Dies, semiconductor package structures, enable pin configuration me...
- Patent number 12,254,950
- Issue date Mar 18, 2025
- Yangtze Memory Technologies Co., Ltd.
- Yingjun Wu
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
SHARED DECODER CIRCUIT AND METHOD
- Publication number 20250140294
- Publication date May 1, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- XiuLi YANG
- G11 - INFORMATION STORAGE
Information Patent Application
AGGRESSIVE WRITE FLUSH SCHEME FOR A VICTIM CACHE
- Publication number 20250139019
- Publication date May 1, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MODULE WITH REDUCED READ/WRITE TURNAROUND OVERHEAD
- Publication number 20250139026
- Publication date May 1, 2025
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICES, OPERATION METHODS THEREOF, AND MEMORY SYSTEMS
- Publication number 20250131950
- Publication date Apr 24, 2025
- Yangtze Memory Technologies Co., Ltd.
- Guangyu Bai
- G11 - INFORMATION STORAGE
Information Patent Application
COMPUTING DEVICE, MEMORY CONTROLLER, AND METHOD FOR PERFORMING AN I...
- Publication number 20250124958
- Publication date Apr 17, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- YU-DER CHIH
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE FOR SUPPORTING COMMAND BUS TRAINING MODE AND METHOD O...
- Publication number 20250124959
- Publication date Apr 17, 2025
- Samsung Electronics Co., Ltd.
- Young-hun Kim
- G11 - INFORMATION STORAGE
Information Patent Application
BANKED SENSE AMPLIFIER CIRCUIT FOR A MEMORY CORE AND A MEMORY CORE...
- Publication number 20250118362
- Publication date Apr 10, 2025
- International Business Machines Corporation
- Wolfgang Penth
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM AND METHOD FOR IN-NAND PATTERN SEARCH
- Publication number 20250118368
- Publication date Apr 10, 2025
- SK HYNIX INC.
- Pengfei HUANG
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE WITH PROCESSING-IN-MEMORY USING TEST CI...
- Publication number 20250118386
- Publication date Apr 10, 2025
- Micron Technology, Inc.
- Shadden Kerstetter
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM AND OPERATING METHOD OF MEMORY SYSTEM
- Publication number 20250118345
- Publication date Apr 10, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Win-San KHWA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CRITICAL TIMING DRIVEN DYNAMIC VOLTAGE FREQUENCY SCALING BASED ON A...
- Publication number 20250118348
- Publication date Apr 10, 2025
- Micron Technology, Inc.
- Leon Zlotnik
- G11 - INFORMATION STORAGE
Information Patent Application
ATOMIC COMPARE AND SWAP IN A COHERENT CACHE SYSTEM
- Publication number 20250117340
- Publication date Apr 10, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIGNAL GENERATOR FOR CONTROLLING TIMING OF SIGNAL IN MEMORY DEVICE
- Publication number 20250118346
- Publication date Apr 10, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Xiu-Li YANG
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND APPARATUS FOR ALLOCATION IN A VICTIM CACHE SYSTEM
- Publication number 20250117341
- Publication date Apr 10, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE AND STORAGE DEVICE INCLUDING THE SAME
- Publication number 20250119149
- Publication date Apr 10, 2025
- Samsung Electronics Co., Ltd.
- Tongsung Kim
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR CONFIGURING MULTIPLE INPUT-OUTPUT CHANNELS
- Publication number 20250118343
- Publication date Apr 10, 2025
- Micron Technology, Inc.
- Dean E. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CALIBRATION APPARATUS OF MEMORY DEVICE AND CALIBRATION METHOD THEREOF
- Publication number 20250104750
- Publication date Mar 27, 2025
- Macronix International Co., Ltd.
- Wei-Yi Cheng
- G11 - INFORMATION STORAGE
Information Patent Application
Current Control Systems And Methods For Communications Between Devices
- Publication number 20250104745
- Publication date Mar 27, 2025
- Intel Corporation
- Kasper Wszolek
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY AND OPERATING METHOD THEREOF
- Publication number 20250104746
- Publication date Mar 27, 2025
- GigaDevice Semiconductor Inc.
- Sibo MA
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY ARCHITECTURE
- Publication number 20250104747
- Publication date Mar 27, 2025
- STMicroelectronics International N.V.
- Alin RAZAFINDRAIBE
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY CIRCUIT AND METHOD
- Publication number 20250104785
- Publication date Mar 27, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Gu-Huan LI
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY AND OPERATION METHOD THEREOF
- Publication number 20250095769
- Publication date Mar 20, 2025
- SK HYNIX INC.
- Seung Chan KIM
- G11 - INFORMATION STORAGE
Information Patent Application
FULLY PIPELINED READ-MODIFY-WRITE SUPPORT
- Publication number 20250094359
- Publication date Mar 20, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMABLE COLUMN ACCESS
- Publication number 20250095699
- Publication date Mar 20, 2025
- Micron Technology, Inc.
- Hyunyoo Lee
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM AND METHOD OF CONTROLLING A MEMORY CHIP
- Publication number 20250095703
- Publication date Mar 20, 2025
- KIOXIA Corporation
- Shinya KOIZUMI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-VOLATILE MEMORY AND MEMORY SYSTEM
- Publication number 20250095767
- Publication date Mar 20, 2025
- KIOXIA Corporation
- Mitsuaki HONMA
- G11 - INFORMATION STORAGE
Information Patent Application
VERTICAL INTERCONNECT ELEVATOR BASED ON THROUGH SILICON VIAS
- Publication number 20250096131
- Publication date Mar 20, 2025
- iCometrue Company Ltd.
- Jin-Yuan Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH SPEED MEMORY CIRCUIT ARCHITECTURE WITH IMPROVED AREA AND POWER...
- Publication number 20250095698
- Publication date Mar 20, 2025
- QUALCOMM Incorporated
- Sonia GHOSH
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND APPARATUS TO REDUCE BANK PRESSURE USING AGGRESSIVE WRIT...
- Publication number 20250094358
- Publication date Mar 20, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING-IN-MEMORY DEVICES HAVING MULTIPLICATION-AND-ACCUMULATION...
- Publication number 20250094128
- Publication date Mar 20, 2025
- SK HYNIX INC.
- Choung Ki SONG
- G06 - COMPUTING CALCULATING COUNTING

Data output latches

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Test circuit and receiving circuit having test function

Storage devices and methods of operating storage devices

Data storage device and non-volatile memory control method

Semiconductor system

IMS memory cell, IMS method and IMS memory device

Method for controlling sense amplifier and control device using the...

Apparatuses and methods for input buffer data feedback equalization...

Memory circuit, signal transmission system and signal transmission...

Dynamic clock mask based on read data for power saving

Page buffer circuit and memory device including the same

Memory device with reset voltage control

Non-volatile memory

Memory device and method of operating the same

Compensation for conductance drift in analog memory in crossbar array

Methods of operating a near memory processing-dual in-line memory m...

Memory controller performing training to improve communication and...

Duty cycle adjuster optimization training algorithm to minimize the...

Hybrid victim cache and write miss buffer with fence operation

Flash memory controller, SD card device, method used in flash memor...

Semiconductor memory device and memory system

Communicating data with stacked memory dies

Communication system with mixed threshold voltage transistors

Storage device and operating method thereof

Methods and apparatus for multi-banked victim cache with dual datapath

Data receiving circuit, data receiving system, and memory device

Semiconductor device including internal transmission path and stack...

High-speed multiplexer for reducing glitch power

Multiplication-and-accumulation circuits and processing-in-memory d...

Memory device including page buffer, memory system including page b...

Dies, semiconductor package structures, enable pin configuration me...

Patents Applicationslast 30 patents

SHARED DECODER CIRCUIT AND METHOD

AGGRESSIVE WRITE FLUSH SCHEME FOR A VICTIM CACHE

MEMORY MODULE WITH REDUCED READ/WRITE TURNAROUND OVERHEAD

MEMORY DEVICES, OPERATION METHODS THEREOF, AND MEMORY SYSTEMS

COMPUTING DEVICE, MEMORY CONTROLLER, AND METHOD FOR PERFORMING AN I...

MEMORY DEVICE FOR SUPPORTING COMMAND BUS TRAINING MODE AND METHOD O...

BANKED SENSE AMPLIFIER CIRCUIT FOR A MEMORY CORE AND A MEMORY CORE...

SYSTEM AND METHOD FOR IN-NAND PATTERN SEARCH

SEMICONDUCTOR MEMORY DEVICE WITH PROCESSING-IN-MEMORY USING TEST CI...

MEMORY SYSTEM AND OPERATING METHOD OF MEMORY SYSTEM

CRITICAL TIMING DRIVEN DYNAMIC VOLTAGE FREQUENCY SCALING BASED ON A...

ATOMIC COMPARE AND SWAP IN A COHERENT CACHE SYSTEM

SIGNAL GENERATOR FOR CONTROLLING TIMING OF SIGNAL IN MEMORY DEVICE

METHODS AND APPARATUS FOR ALLOCATION IN A VICTIM CACHE SYSTEM

MEMORY DEVICE AND STORAGE DEVICE INCLUDING THE SAME

METHOD FOR CONFIGURING MULTIPLE INPUT-OUTPUT CHANNELS

CALIBRATION APPARATUS OF MEMORY DEVICE AND CALIBRATION METHOD THEREOF

Current Control Systems And Methods For Communications Between Devices

MEMORY AND OPERATING METHOD THEREOF

NON-VOLATILE MEMORY ARCHITECTURE

NON-VOLATILE MEMORY CIRCUIT AND METHOD

MEMORY AND OPERATION METHOD THEREOF

FULLY PIPELINED READ-MODIFY-WRITE SUPPORT

PROGRAMMABLE COLUMN ACCESS

MEMORY SYSTEM AND METHOD OF CONTROLLING A MEMORY CHIP

NON-VOLATILE MEMORY AND MEMORY SYSTEM

VERTICAL INTERCONNECT ELEVATOR BASED ON THROUGH SILICON VIAS

HIGH SPEED MEMORY CIRCUIT ARCHITECTURE WITH IMPROVED AREA AND POWER...

METHODS AND APPARATUS TO REDUCE BANK PRESSURE USING AGGRESSIVE WRIT...

PROCESSING-IN-MEMORY DEVICES HAVING MULTIPLICATION-AND-ACCUMULATION...