Data output latches

Industry

CPC
G11C7/106

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C7/00Arrangements for writing information into, or reading information out from, a digital store

Current Industry

G11C7/106Data output latches

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Hierarchical bank group timing
- Patent number 12,230,355
- Issue date Feb 18, 2025
- RAMBUS INC.
- John Eric Linstadt
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device
- Patent number 12,230,359
- Issue date Feb 18, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd
- Meng-Sheng Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system using asymmetric source-synchronous clocking
- Patent number 12,228,961
- Issue date Feb 18, 2025
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory component with input/output data rate alignment
- Patent number 12,229,435
- Issue date Feb 18, 2025
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Device with synchronous output
- Patent number 12,230,357
- Issue date Feb 18, 2025
- STMicroelectronics (Rousset) SAS
- Francesco La Rosa
- G11 - INFORMATION STORAGE
Information Patent Grant
Acceleration of in-memory-compute arrays
- Patent number 12,230,361
- Issue date Feb 18, 2025
- Apple Inc.
- Paolo Di Febbo
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device, memory system, and operating method of memory system
- Patent number 12,230,356
- Issue date Feb 18, 2025
- Samsung Electronics Co., Ltd.
- Sun Young Lim
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system
- Patent number 12,224,033
- Issue date Feb 11, 2025
- Kioxia Corporation
- Akira Katayama
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods of memory access control with section prede...
- Patent number 12,224,037
- Issue date Feb 11, 2025
- Micron Technology, Inc.
- Manami Senoo
- G11 - INFORMATION STORAGE
Information Patent Grant
Computing device, memory controller, and method for performing an i...
- Patent number 12,217,819
- Issue date Feb 4, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yu-Der Chih
- G11 - INFORMATION STORAGE
Information Patent Grant
Counter circuit
- Patent number 12,217,820
- Issue date Feb 4, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Yinchuan Gu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device for supporting command bus training mode and method o...
- Patent number 12,217,823
- Issue date Feb 4, 2025
- Samsung Electronics Co., Ltd.
- Young-hun Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with source line control
- Patent number 12,217,822
- Issue date Feb 4, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Perng-Fei Yuh
- G11 - INFORMATION STORAGE
Information Patent Grant
Processing-in-memory devices having multiplication-and-accumulation...
- Patent number 12,217,019
- Issue date Feb 4, 2025
- SK hynix Inc.
- Choung Ki Song
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Atomic compare and swap in a coherent cache system
- Patent number 12,216,591
- Issue date Feb 4, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Device with client configuration and related method
- Patent number 12,210,880
- Issue date Jan 28, 2025
- STMicroelectronics S.r.l.
- Roberta Vittimani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Signal generator for controlling timing of signal in memory device
- Patent number 12,211,586
- Issue date Jan 28, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Xiu-Li Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Aggressive write flush scheme for a victim cache
- Patent number 12,210,463
- Issue date Jan 28, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Test circuit and method for reading data from a memory device durin...
- Patent number 12,211,570
- Issue date Jan 28, 2025
- Realtek Semiconductor Corp.
- Li-Wei Deng
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic rowhammer management
- Patent number 12,211,543
- Issue date Jan 28, 2025
- QUALCOMM Incorporated
- Victor Van Der Veen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Signed and binary weighted computation for an in-memory computation...
- Patent number 12,211,582
- Issue date Jan 28, 2025
- STMicroelectronics S.r.l.
- Marco Pasotti
- G11 - INFORMATION STORAGE
Information Patent Grant
Partitioned memory architecture with single resistor memory element...
- Patent number 12,211,585
- Issue date Jan 28, 2025
- GLOBALFOUNDRIES U.S. Inc.
- Venkatesh P. Gopinath
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-linear polar material based flip-flop
- Patent number 12,212,321
- Issue date Jan 28, 2025
- Kepler Computing Inc.
- Amrita Mathuriya
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-die package
- Patent number 12,205,667
- Issue date Jan 21, 2025
- Realtek Semiconductor Corp.
- Sheng-Feng Chung
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device with adjustment of phase of data signal and cl...
- Patent number 12,205,668
- Issue date Jan 21, 2025
- Samsung Electronics Co., Ltd.
- Jaemin Choi
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system and operating method of memory system
- Patent number 12,205,670
- Issue date Jan 21, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Win-San Khwa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing reference currents in semiconductor devices
- Patent number 12,205,672
- Issue date Jan 21, 2025
- Macronix International Co., Ltd.
- Chun-Hsiung Hung
- G11 - INFORMATION STORAGE
Information Patent Grant
Controller, memory system and operating method of memory system
- Patent number 12,205,662
- Issue date Jan 21, 2025
- SK Hynix Inc.
- Young Ook Song
- G11 - INFORMATION STORAGE
Information Patent Grant
Pipe latch circuit, operating method thereof, and semiconductor mem...
- Patent number 12,205,666
- Issue date Jan 21, 2025
- SK hynix Inc.
- Bo Kyeom Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and apparatus to reduce bank pressure using aggressive writ...
- Patent number 12,197,347
- Issue date Jan 14, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
OPEN TRANSLATION UNIT MANAGEMENT USING AN ADAPTIVE READ THRESHOLD
- Publication number 20250061928
- Publication date Feb 20, 2025
- Micron Technology, Inc.
- Murong Lang
- G11 - INFORMATION STORAGE
Information Patent Application
Systems and Methods for Controlling Power Management Operations in...
- Publication number 20250061929
- Publication date Feb 20, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Sanjeev Kumar Jain
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY COMPONENT WITH ADJUSTABLE CORE-TO-INTERFACE DATA RATE RATIO
- Publication number 20250054525
- Publication date Feb 13, 2025
- Rambus Inc.
- Frederick A. Ware
- G11 - INFORMATION STORAGE
Information Patent Application
VERTICAL INTERCONNECT ELEVATOR BASED ON THROUGH SILICON VIAS
- Publication number 20250054860
- Publication date Feb 13, 2025
- iCometrue Company Ltd.
- Jin-Yuan Lee
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND OPERATING METHOD OF THE MEMORY DEVICE
- Publication number 20250054526
- Publication date Feb 13, 2025
- SK HYNIX INC.
- Chan Keun KWON
- G11 - INFORMATION STORAGE
Information Patent Application
GENERATION OF SOFT DECISION DATA FOR MEMORY DEVICES
- Publication number 20250054563
- Publication date Feb 13, 2025
- Samsung Electronics Co., Ltd.
- Sehwan Park
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH MEMORY PILLAR INSIDE CONDUCTOR
- Publication number 20250054524
- Publication date Feb 13, 2025
- KIOXIA Corporation
- Hiroshi Maejima
- G11 - INFORMATION STORAGE
Information Patent Application
SKIPPING PAGES FOR WEAK WORDLINES OF A MEMORY DEVICE DURING PRE-PRO...
- Publication number 20250054527
- Publication date Feb 13, 2025
- Micron Technology, Inc.
- Cheng Cheng Ang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRACKING THE EFFECTS OF VOLTAGE AND TEMPERATURE ON A MEMORY DEVICE...
- Publication number 20250046348
- Publication date Feb 6, 2025
- Micron Technology, Inc.
- Keun Soo Song
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC RANDOM ACCESS MEMORY SPEED BIN COMPATIBILITY
- Publication number 20250046353
- Publication date Feb 6, 2025
- Micron Technology, Inc.
- Erik V. Pohlmann
- G11 - INFORMATION STORAGE
Information Patent Application
REAL TIME SYNDROME CHECK
- Publication number 20250045157
- Publication date Feb 6, 2025
- Micron Technology, Inc.
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE FOR OUTPUTTING DATA AND METHOD OF OPERATING THE SAME
- Publication number 20250046349
- Publication date Feb 6, 2025
- SK HYNIX INC.
- Su Han LEE
- G11 - INFORMATION STORAGE
Information Patent Application
REDUNDANCY AND MAJORITY VOTING IN A KEY-VALUE DATA STORAGE SYSTEM U...
- Publication number 20250046374
- Publication date Feb 6, 2025
- Micron Technology, Inc.
- Tyler L. Betz
- G11 - INFORMATION STORAGE
Information Patent Application
POWER EFFICIENT UNMATCHED DATA PATH ARCHITECTURE FOR NON-VOLATILE M...
- Publication number 20250046351
- Publication date Feb 6, 2025
- Western Digital Technologies, Inc.
- Abhishek Singhania
- G11 - INFORMATION STORAGE
Information Patent Application
DRIVE STRENGTH CALIBRATION FOR MULTI-LEVEL SIGNALING
- Publication number 20250046347
- Publication date Feb 6, 2025
- Lodestar Licensing Group LLC
- Peter Mayer
- G11 - INFORMATION STORAGE
Information Patent Application
STORAGE DEVICE FOR GENERATING A DELAY SIGNAL, AND A METHOD OF OPERA...
- Publication number 20250046354
- Publication date Feb 6, 2025
- Samsung Electronics Co., Ltd.
- LAESANG JUNG
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND APPARATUS FOR READ-MODIFY-WRITE SUPPORT IN MULTI-BANKED...
- Publication number 20250036573
- Publication date Jan 30, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY READOUT CIRCUIT
- Publication number 20250037745
- Publication date Jan 30, 2025
- INFINEON TECHNOLOGIES AG
- Mihail Jefremow
- G11 - INFORMATION STORAGE
Information Patent Application
MATRIX FORMATION FOR PERFORMING COMPUTATIONAL OPERATIONS IN MEMORY
- Publication number 20250029642
- Publication date Jan 23, 2025
- Micron Technology, Inc.
- Paolo Fantini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VICTIM CACHE WITH DYNAMIC ALLOCATION OF ENTRIES
- Publication number 20250028652
- Publication date Jan 23, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICES FOR MULTIPLE READ OPERATIONS
- Publication number 20250029641
- Publication date Jan 23, 2025
- Micron Technology, Inc.
- Eric N. Lee
- G11 - INFORMATION STORAGE
Information Patent Application
ATOMIC OPERATIONS AND HISTOGRAM OPERATIONS IN A CACHE PIPELINE
- Publication number 20250028651
- Publication date Jan 23, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MODULE WITH TIMING-CONTROLLED DATA BUFFERING
- Publication number 20250028660
- Publication date Jan 23, 2025
- Netlist, Inc.
- Hyun Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM
- Publication number 20250021260
- Publication date Jan 16, 2025
- KIOXIA Corporation
- Kensuke YAMAMOTO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCED LOGIC GATE ACCUMULATORS
- Publication number 20250022493
- Publication date Jan 16, 2025
- Raytheon Company
- Micky R. Harris
- G11 - INFORMATION STORAGE
Information Patent Application
High-Speed and Area-Efficient Parallel-Write-and-Read Memory
- Publication number 20250022494
- Publication date Jan 16, 2025
- QUALCOMM Incorporated
- Hochul LEE
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR SETTING A DUTY CYCLE ADJUSTER FOR IMPRO...
- Publication number 20250022496
- Publication date Jan 16, 2025
- Lodestar Licensing Group LLC
- Kang-Yong Kim
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND OPERATION METHOD THEREOF
- Publication number 20250022504
- Publication date Jan 16, 2025
- Samsung Electronics Co., Ltd.
- YOON-JOO EOM
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20250015799
- Publication date Jan 9, 2025
- ROHM CO., LTD.
- Yasuhito SUGIMOTO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LEAKAGE COMPENSATED DYNAMIC LATCH
- Publication number 20250006234
- Publication date Jan 2, 2025
- Intel Corporation
- Ganesan Iyer
- G11 - INFORMATION STORAGE

Data output latches

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Hierarchical bank group timing

Semiconductor device

Memory system using asymmetric source-synchronous clocking

Memory component with input/output data rate alignment

Device with synchronous output

Acceleration of in-memory-compute arrays

Memory device, memory system, and operating method of memory system

Memory system

Apparatuses and methods of memory access control with section prede...

Computing device, memory controller, and method for performing an i...

Counter circuit

Memory device for supporting command bus training mode and method o...

Memory device with source line control

Processing-in-memory devices having multiplication-and-accumulation...

Atomic compare and swap in a coherent cache system

Device with client configuration and related method

Signal generator for controlling timing of signal in memory device

Aggressive write flush scheme for a victim cache

Test circuit and method for reading data from a memory device durin...

Dynamic rowhammer management

Signed and binary weighted computation for an in-memory computation...

Partitioned memory architecture with single resistor memory element...

Non-linear polar material based flip-flop

Multi-die package

Semiconductor device with adjustment of phase of data signal and cl...

Memory system and operating method of memory system

Managing reference currents in semiconductor devices

Controller, memory system and operating method of memory system

Pipe latch circuit, operating method thereof, and semiconductor mem...

Methods and apparatus to reduce bank pressure using aggressive writ...

Patents Applicationslast 30 patents

OPEN TRANSLATION UNIT MANAGEMENT USING AN ADAPTIVE READ THRESHOLD

Systems and Methods for Controlling Power Management Operations in...

MEMORY COMPONENT WITH ADJUSTABLE CORE-TO-INTERFACE DATA RATE RATIO

VERTICAL INTERCONNECT ELEVATOR BASED ON THROUGH SILICON VIAS

MEMORY DEVICE AND OPERATING METHOD OF THE MEMORY DEVICE

GENERATION OF SOFT DECISION DATA FOR MEMORY DEVICES

MEMORY DEVICE WITH MEMORY PILLAR INSIDE CONDUCTOR

SKIPPING PAGES FOR WEAK WORDLINES OF A MEMORY DEVICE DURING PRE-PRO...

TRACKING THE EFFECTS OF VOLTAGE AND TEMPERATURE ON A MEMORY DEVICE...

DYNAMIC RANDOM ACCESS MEMORY SPEED BIN COMPATIBILITY

REAL TIME SYNDROME CHECK

MEMORY DEVICE FOR OUTPUTTING DATA AND METHOD OF OPERATING THE SAME

REDUNDANCY AND MAJORITY VOTING IN A KEY-VALUE DATA STORAGE SYSTEM U...

POWER EFFICIENT UNMATCHED DATA PATH ARCHITECTURE FOR NON-VOLATILE M...

DRIVE STRENGTH CALIBRATION FOR MULTI-LEVEL SIGNALING

STORAGE DEVICE FOR GENERATING A DELAY SIGNAL, AND A METHOD OF OPERA...

METHODS AND APPARATUS FOR READ-MODIFY-WRITE SUPPORT IN MULTI-BANKED...

MEMORY READOUT CIRCUIT

MATRIX FORMATION FOR PERFORMING COMPUTATIONAL OPERATIONS IN MEMORY

VICTIM CACHE WITH DYNAMIC ALLOCATION OF ENTRIES

MEMORY DEVICES FOR MULTIPLE READ OPERATIONS

ATOMIC OPERATIONS AND HISTOGRAM OPERATIONS IN A CACHE PIPELINE

MEMORY MODULE WITH TIMING-CONTROLLED DATA BUFFERING

MEMORY SYSTEM

REDUCED LOGIC GATE ACCUMULATORS

High-Speed and Area-Efficient Parallel-Write-and-Read Memory

APPARATUSES AND METHODS FOR SETTING A DUTY CYCLE ADJUSTER FOR IMPRO...

MEMORY DEVICE AND OPERATION METHOD THEREOF

SEMICONDUCTOR DEVICE

LEAKAGE COMPENSATED DYNAMIC LATCH