Decoders

Industry

CPC
G11C8/10

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C8/00Arrangements for selecting an address in a digital store

Current Industry

G11C8/10Decoders

Industries

Patents Grantslast 30 patents

Information Patent Grant
Shared decoder circuit and method
- Patent number 12,183,432
- Issue date Dec 31, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- XiuLi Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device
- Patent number 12,176,062
- Issue date Dec 24, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- He-Zhou Wan
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and electronic device
- Patent number 12,170,125
- Issue date Dec 17, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chien-Yu Huang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-volatile memory circuit and method
- Patent number 12,165,722
- Issue date Dec 10, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Gu-Huan Li
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual-port semiconductor memory and first in first out (FIFO) memory...
- Patent number 12,156,397
- Issue date Nov 26, 2024
- Zeno Semiconductor, Inc.
- Yuniarto Widjaja
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Data output control circuit and semiconductor device including the...
- Patent number 12,154,658
- Issue date Nov 26, 2024
- SK Hynix Inc.
- Kwang Soon Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Address scheduling methods for non-volatile memory devices with thr...
- Patent number 12,147,340
- Issue date Nov 19, 2024
- Samsung Electronics Co., Ltd.
- Chi Weon Yoon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Signal sampling circuit and semiconductor memory device
- Patent number 12,148,461
- Issue date Nov 19, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Zequn Huang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device comprising electrically floating body transistor
- Patent number 12,094,526
- Issue date Sep 17, 2024
- Zeno Semiconductor, Inc.
- Jin-Woo Han
- G11 - INFORMATION STORAGE
Information Patent Grant
Stacked semiconductor device
- Patent number 12,094,555
- Issue date Sep 17, 2024
- SK Hynix Inc.
- Jae Hyung Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory and operation method thereof including accessing redundancy...
- Patent number 12,080,367
- Issue date Sep 3, 2024
- SK Hynix Inc.
- Woo-Hyun Paik
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for command decoding
- Patent number 12,073,911
- Issue date Aug 27, 2024
- Micron Technology, Inc.
- Yutaka Uemura
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device including merged write driver
- Patent number 12,068,015
- Issue date Aug 20, 2024
- Samsung Electronics Co., Ltd.
- Gyuseong Kang
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor storage device
- Patent number 12,068,031
- Issue date Aug 20, 2024
- Kioxia Corporation
- Jun Deguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile semiconductor memory device with a plurality of memory...
- Patent number 12,062,393
- Issue date Aug 13, 2024
- Kioxia Corporation
- Gou Fukano
- G11 - INFORMATION STORAGE
Information Patent Grant
Chip select, command, and address encoding
- Patent number 12,057,189
- Issue date Aug 6, 2024
- SanDisk Technologies LLC
- Tianyu Tang
- G11 - INFORMATION STORAGE
Information Patent Grant
Modular memory architecture with gated sub-array operation dependen...
- Patent number 12,046,324
- Issue date Jul 23, 2024
- STMICROELECTRONICS INTERNATIONAL N.V.
- Harsh Rawat
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device and semiconductor system
- Patent number 12,046,323
- Issue date Jul 23, 2024
- SK hynix Inc.
- Jeong Jin Hwang
- G11 - INFORMATION STORAGE
Information Patent Grant
Control logic assemblies
- Patent number 12,040,041
- Issue date Jul 16, 2024
- Micron Technology, Inc.
- Kurt D. Beigel
- G11 - INFORMATION STORAGE
Information Patent Grant
Security device including physical unclonable function cells and op...
- Patent number 12,041,188
- Issue date Jul 16, 2024
- Samsung Electronics Co., Ltd.
- Hoyoung Shin
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device for reducing row hammer disturbance, and a method of...
- Patent number 12,020,739
- Issue date Jun 25, 2024
- Samsung Electronics Co., Ltd.
- Sunghye Cho
- G11 - INFORMATION STORAGE
Information Patent Grant
Address latch, address control circuit and semiconductor apparatus...
- Patent number 12,009,058
- Issue date Jun 11, 2024
- SK hynix Inc.
- Ji Eun Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory device and memory system having the same
- Patent number 12,009,048
- Issue date Jun 11, 2024
- Samsung Electronics Co., Ltd.
- Sanghak Shin
- G11 - INFORMATION STORAGE
Information Patent Grant
In memory matrix multiplication and its usage in neural networks
- Patent number 12,008,068
- Issue date Jun 11, 2024
- GSI Technology Inc.
- Avidan Akerib
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods including multilevel command and address si...
- Patent number 11,996,161
- Issue date May 28, 2024
- Kang-Yong Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory chip and operating method thereof
- Patent number 11,996,165
- Issue date May 28, 2024
- AU OPTRONICS CORPORATION
- Hsiang-Chi Cheng
- G11 - INFORMATION STORAGE
Information Patent Grant
Variable page size architecture
- Patent number 11,961,588
- Issue date Apr 16, 2024
- Micron Technology, Inc.
- Corrado Villa
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods including multilevel command and address si...
- Patent number 11,923,039
- Issue date Mar 5, 2024
- Kang-Yong Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods including multilevel command and address si...
- Patent number 11,923,040
- Issue date Mar 5, 2024
- Kang-Yong Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods including multilevel command and address si...
- Patent number 11,923,038
- Issue date Mar 5, 2024
- Kang-Yong Kim
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
LEVEL-SHIFTER HAVING A WIDE OPERATING RANGE, A FAST OUTPUT FALL DEL...
- Publication number 20240405776
- Publication date Dec 5, 2024
- NVIDIA Corporation
- Stefan P. Sywyk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Device Comprising Electrically Floating Body Transistor
- Publication number 20240404585
- Publication date Dec 5, 2024
- Zeno Semiconductor, Inc.
- Jin-Woo Han
- G11 - INFORMATION STORAGE
Information Patent Application
Decoder Circuits Using Shared Transistors for Low-Power, High-Speed...
- Publication number 20240386931
- Publication date Nov 21, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yorinobu Fujino
- G11 - INFORMATION STORAGE
Information Patent Application
VARIABLE PAGE SIZE ARCHITECTURE
- Publication number 20240347088
- Publication date Oct 17, 2024
- Micron Technology, Inc.
- Corrado Villa
- G11 - INFORMATION STORAGE
Information Patent Application
STACKED SEMICONDUCTOR DEVICE
- Publication number 20240339134
- Publication date Oct 10, 2024
- SK HYNIX INC.
- Jae Hyung PARK
- G11 - INFORMATION STORAGE
Information Patent Application
POWER GATING CONTROL CIRCUIT, AND SEMICONDUCTOR APPARATUS AND SEMIC...
- Publication number 20240312500
- Publication date Sep 19, 2024
- SK HYNIX INC.
- Mino KIM
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM HAVING THE SAME
- Publication number 20240282346
- Publication date Aug 22, 2024
- Samsung Electronics Co., LTD
- Sanghak SHIN
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CHIP AND OPERATING METHOD THEREOF
- Publication number 20240265956
- Publication date Aug 8, 2024
- AU OPTRONICS CORPORATION
- Hsiang-Chi CHENG
- G11 - INFORMATION STORAGE
Information Patent Application
COMMAND ADDRESS CONTROL CIRCUIT, AND SEMICONDUCTOR APPARATUS AND SE...
- Publication number 20240257891
- Publication date Aug 1, 2024
- SK HYNIX INC.
- Ji Hwan PARK
- G11 - INFORMATION STORAGE
Information Patent Application
THIN FILM TRANSISTORS AND RELATED FABRICATION TECHNIQUES
- Publication number 20240237364
- Publication date Jul 11, 2024
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS INCLUDING MULTILEVEL COMMAND AND ADDRESS SI...
- Publication number 20240221800
- Publication date Jul 4, 2024
- Lodestar Licensing Group LLC
- Kang-Yong Kim
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY ARRAY DECODING AND INTERCONNECTS
- Publication number 20240185892
- Publication date Jun 6, 2024
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE
Information Patent Application
STATIC RANDOM ACCESS MEMORY SUPPORTING A DYNAMICALLY VARIABLE DURAT...
- Publication number 20240170032
- Publication date May 23, 2024
- STMicroelectronics International N.V.
- Praveen Kumar VERMA
- G11 - INFORMATION STORAGE
Information Patent Application
DECODING ARCHITECTURE FOR WORD LINE TILES
- Publication number 20240161801
- Publication date May 16, 2024
- Micron Technology, Inc.
- Paolo Fantini
- G11 - INFORMATION STORAGE
Information Patent Application
Systems and Methods for Controlling Power Assertion In a Memory Device
- Publication number 20240153545
- Publication date May 9, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Sanjeev Kumar Jain
- G11 - INFORMATION STORAGE
Information Patent Application
ADDRESS DECODER UNIT FOR A MEMORY CELL ARRAY
- Publication number 20240127875
- Publication date Apr 18, 2024
- EM Microelectronic-Marin SA
- Lubomir PLAVEC
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CIRCUIT AND METHOD OF OPERATING SAME
- Publication number 20240096386
- Publication date Mar 21, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yi-Ching LIU
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE INCLUDING PROCESSING CIRCUIT, AND ELECTRONIC DEVICE I...
- Publication number 20240086345
- Publication date Mar 14, 2024
- Samsung Electronics Co., Ltd.
- Sang-Hyuk KWON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY WITH DEFERRED FRACTIONAL ROW ACTIVATION
- Publication number 20240062788
- Publication date Feb 22, 2024
- Rambus Inc.
- James E. Harris
- G11 - INFORMATION STORAGE
Information Patent Application
Dynamic Power Management for On-Chip Memory
- Publication number 20240055035
- Publication date Feb 15, 2024
- ARM Limited
- Edward Martin McCombs
- G11 - INFORMATION STORAGE
Information Patent Application
ADDRESS SIGNAL TRANSMISSION CIRCUIT, ADDRESS SIGNAL TRANSMISSION ME...
- Publication number 20240046972
- Publication date Feb 8, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC
- Kangling JI
- G11 - INFORMATION STORAGE
Information Patent Application
WORD LINE STRUCTURES FOR THREE-DIMENSIONAL MEMORY ARRAYS
- Publication number 20240029772
- Publication date Jan 25, 2024
- Micron Technology, Inc.
- Stephen W. Russell
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE
- Publication number 20230422640
- Publication date Dec 28, 2023
- KIOXIA Corporation
- Kenichi MUROOKA
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND MEMORY SYSTEM
- Publication number 20230410863
- Publication date Dec 21, 2023
- Samsung Electronics Co., Ltd.
- Seung-Jun SHIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE AND ELECTRONIC DEVICE
- Publication number 20230410935
- Publication date Dec 21, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chien-Yu Huang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-VOLATILE MEMORY CIRCUIT AND METHOD
- Publication number 20230386591
- Publication date Nov 30, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Gu-Huan LI
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT WITH ASYMMETRIC ARRANGEMENTS OF MEMORY ARRAYS
- Publication number 20230377623
- Publication date Nov 23, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Xiu-Li YANG
- G11 - INFORMATION STORAGE
Information Patent Application
SHARED DECODER CIRCUIT AND METHOD
- Publication number 20230368828
- Publication date Nov 16, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- XiuLi YANG
- G11 - INFORMATION STORAGE
Information Patent Application
IN MEMORY MATRIX MULTIPLICATION AND ITS USAGE IN NEURAL NETWORKS
- Publication number 20230359698
- Publication date Nov 9, 2023
- GSI Technology Inc.
- Avidan Akerib
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CIRCUITS
- Publication number 20230361100
- Publication date Nov 9, 2023
- Taiwan Semiconductor Manufacturing company Ltd.
- YI-CHING LIU
- G11 - INFORMATION STORAGE

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Shared decoder circuit and method

Memory device

Memory device and electronic device

Non-volatile memory circuit and method

Dual-port semiconductor memory and first in first out (FIFO) memory...

Data output control circuit and semiconductor device including the...

Address scheduling methods for non-volatile memory devices with thr...

Signal sampling circuit and semiconductor memory device

Memory device comprising electrically floating body transistor

Stacked semiconductor device

Memory and operation method thereof including accessing redundancy...

Apparatuses and methods for command decoding

Memory device including merged write driver

Semiconductor storage device

Nonvolatile semiconductor memory device with a plurality of memory...

Chip select, command, and address encoding

Modular memory architecture with gated sub-array operation dependen...

Semiconductor device and semiconductor system

Control logic assemblies

Security device including physical unclonable function cells and op...

Memory device for reducing row hammer disturbance, and a method of...

Address latch, address control circuit and semiconductor apparatus...

Semiconductor memory device and memory system having the same

In memory matrix multiplication and its usage in neural networks

Apparatuses and methods including multilevel command and address si...

Memory chip and operating method thereof

Variable page size architecture

Apparatuses and methods including multilevel command and address si...

Apparatuses and methods including multilevel command and address si...

Apparatuses and methods including multilevel command and address si...

Patents Applicationslast 30 patents

LEVEL-SHIFTER HAVING A WIDE OPERATING RANGE, A FAST OUTPUT FALL DEL...

Memory Device Comprising Electrically Floating Body Transistor

Decoder Circuits Using Shared Transistors for Low-Power, High-Speed...

VARIABLE PAGE SIZE ARCHITECTURE

STACKED SEMICONDUCTOR DEVICE

POWER GATING CONTROL CIRCUIT, AND SEMICONDUCTOR APPARATUS AND SEMIC...

SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM HAVING THE SAME

MEMORY CHIP AND OPERATING METHOD THEREOF

COMMAND ADDRESS CONTROL CIRCUIT, AND SEMICONDUCTOR APPARATUS AND SE...

THIN FILM TRANSISTORS AND RELATED FABRICATION TECHNIQUES

APPARATUSES AND METHODS INCLUDING MULTILEVEL COMMAND AND ADDRESS SI...

MEMORY ARRAY DECODING AND INTERCONNECTS

STATIC RANDOM ACCESS MEMORY SUPPORTING A DYNAMICALLY VARIABLE DURAT...

DECODING ARCHITECTURE FOR WORD LINE TILES

Systems and Methods for Controlling Power Assertion In a Memory Device

ADDRESS DECODER UNIT FOR A MEMORY CELL ARRAY

MEMORY CIRCUIT AND METHOD OF OPERATING SAME

MEMORY DEVICE INCLUDING PROCESSING CIRCUIT, AND ELECTRONIC DEVICE I...

MEMORY WITH DEFERRED FRACTIONAL ROW ACTIVATION

Dynamic Power Management for On-Chip Memory

ADDRESS SIGNAL TRANSMISSION CIRCUIT, ADDRESS SIGNAL TRANSMISSION ME...

WORD LINE STRUCTURES FOR THREE-DIMENSIONAL MEMORY ARRAYS

SEMICONDUCTOR MEMORY DEVICE

MEMORY DEVICE AND MEMORY SYSTEM

MEMORY DEVICE AND ELECTRONIC DEVICE

NON-VOLATILE MEMORY CIRCUIT AND METHOD

INTEGRATED CIRCUIT WITH ASYMMETRIC ARRANGEMENTS OF MEMORY ARRAYS

SHARED DECODER CIRCUIT AND METHOD

IN MEMORY MATRIX MULTIPLICATION AND ITS USAGE IN NEURAL NETWORKS

MEMORY CIRCUITS