forming drain [D] and lightly doped drain [LDD] simultaneously

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H01L29/66598

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HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier

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H01L29/66598forming drain [D] and lightly doped drain [LDD] simultaneously

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Patents Grantslast 30 patents

Information Patent Grant
Method of manufacturing a semiconductor device and a semiconductor...
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Information Patent Grant
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Transistor layout to reduce kink effect
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- Meng-Han Lin
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Manufacturing method of semiconductor device including floating gat...
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Information Patent Grant
Transistor layout to reduce kink effect
- Patent number 11,688,784
- Issue date Jun 27, 2023
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Information Patent Grant
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Information Patent Grant
Transistor layout to reduce kink effect
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- Issue date Apr 6, 2021
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Information Patent Grant
Transistor layout to reduce kink effect
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Information Patent Grant
Channel strain inducing architecture and doping technique at replac...
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Information Patent Grant
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Transistor layout to reduce kink effect
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Method and structure of forming FinFET contact
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Information Patent Grant
Channel strain inducing architecture and doping technique at replac...
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Method of fabricating a transistor with reduced hot carrier injecti...
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Information Patent Grant
Semiconductor devices having a gate conductor and methods of manufa...
- Patent number 10,128,351
- Issue date Nov 13, 2018
- Institute of Microelectronics, Chinese Academy of Sciences
- Huilong Zhu
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Information Patent Grant
Drain extended MOS transistors with split channel
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- Issue date Oct 16, 2018
- Cypress Semiconductor Corporation
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Information Patent Grant
Complementary metal oxide semiconductor field effect transistor, me...
- Patent number 10,062,770
- Issue date Aug 28, 2018
- United Microelectronics Corp.
- Chien-Ting Lin
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
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TRANSISTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
- Publication number 20230326969
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METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR...
- Publication number 20230138401
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TRANSISTOR LAYOUT TO REDUCE KINK EFFECT
- Publication number 20220293758
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- Publication number 20220277960
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TRANSISTOR STRUCTURE WITH SILICIDE LAYER AND FABRICATING METHOD OF...
- Publication number 20210313447
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- UNITED MICROELECTRONICS CORP.
- HAO SU
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TRANSISTOR LAYOUT TO REDUCE KINK EFFECT
- Publication number 20210217868
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- Taiwan Semiconductor Manufacturing Co., LTD
- Meng-Han Lin
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SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
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TRANSISTOR COMPRISING A LENGTHENED GATE
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INTEGRATED CIRCUIT, LDMOS WITH BOTTOM GATE AND BALLAST DRIFT
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- TEXAS INSTRUMENTS INCORPORATED
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TRANSISTOR LAYOUT TO REDUCE KINK EFFECT
- Publication number 20200058749
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METHOD OF FABRICATING A TRANSISTOR WITH REDUCED HOT CARRIER INJECTI...
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MANUFACTURE METHOD OF TFT SUBSTRATE STRUCTURE AND TFT SUBSTRATE STR...
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- Wenshuai Guo
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Information Patent Application
LTPS TFT Substrate Structure and Method of Forming the Same
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- SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
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- UNITED MICROELECTRONICS CORP.
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- H01 - BASIC ELECTRIC ELEMENTS

forming drain [D] and lightly doped drain [LDD] simultaneously

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Method of manufacturing a semiconductor device and a semiconductor...

Transistor structure and manufacturing method thereof

High voltage field effect transistor with vertical current paths an...

Method of manufacturing a semiconductor device and a semiconductor...

Transistor layout to reduce kink effect

Manufacturing method of semiconductor device including floating gat...

Transistor layout to reduce kink effect

Semiconductor device and manufacturing method of the same

Manufacturing method of semiconductor device using gate-through imp...

Transistor comprising a lengthened gate

Transistor layout to reduce kink effect

Integrated circuit, LDMOS with bottom gate and ballast drift

Method for manufacturing semiconductor device

Transistor layout to reduce kink effect

Channel strain inducing architecture and doping technique at replac...

Transistor comprising a lengthened gate

Method and structure of forming finFET contact

N-type thin film transistor, manufacturing method thereof and manuf...

Low-cost semiconductor device manufacturing method

Integrated circuit, LDMOS with trapezoid JFET, bottom gate and ball...

Transistor layout to reduce kink effect

Transistors with H-shaped or U-shaped channels and method for formi...

MOS transistor and fabrication method

Long channels for transistors

Method and structure of forming FinFET contact

Channel strain inducing architecture and doping technique at replac...

Method of fabricating a transistor with reduced hot carrier injecti...

Semiconductor devices having a gate conductor and methods of manufa...

Drain extended MOS transistors with split channel

Complementary metal oxide semiconductor field effect transistor, me...

Patents Applicationslast 30 patents

SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR...

TRANSISTOR STRUCTURE AND MANUFACTURING METHOD THEREOF

METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR...

MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE

TRANSISTOR LAYOUT TO REDUCE KINK EFFECT

MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE USING GATE-THROUGH IMP...

TRANSISTOR STRUCTURE WITH SILICIDE LAYER AND FABRICATING METHOD OF...

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SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME

TRANSISTOR COMPRISING A LENGTHENED GATE

INTEGRATED CIRCUIT, LDMOS WITH BOTTOM GATE AND BALLAST DRIFT

TRANSISTOR LAYOUT TO REDUCE KINK EFFECT

TRANSISTOR LAYOUT TO REDUCE KINK EFFECT

METHOD AND STRUCTURE OF FORMING FINFET CONTACT

LONG CHANNELS FOR TRANSISTORS

CHANNEL STRAIN INDUCING ARCHITECTURE AND DOPING TECHNIQUE AT REPLAC...

METHOD AND STRUCTURE OF FORMING FINFET CONTACT

TRANSISTORS WITH H-SHAPED OR U-SHAPED CHANNELS AND METHOD FOR FORMI...

LONG CHANNELS FOR TRANSISTORS

TRANSISTOR LAYOUT TO REDUCE KINK EFFECT

SIDEWALL ENGINEERING FOR ENHANCED DEVICE PERFORMANCE IN ADVANCED DE...

INTEGRATED CIRCUIT, LDMOS WITH TRAPEZOID JFET, BOTTOM GATE AND BALL...

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FET device manufacturing using a modified Ion implantation method

LOW-COST SEMICONDUCTOR DEVICE MANUFACTURING METHOD

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MANUFACTURE METHOD OF TFT SUBSTRATE STRUCTURE AND TFT SUBSTRATE STR...

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