forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration

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GPHYSICS G11Information storage G11CSTATIC STORES G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements Storage elements therefor

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G11C11/41forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration

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Patents Grantslast 30 patents

Information Patent Grant
SRAM with reconfigurable setting
- Patent number 12,362,011
- Issue date Jul 15, 2025
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Jean-Philippe Noel
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM performance optimization via transistor width and threshold vo...
- Patent number 12,362,009
- Issue date Jul 15, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Jhon Jhy Liaw
- G11 - INFORMATION STORAGE
Information Patent Grant
Far end driver for memory clock
- Patent number 12,361,991
- Issue date Jul 15, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Atul Katoch
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory circuit and method of operating same
- Patent number 12,362,010
- Issue date Jul 15, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Luping Kong
- G11 - INFORMATION STORAGE
Information Patent Grant
FinFET SRAM cells with reduced fin pitch
- Patent number 12,363,879
- Issue date Jul 15, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chih-Hao Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Adaptive word line underdrive control for an in-memory compute oper...
- Patent number 12,354,644
- Issue date Jul 8, 2025
- STMICROELECTRONICS INTERNATIONAL N.V.
- Kedar Janardan Dhori
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuits with single-functional-unit level integration o...
- Patent number 12,354,650
- Issue date Jul 8, 2025
- The University of North Carolina at Charlotte
- Yong Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
Reducing precharge current surge in digital compute in memory
- Patent number 12,354,657
- Issue date Jul 8, 2025
- Mediatek Inc.
- Chetan Deshpande
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cell design
- Patent number 12,356,601
- Issue date Jul 8, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Jhon Jhy Liaw
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM memory cell device comprising ferroelectric access and storage...
- Patent number 12,356,600
- Issue date Jul 8, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hung-Li Chiang
- G11 - INFORMATION STORAGE
Information Patent Grant
Arrangements of memory devices and methods of operating the memory...
- Patent number 12,347,483
- Issue date Jul 1, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chien-Yuan Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Static random-access memory (SRAM) device including three-dimension...
- Patent number 12,342,521
- Issue date Jun 24, 2025
- Samsung Electronics Co., Ltd.
- Kyungsoo Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor storage device
- Patent number 12,342,520
- Issue date Jun 24, 2025
- SOCIONEXT INC.
- Masanobu Hirose
- G11 - INFORMATION STORAGE
Information Patent Grant
Drive circuit with improved timing margin for memory device
- Patent number 12,340,838
- Issue date Jun 24, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Masaru Haraguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device including booster circuit for tracking word line
- Patent number 12,334,144
- Issue date Jun 17, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hyunsung Hong
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory bit cell for in-memory computation
- Patent number 12,333,357
- Issue date Jun 17, 2025
- Apple Inc.
- Michael A. Dreesen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power level comparator with switching input
- Patent number 12,334,143
- Issue date Jun 17, 2025
- QUALCOMM Incorporated
- Seohee Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Power loss reduction in data storage arrays
- Patent number 12,334,146
- Issue date Jun 17, 2025
- Apple Inc.
- Vivekanandan Venugopal
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit, system and method of forming the same
- Patent number 12,334,178
- Issue date Jun 17, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yen Lin Chung
- G11 - INFORMATION STORAGE
Information Patent Grant
Bitcell supporting bit-write-mask function
- Patent number 12,334,145
- Issue date Jun 17, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hidehiro Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Grant
Silicon-on-insulator semiconductor device with a static random acce...
- Patent number 12,328,858
- Issue date Jun 10, 2025
- STMicroelectronics France
- Olivier Weber
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for performing a MAC operation in a memory array
- Patent number 12,327,591
- Issue date Jun 10, 2025
- MediaTek Singapore Pte Ltd.
- Chetan Deshpande
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vertical interconnect elevator based on through silicon vias
- Patent number 12,327,790
- Issue date Jun 10, 2025
- iCometrue Company Ltd.
- Jin-Yuan Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device
- Patent number 12,327,585
- Issue date Jun 10, 2025
- Renesas Electronics Corporation
- Shunya Nagata
- G11 - INFORMATION STORAGE
Information Patent Grant
Bit line pre-charge circuit for power management modes in multi ban...
- Patent number 12,327,586
- Issue date Jun 10, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Sanjeev Kumar Jain
- G11 - INFORMATION STORAGE
Information Patent Grant
Hierarchical memory architecture including on-chip multi-bank non-v...
- Patent number 12,328,880
- Issue date Jun 10, 2025
- GLOBALFOUNDRIES U.S. Inc.
- Navneet K. Jain
- G11 - INFORMATION STORAGE
Information Patent Grant
Latch circuit formed by modified memory cells
- Patent number 12,322,438
- Issue date Jun 3, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hua-Hsin Yu
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit device and manufacturing method of the same
- Patent number 12,315,560
- Issue date May 27, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Huai-Ying Huang
- G11 - INFORMATION STORAGE
Information Patent Grant
Latch-based storage circuits having efficient integrated circuit la...
- Patent number 12,315,559
- Issue date May 27, 2025
- Samsung Electronics Co., Ltd.
- Kijun Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM repair system and method
- Patent number 12,315,586
- Issue date May 27, 2025
- Texas Instruments Incorporated
- Robin O. Hoel
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
SRAM CELL ARRAY, DRIVING METHOD AND DEVICE THEREFOR, AND PROGRAM TH...
- Publication number 20250232806
- Publication date Jul 17, 2025
- Research & Business Foundation Sungkyunkwan University
- Jung-Hoon CHUN
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES WITH RC TRACKING AND METHODS FOR OPERATING THE SAME
- Publication number 20250232804
- Publication date Jul 17, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chien-Yuan Chen
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CIRCUITS WITH TRACKING CELLS AND METHODS FOR OPERATING THE SAME
- Publication number 20250232805
- Publication date Jul 17, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yumito Aoyagi
- G11 - INFORMATION STORAGE
Information Patent Application
Static Random Access Memory
- Publication number 20250234501
- Publication date Jul 17, 2025
- UNITED MICROELECTRONICS CORP.
- Yen-Hsueh Huang
- G11 - INFORMATION STORAGE
Information Patent Application
COMPUTATION IN MEMORY SYSTEM
- Publication number 20250226028
- Publication date Jul 10, 2025
- National Taiwan University
- Tsung-Te LIU
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
- Publication number 20250227907
- Publication date Jul 10, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jui-Wen Chang
- G11 - INFORMATION STORAGE
Information Patent Application
TIME MULTIPLEXING OF CLEANUP AND WRITE FOR SERIAL READ WRITE MEMORY
- Publication number 20250218506
- Publication date Jul 3, 2025
- QUALCOMM Incorporated
- Pradeep RAJ
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE, MEMORY SYSTEM, AND METHOD FOR DATA CALCULATION WITH...
- Publication number 20250218507
- Publication date Jul 3, 2025
- Yangtze Memory Technologies Co., Ltd.
- Yue Sheng
- G11 - INFORMATION STORAGE
Information Patent Application
Compute-in-Memory with Current Transition Detection
- Publication number 20250218475
- Publication date Jul 3, 2025
- QUALCOMM Incorporated
- Seohee KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPACT STATIC RANDOM-ACCESS MEMORY STRUCTURE
- Publication number 20250220869
- Publication date Jul 3, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ruey-Wen Chang
- G11 - INFORMATION STORAGE
Information Patent Application
DUAL RAIL MEMORY DEVICE
- Publication number 20250218505
- Publication date Jul 3, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- YEN-CHI CHOU
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME
- Publication number 20250218504
- Publication date Jul 3, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jhon Jhy Liaw
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE PERFORMING IN-MEMORY COMPUTING AND OPERATING METHOD T...
- Publication number 20250210103
- Publication date Jun 26, 2025
- Seoul National University R&DB Foundation
- Jae-Joon KIM
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor Device Including First and Second Clock Generators
- Publication number 20250210081
- Publication date Jun 26, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jaspal Singh Shah
- G11 - INFORMATION STORAGE
Information Patent Application
STATIC RANDOM ACCESS MEMORY DEVICE
- Publication number 20250212379
- Publication date Jun 26, 2025
- IMEC vzw
- Dawit Burusie Abdi
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY BITCELL WITH BALANCED DIFFUSION LAYOUT
- Publication number 20250210102
- Publication date Jun 26, 2025
- Intel Corporation
- Amlan Ghosh
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE PERFORMING IN-MEMORY COMPUTING
- Publication number 20250209026
- Publication date Jun 26, 2025
- Seoul National University R&DB Foundation
- Jae-Joon KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STACKED INTEGRATED CIRCUIT STRUCTURE AND MANUFACTURING METHOD THEREOF
- Publication number 20250212377
- Publication date Jun 26, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Rui-Teng CHANG
- G11 - INFORMATION STORAGE
Information Patent Application
DEVICE AND METHOD FOR TUNING THRESHOLD VOLTAGE
- Publication number 20250212380
- Publication date Jun 26, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chih-Hsuan Chen
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE PERFORMING IN-MEMORY COMPUTING AND OPERATING METHOD T...
- Publication number 20250210104
- Publication date Jun 26, 2025
- Seoul National University R&DB Foundation
- Jae-Joon KIM
- G11 - INFORMATION STORAGE
Information Patent Application
NONVOLATILE SRAM
- Publication number 20250210107
- Publication date Jun 26, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Perng-Fei Yuh
- G11 - INFORMATION STORAGE
Information Patent Application
LOW-POWER STATIC RANDOM ACCESS MEMORY
- Publication number 20250201300
- Publication date Jun 19, 2025
- UNTETHER AI CORPORATION
- Katsuyuki SATO
- G11 - INFORMATION STORAGE
Information Patent Application
CAPACITIVE NOISE COMPENSATION FOR A READ BITLINE IN A MACHINE MEMORY
- Publication number 20250201301
- Publication date Jun 19, 2025
- NVIDIA Corp.
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Application
FAST, ENERGY EFFICIENT CMOS 2P1R1W REGISTER FILE ARRAY USING HARVES...
- Publication number 20250201302
- Publication date Jun 19, 2025
- Metis Microsystems, LLC
- Azeez Bhavnagarwala
- G11 - INFORMATION STORAGE
Information Patent Application
THREE-DIMENSIONAL STACK OF HETEROGENEOUS MEMORY AND COMPUTE DIES
- Publication number 20250201778
- Publication date Jun 19, 2025
- Kepler Computing Inc.
- Sasikanth MANIPATRUNI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR CELL STRUCTURE
- Publication number 20250203838
- Publication date Jun 19, 2025
- Invention And Collaboration Laboratory, Inc.
- Chao-Chun LU
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM AND METHOD FOR IMPROVING SAFETY OF INTEGRATED CIRCUITS
- Publication number 20250201279
- Publication date Jun 19, 2025
- NXP B.V.
- Rishi Bhooshan
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES WITH BACKSIDE BOOST CAPACITOR AND METHODS FOR FORMIN...
- Publication number 20250201281
- Publication date Jun 19, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Nail Etkin Can Akkaya
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES WITH IMPROVED BIT LINE LOADING
- Publication number 20250201303
- Publication date Jun 19, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yi-Hsin NIEN
- G11 - INFORMATION STORAGE
Information Patent Application
PULSE SIGNAL GENERATOR TO REDUCE POWER CONSUMPTION OF SRAM AND SRAM...
- Publication number 20250191651
- Publication date Jun 12, 2025
- UIF (UNIVERSITY INDUSTRY FOUNDATION), YONSEI UNIVERSITY
- Seong Ook JUNG
- G11 - INFORMATION STORAGE

forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

SRAM with reconfigurable setting

SRAM performance optimization via transistor width and threshold vo...

Far end driver for memory clock

Memory circuit and method of operating same

FinFET SRAM cells with reduced fin pitch

Adaptive word line underdrive control for an in-memory compute oper...

Integrated circuits with single-functional-unit level integration o...

Reducing precharge current surge in digital compute in memory

Memory cell design

SRAM memory cell device comprising ferroelectric access and storage...

Arrangements of memory devices and methods of operating the memory...

Static random-access memory (SRAM) device including three-dimension...

Semiconductor storage device

Drive circuit with improved timing margin for memory device

Memory device including booster circuit for tracking word line

Memory bit cell for in-memory computation

Power level comparator with switching input

Power loss reduction in data storage arrays

Integrated circuit, system and method of forming the same

Bitcell supporting bit-write-mask function

Silicon-on-insulator semiconductor device with a static random acce...

Method and apparatus for performing a MAC operation in a memory array

Vertical interconnect elevator based on through silicon vias

Semiconductor device

Bit line pre-charge circuit for power management modes in multi ban...

Hierarchical memory architecture including on-chip multi-bank non-v...

Latch circuit formed by modified memory cells

Integrated circuit device and manufacturing method of the same

Latch-based storage circuits having efficient integrated circuit la...

SRAM repair system and method

Patents Applicationslast 30 patents

SRAM CELL ARRAY, DRIVING METHOD AND DEVICE THEREFOR, AND PROGRAM TH...

MEMORY DEVICES WITH RC TRACKING AND METHODS FOR OPERATING THE SAME

MEMORY CIRCUITS WITH TRACKING CELLS AND METHODS FOR OPERATING THE SAME

Static Random Access Memory

COMPUTATION IN MEMORY SYSTEM

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

TIME MULTIPLEXING OF CLEANUP AND WRITE FOR SERIAL READ WRITE MEMORY

MEMORY DEVICE, MEMORY SYSTEM, AND METHOD FOR DATA CALCULATION WITH...

Compute-in-Memory with Current Transition Detection

COMPACT STATIC RANDOM-ACCESS MEMORY STRUCTURE

DUAL RAIL MEMORY DEVICE

SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME

MEMORY DEVICE PERFORMING IN-MEMORY COMPUTING AND OPERATING METHOD T...

Semiconductor Device Including First and Second Clock Generators

STATIC RANDOM ACCESS MEMORY DEVICE

MEMORY BITCELL WITH BALANCED DIFFUSION LAYOUT

MEMORY DEVICE PERFORMING IN-MEMORY COMPUTING

STACKED INTEGRATED CIRCUIT STRUCTURE AND MANUFACTURING METHOD THEREOF

DEVICE AND METHOD FOR TUNING THRESHOLD VOLTAGE

MEMORY DEVICE PERFORMING IN-MEMORY COMPUTING AND OPERATING METHOD T...

NONVOLATILE SRAM

LOW-POWER STATIC RANDOM ACCESS MEMORY

CAPACITIVE NOISE COMPENSATION FOR A READ BITLINE IN A MACHINE MEMORY

FAST, ENERGY EFFICIENT CMOS 2P1R1W REGISTER FILE ARRAY USING HARVES...

THREE-DIMENSIONAL STACK OF HETEROGENEOUS MEMORY AND COMPUTE DIES

SEMICONDUCTOR CELL STRUCTURE

SYSTEM AND METHOD FOR IMPROVING SAFETY OF INTEGRATED CIRCUITS

MEMORY DEVICES WITH BACKSIDE BOOST CAPACITOR AND METHODS FOR FORMIN...

MEMORY DEVICES WITH IMPROVED BIT LINE LOADING

PULSE SIGNAL GENERATOR TO REDUCE POWER CONSUMPTION OF SRAM AND SRAM...