Multistable circuits

Industry

CPC
H03K3/038

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Parent Industries

HELECTRICITY H03Electronic circuits H03KPULSE TECHNIQUE H03K3/00Circuits for generating electric pulses Monostable, bistable or multistable circuits

Current Industry

H03K3/038Multistable circuits

Industries

Patents Grantslast 30 patents

Information Patent Grant
Load circuit of amplifier and driver circuit for supporting multipl...
- Patent number 11,831,285
- Issue date Nov 28, 2023
- M31 Technology Corporation
- Ching-Hsiang Chang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High performance fast Mux-D scan flip-flop
- Patent number 11,757,434
- Issue date Sep 12, 2023
- Intel Corporation
- Amit Agarwal
- G01 - MEASURING TESTING
Information Patent Grant
Semiconductor memory device and operating method thereof
- Patent number 11,640,843
- Issue date May 2, 2023
- SK Hynix Inc.
- Noh Hyup Kwak
- G11 - INFORMATION STORAGE
Information Patent Grant
Storage element with clock gating
- Patent number 11,463,074
- Issue date Oct 4, 2022
- Infineon Technologies AG
- Thomas Kuenemund
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High performance fast Mux-D scan flip-flop
- Patent number 11,296,681
- Issue date Apr 5, 2022
- Intel Corporation
- Amit Agarwal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Cross-phase detector based phase interpolator
- Patent number 11,218,140
- Issue date Jan 4, 2022
- Apple Inc.
- Jiaping Hu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuit aging detection sensor based on lookup table
- Patent number 11,085,962
- Issue date Aug 10, 2021
- Ningbo University
- Pengjun Wang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Double edge triggered Mux-D scan flip-flop
- Patent number 11,054,470
- Issue date Jul 6, 2021
- Intel Corporation
- Amit Agarwal
- G01 - MEASURING TESTING
Information Patent Grant
Clock multiplier
- Patent number 11,031,924
- Issue date Jun 8, 2021
- Nuvoton Technology Corporation
- Yuan-Po Cheng
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Load circuit of amplifier and driver circuit for supporting multipl...
- Patent number 10,886,882
- Issue date Jan 5, 2021
- M31 Technology Corporation
- Ching-Hsiang Chang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Double compression avoidance
- Patent number 10,804,889
- Issue date Oct 13, 2020
- International Business Machines Corporation
- Michael V. Koch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Double compression avoidance
- Patent number 10,298,217
- Issue date May 21, 2019
- International Business Machines Corporation
- Michael V. Koch
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Tri-stable storage loops
- Patent number 10,158,348
- Issue date Dec 18, 2018
- Northrop Grumman Systems Corporation
- Alexander L. Braun
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Three state latch
- Patent number 10,141,930
- Issue date Nov 27, 2018
- NVIDIA Corporation
- Andreas J. Gotterba
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Tri-state inverter, D latch and master-slave flip-flop comprising T...
- Patent number 10,110,203
- Issue date Oct 23, 2018
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Navneet Gupta
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Three state latch
- Patent number 10,009,027
- Issue date Jun 26, 2018
- NVIDIA Corporation
- Andreas J. Gotterba
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor chip and semiconductor device
- Patent number 9,762,244
- Issue date Sep 12, 2017
- RENESAS ELECTRONICS CORPORATION
- Tomoaki Isozaki
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Level-sensitive two-phase single-wire latch controllers without con...
- Patent number 9,698,784
- Issue date Jul 4, 2017
- Altera Corporation
- Dana How
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor chip and semiconductor device
- Patent number 9,099,330
- Issue date Aug 4, 2015
- Renesas Electronics Corporation
- Tomoaki Isozaki
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor chip and semiconductor device
- Patent number 8,350,593
- Issue date Jan 8, 2013
- Renesas Electronics Corporation
- Tomoaki Isozaki
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor chip and semiconductor device
- Patent number 7,902,873
- Issue date Mar 8, 2011
- Renesas Electronics Corporation
- Tomoaki Isozaki
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Sequential control circuit capable of sequencing through a number o...
- Patent number 4,105,928
- Issue date Aug 8, 1978
- Regie Nationale des Usines Renault
- Gilles Leconte
- B60 - VEHICLES IN GENERAL
Information Patent Grant
Automatic function setting and indication arrangement for a communi...
- Patent number 4,083,012
- Issue date Apr 4, 1978
- Loewe-Opta GmbH
- Willy Kanow
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
3766408
- Patent number 3,766,408
- Issue date Oct 16, 1973
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
3764919
- Patent number 3,764,919
- Issue date Oct 9, 1973
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
3581108
- Patent number 3,581,108
- Issue date May 25, 1971
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
3573438
- Patent number 3,573,438
- Issue date Apr 6, 1971
- G11 - INFORMATION STORAGE
Information Patent Grant
3535544
- Patent number 3,535,544
- Issue date Oct 20, 1970
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
3444470
- Patent number 3,444,470
- Issue date May 13, 1969
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
3437832
- Patent number 3,437,832
- Issue date Apr 8, 1969
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
HIGH PERFORMANCE FAST MUX-D SCAN FLIP-FLOP
- Publication number 20220224316
- Publication date Jul 14, 2022
- Intel Corporation
- Amit Agarwal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF
- Publication number 20220165346
- Publication date May 26, 2022
- SK HYNIX INC.
- Noh Hyup KWAK
- G11 - INFORMATION STORAGE
Information Patent Application
CLOCK MULTIPLIER
- Publication number 20210203313
- Publication date Jul 1, 2021
- Nuvoton Technology Corporation
- Yuan-Po Cheng
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DOUBLE EDGE TRIGGERED MUX-D SCAN FLIP-FLOP
- Publication number 20210194468
- Publication date Jun 24, 2021
- Intel Corporation
- Amit Agarwal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
HIGH PERFORMANCE FAST MUX-D SCAN FLIP-FLOP
- Publication number 20210194469
- Publication date Jun 24, 2021
- INTEL CORPORATION
- Amit Agarwal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
STORAGE ELEMENT WITH CLOCK GATING
- Publication number 20210143802
- Publication date May 13, 2021
- INFINEON TECHNOLOGIES AG
- Thomas Kuenemund
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LOAD CIRCUIT OF AMPLIFIER AND DRIVER CIRCUIT FOR SUPPORTING MULTIPL...
- Publication number 20210067113
- Publication date Mar 4, 2021
- M31 TECHNOLOGY CORPORATION
- CHING-HSIANG CHANG
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LOAD CIRCUIT OF AMPLIFIER AND DRIVER CIRCUIT FOR SUPPORTING MULTIPL...
- Publication number 20200252037
- Publication date Aug 6, 2020
- M31 TECHNOLOGY CORPORATION
- CHING-HSIANG CHANG
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CIRCUIT AGING DETECTION SENSOR BASED ON LOOKUP TABLE
- Publication number 20200142000
- Publication date May 7, 2020
- Ningbo University
- Pengjun WANG
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DOUBLE COMPRESSION AVOIDANCE
- Publication number 20190020333
- Publication date Jan 17, 2019
- International Business Machines Corporation
- Michael V. Koch
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DOUBLE COMPRESSION AVOIDANCE
- Publication number 20190020334
- Publication date Jan 17, 2019
- International Business Machines Corporation
- Michael V. Koch
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
THREE STATE LATCH
- Publication number 20170207783
- Publication date Jul 20, 2017
- NVIDIA Corporation
- Andreas J. GOTTERBA
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT WITH INTERNAL AND EXTERNAL VOLTAGE REGULATORS
- Publication number 20150378385
- Publication date Dec 31, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Manmohan Rana
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SEMICONDUCTOR CHIP AND SEMICONDUCTOR DEVICE
- Publication number 20150303924
- Publication date Oct 22, 2015
- RENESAS ELECTRONICS CORPORATION
- Tomoaki ISOZAKI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE STATE LATCH
- Publication number 20140354330
- Publication date Dec 4, 2014
- Andreas J. GOTTERBA
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SEMICONDUCTOR CHIP AND SEMICONDUCTOR DEVICE
- Publication number 20130154706
- Publication date Jun 20, 2013
- RENESAS ELECTRONICS CORPORATION
- Tomoaki ISOZAKI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR CHIP AND SEMICONDUCTOR DEVICE
- Publication number 20110133803
- Publication date Jun 9, 2011
- RENESAS ELECTRONICS CORPORATION
- Tomoaki ISOZAKI
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SEMICONDUCTOR CHIP AND SEMICONDUCTOR DEVICE
- Publication number 20070114571
- Publication date May 24, 2007
- NEC Electronics Corporation
- Tomoaki ISOZAKI
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Quaternary and trinary logic switching circuits
- Publication number 20050258863
- Publication date Nov 24, 2005
- Augustine W. Chang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
The trinary method for digital computing
- Publication number 20040075466
- Publication date Apr 22, 2004
- Vishal Soral
- G06 - COMPUTING CALCULATING COUNTING

Multistable circuits

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Load circuit of amplifier and driver circuit for supporting multipl...

High performance fast Mux-D scan flip-flop

Semiconductor memory device and operating method thereof

Storage element with clock gating

High performance fast Mux-D scan flip-flop

Cross-phase detector based phase interpolator

Circuit aging detection sensor based on lookup table

Double edge triggered Mux-D scan flip-flop

Clock multiplier

Load circuit of amplifier and driver circuit for supporting multipl...

Double compression avoidance

Double compression avoidance

Tri-stable storage loops

Three state latch

Tri-state inverter, D latch and master-slave flip-flop comprising T...

Three state latch

Semiconductor chip and semiconductor device

Level-sensitive two-phase single-wire latch controllers without con...

Semiconductor chip and semiconductor device

Semiconductor chip and semiconductor device

Semiconductor chip and semiconductor device

Sequential control circuit capable of sequencing through a number o...

Automatic function setting and indication arrangement for a communi...

3766408

3764919

3581108

3573438

3535544

3444470

3437832

Patents Applicationslast 30 patents

HIGH PERFORMANCE FAST MUX-D SCAN FLIP-FLOP

SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF

CLOCK MULTIPLIER

DOUBLE EDGE TRIGGERED MUX-D SCAN FLIP-FLOP

HIGH PERFORMANCE FAST MUX-D SCAN FLIP-FLOP

STORAGE ELEMENT WITH CLOCK GATING

LOAD CIRCUIT OF AMPLIFIER AND DRIVER CIRCUIT FOR SUPPORTING MULTIPL...

LOAD CIRCUIT OF AMPLIFIER AND DRIVER CIRCUIT FOR SUPPORTING MULTIPL...

CIRCUIT AGING DETECTION SENSOR BASED ON LOOKUP TABLE

DOUBLE COMPRESSION AVOIDANCE

DOUBLE COMPRESSION AVOIDANCE

THREE STATE LATCH

INTEGRATED CIRCUIT WITH INTERNAL AND EXTERNAL VOLTAGE REGULATORS

SEMICONDUCTOR CHIP AND SEMICONDUCTOR DEVICE

THREE STATE LATCH

SEMICONDUCTOR CHIP AND SEMICONDUCTOR DEVICE

SEMICONDUCTOR CHIP AND SEMICONDUCTOR DEVICE

SEMICONDUCTOR CHIP AND SEMICONDUCTOR DEVICE

Quaternary and trinary logic switching circuits

The trinary method for digital computing