of a plurality of bump connectors

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CPC
H01L2224/14

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HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00

Current Industry

H01L2224/14of a plurality of bump connectors

Industries

Patents Grantslast 30 patents

Information Patent Grant
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Information Patent Grant
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Information Patent Grant
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- Chenxi Huang
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Information Patent Grant
Package structure and method of fabricating the same
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- Issue date May 13, 2025
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- Yi-Wen Wu
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Information Patent Grant
Electronic device, package structure and electronic manufacturing m...
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Information Patent Grant
Substrate and package structure
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Information Patent Grant
Semiconductor package and method of forming thereof
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Information Patent Grant
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Information Patent Grant
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Information Patent Grant
Polyimide profile control
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Information Patent Grant
Electronic package and method of forming the same
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- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Copper wire bond on gold bump on semiconductor die bond pad
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- Lin Zhang
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Information Patent Grant
Display substrate and display device
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Information Patent Grant
Integrated fan-out package with 3D magnetic core inductor
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Information Patent Grant
IC device with chip to package interconnects from a copper metal in...
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- Issue date Mar 25, 2025
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Information Patent Grant
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- Patent number 12,255,278
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- NUVOTON TECHNOLOGY CORPORATION JAPAN
- Yasumitsu Kunoh
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Information Patent Grant
Semiconductor package including heat dissipation layer
- Patent number 12,255,183
- Issue date Mar 18, 2025
- SK hynix Inc.
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Information Patent Grant
Integrated structure with bifunctional routing and assembly compris...
- Patent number 12,249,572
- Issue date Mar 11, 2025
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
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Information Patent Grant
Semiconductor device and method
- Patent number 12,243,837
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Information Patent Grant
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Information Patent Grant
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Information Patent Grant
Multi-chip package with high density interconnects
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Information Patent Grant
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- Ming-Fa Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package and method of manufacturing semiconductor pac...
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- Issue date Feb 4, 2025
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- Moonyong Jang
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Information Patent Grant
Barrier structures between external electrical connectors
- Patent number 12,218,035
- Issue date Feb 4, 2025
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- Chia-Chun Miao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Camera module, and photosensitive assembly and manufacturing method...
- Patent number 12,211,864
- Issue date Jan 28, 2025
- NINGBO SUNNY OPOTECH CO., LTD.
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- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
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STRESS MITIGATING PILLAR BUMPS
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- Publication date Jun 5, 2025
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Semiconductor Device and Method
- Publication number 20250183204
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- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Die Connection System and Method
- Publication number 20250174591
- Publication date May 29, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd.
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Information Patent Application
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VIAS WITH SELECTED GRAIN DISTRIBUTION
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- Ming-Fa CHEN
- H01 - BASIC ELECTRIC ELEMENTS
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Structure and Method for Fabricating a Computing System with an Int...
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- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE
- Publication number 20250167151
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- Samsung Electronics Co., Ltd.
- Chonghee LEE
- H01 - BASIC ELECTRIC ELEMENTS
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SEMICONDUCTOR PACKAGE WITH HIGH ROUTING DENSITY PATCH
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THREE-DIMENSIONAL CHIP STACK PREPARING METHOD AND THREE-DIMENSIONAL...
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SEMICONDUCTOR PACKAGE
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SEMICONDUCTOR PACKAGE
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- Jaekyung Yoo
- H01 - BASIC ELECTRIC ELEMENTS
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BUMP ARRANGEMENT OF INTEGRATED CIRCUITS FOR FLIP CHIP BONDING
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- Publication date May 1, 2025
- SYNAPTICS INCORPORATED
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- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE
- Publication number 20250140726
- Publication date May 1, 2025
- Samsung Electronics Co., Ltd.
- Kyunglyul LEE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE
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- Seokbeom Yong
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Information Patent Application
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- Yeohoon YOON
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Information Patent Application
MULTI-CHIP PACKAGE WITH HIGH DENSITY INTERCONNECTS
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- Intel Corporation
- Aleksandar Aleksov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
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MICROELECTRONIC ASSEMBLIES INCLUDING INTERCONNECTS WITH DIFFERENT S...
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- H01 - BASIC ELECTRIC ELEMENTS
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Information Patent Application
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Information Patent Application
Heterogeneous Semiconductor Interconnect Interfaces, Semiconductor...
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- JARIET TECHNOLOGIES, INC.
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- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
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- Publication number 20250112190
- Publication date Apr 3, 2025
- Intel Corporation
- Xiao Lu
- H01 - BASIC ELECTRIC ELEMENTS

of a plurality of bump connectors

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Memory package and a memory module including the memory package

Integrated circuit (IC) package with substrate having validation co...

Die attached leveling control by metal stopper bumps

Compact routing package for high frequency isolation

Semiconductor device and semiconductor package

Structures to increase substrate routing density and methods of for...

Package structure and method of fabricating the same

Electronic device, package structure and electronic manufacturing m...

Substrate and package structure

Semiconductor package and method of forming thereof

Chip socket, testing fixture and chip testing method thereof

Semiconductor chip with signal bump and dummy bump, semiconductor p...

Polyimide profile control

Semiconductor device including re-distribution pads disposed at dif...

Electronic package and method of forming the same

Copper wire bond on gold bump on semiconductor die bond pad

Display substrate and display device

Integrated fan-out package with 3D magnetic core inductor

IC device with chip to package interconnects from a copper metal in...

Semiconductor light emitting element and semiconductor light emitti...

Semiconductor package including heat dissipation layer

Integrated structure with bifunctional routing and assembly compris...

Semiconductor device and method

Alternative surfaces for conductive pad layers of silicon bridges f...

Semiconductor package including adhesive layer and method for manuf...

Multi-chip package with high density interconnects

Semiconductor die connection system and method

Semiconductor package and method of manufacturing semiconductor pac...

Barrier structures between external electrical connectors

Camera module, and photosensitive assembly and manufacturing method...

Patents Applicationslast 30 patents

Multi-Layered Metal Frame Power Package

STRESS MITIGATING PILLAR BUMPS

Semiconductor Device and Method

Semiconductor Die Connection System and Method

SEMICONDUCTOR STRUCTURE WITH BURIED POWER RAILS AND METHOD OF FABRI...

3D INTEGRATED CIRCUIT PACKAGE AND SUBSTRATE STRUCTURE THEREOF

VIAS WITH SELECTED GRAIN DISTRIBUTION

OPTICAL PACKAGE STRUCTURE, PACKAGE STRUCTURE, AND METHOD FOR FORMIN...

Structure and Method for Fabricating a Computing System with an Int...

SEMICONDUCTOR PACKAGE

Wafer Level Integration of Passive Devices

SEMICONDUCTOR PACKAGE WITH HIGH ROUTING DENSITY PATCH

THREE-DIMENSIONAL CHIP STACK PREPARING METHOD AND THREE-DIMENSIONAL...

CHIP PACKAGE STRUCTURE, ELECTRONIC DEVICE, AND PACKAGING METHOD OF...

FLIP CHIP STRUCTURE AND CIRCUIT BOARD THEREOF

SEMICONDUCTOR PACKAGE

SEMICONDUCTOR PACKAGE

Multi-Die Fine Grain Integrated Voltage Regulation

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME

BUMP ARRANGEMENT OF INTEGRATED CIRCUITS FOR FLIP CHIP BONDING

SEMICONDUCTOR PACKAGE

SEMICONDUCTOR PACKAGE

SEMICONDUCTOR PACKAGE INCLUDING ADHESIVE LAYER AND METHOD FOR MANUF...

MULTI-CHIP PACKAGE WITH HIGH DENSITY INTERCONNECTS

SEMICONDUCTOR PACKAGE AND METHOD FOR MAKING THE SAME

MICROELECTRONIC ASSEMBLIES INCLUDING INTERCONNECTS WITH DIFFERENT S...

SEMICONDUCTOR STRUCTURE AND METHOD FOR FABRICATING THE SAME

Method for Forming Semiconductor Package and Semiconductor Package

Heterogeneous Semiconductor Interconnect Interfaces, Semiconductor...

SELF-DIFFUSING LIQUID METAL INTERCONNECT ARCHITECTURES ENABLING SNA...