of a plurality of bump connectors

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HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto

Current Industry

H01L24/17of a plurality of bump connectors

Industries

Patents Grantslast 30 patents

Information Patent Grant
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Information Patent Grant
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Information Patent Grant
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Information Patent Grant
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Information Patent Grant
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Information Patent Grant
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Information Patent Grant
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Information Patent Grant
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Information Patent Grant
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Information Patent Grant
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Information Patent Grant
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Information Patent Grant
Chip package structure with cavity in interposer
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Information Patent Grant
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- Issue date Oct 22, 2024
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- Chih-Kuang Kao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package structure with reinforcement structures in a redistribution...
- Patent number 12,119,303
- Issue date Oct 15, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated self-aligned assembly
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- Issue date Oct 15, 2024
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- Chia-Te Chou
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Information Patent Grant
Metal bonding structure and manufacturing method thereof
- Patent number 12,113,042
- Issue date Oct 8, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chun-Liang Lu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Micro through-silicon via for transistor density scaling
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- Issue date Oct 8, 2024
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- Bok Eng Cheah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-chip package and method of providing die-to-die interconnects...
- Patent number 12,113,026
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- Henning Braunisch
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Information Patent Grant
Semiconductor package and manufacturing method thereof
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- Issue date Oct 8, 2024
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Information Patent Grant
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Information Patent Grant
Uniform chip gaps via injection-molded solder pillars
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Information Patent Grant
Electronic device
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- Tzu-Min Yan
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Information Patent Grant
Offset interposers for large-bottom packages and large-die package-...
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- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package and method of fabricating the same
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- Issue date Sep 24, 2024
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- Young Lyong Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Image sensor with tolerance optimizing interconnects
- Patent number 12,100,716
- Issue date Sep 24, 2024
- DePuy Synthes Products, Inc.
- Laurent Blanquart
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

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SYSTEMS AND METHODS FOR ASSEMBLING PROCESSOR SYSTEMS
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- 1372934 B.C. Ltd.
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HYBRID MICRO-BUMP INTEGRATION WITH REDISTRIBUTION LAYER
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METAL BONDING STRUCTURE AND MANUFACTURING METHOD THEREOF
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Information Patent Application
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
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- JING-CHENG LIN
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SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME
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SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME
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- H01 - BASIC ELECTRIC ELEMENTS
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SEMICONDUCTOR PACKAGE STRUCTURE
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DIE STACKS AND METHODS FORMING SAME
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PACKAGE STRUCTURE
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- Po-Hao Tsai
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- Bernd WAIDHAS
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- H01 - BASIC ELECTRIC ELEMENTS
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- Owen R. FAY
- H01 - BASIC ELECTRIC ELEMENTS
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- Adel A. Elsherbini
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Information Patent Application
SEMICONDUCTOR PACKAGE
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- Publication date Oct 24, 2024
- Samsung Electronics Co., Ltd.
- Hyeonseok LEE
- H01 - BASIC ELECTRIC ELEMENTS

of a plurality of bump connectors

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Electrical interconnect bridge

Bonding structures and methods for forming the same

Active bridge enabled co-packaged photonic transceiver

Semiconductor device assembly with die support structures

Forming large chips through stitching

Multi-die ultrafine pitch patch architecture of interconnect bridge...

Nested architectures for enhanced heterogeneous integration

Integrated fan-out package and the methods of manufacturing

Semiconductor package

Integrated circuit device with embedded programmable logic

Microelectronic assemblies

Method for fabricating semiconductor package

Bridge interconnection with layered interconnect structures

Semiconductor package including test bumps

Face-to-face through-silicon via multi-chip semiconductor apparatus...

RF devices with enhanced performance and methods of forming the sam...

Chip package structure with cavity in interposer

Semiconductor structure and method of forming the same

Package structure with reinforcement structures in a redistribution...

Integrated self-aligned assembly

Metal bonding structure and manufacturing method thereof

Micro through-silicon via for transistor density scaling

Multi-chip package and method of providing die-to-die interconnects...

Semiconductor package and manufacturing method thereof

Microelectronic assemblies

Uniform chip gaps via injection-molded solder pillars

Electronic device

Offset interposers for large-bottom packages and large-die package-...

Semiconductor package and method of fabricating the same

Image sensor with tolerance optimizing interconnects

Patents Applicationslast 30 patents

CIRCUIT BOARD DEVICE WITH INDUCTOR(S) FOR ROUTING POWER FROM A POWE...

THREE-DIMENSIONAL INTEGRATED CIRCUIT (3DIC) SYSTEMS WITH A HEAT SPR...

SYSTEMS AND METHODS FOR ASSEMBLING PROCESSOR SYSTEMS

SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME

MANUFACTURING METHOD OF SEMICONDUCTOR PACKAGE WITH THERMAL RELAXATI...

COMPUTING DEVICE AND COMPUTING SYSTEM INCLUDING THE SAME

SEMICONDUCTOR PACKAGE IN A STACK FORM

Semiconductor Device Package and Methods of Manufacture

HYBRID MICRO-BUMP INTEGRATION WITH REDISTRIBUTION LAYER

METAL BONDING STRUCTURE AND MANUFACTURING METHOD THEREOF

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME

Semiconductor Device and Method of Manufacture

METHODS AND SYSTEMS FOR MEASURING SEMICONDUCTOR DEVICES

SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME

SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME

SEMICONDUCTOR PACKAGE STRUCTURE

INTEGRATED CIRCUIT PACKAGES HAVING MECHANICAL BRACE STANDOFFS

PACKAGE COMPRISING A PACKAGE SUBSTRATE THAT INCLUDES AN ENCAPSULATE...

SEMICONDUCTOR DEVICE

COAXIAL THROUGH VIA WITH NOVEL HIGH ISOLATION CROSS COUPLING METHOD...

DIE STACKS AND METHODS FORMING SAME

INTEGRATED CIRCUIT COMPONENT AND PACKAGE STRUCTURE HAVING THE SAME

PACKAGE STRUCTURE

RF ANTENNA MODULE USING COPPER-TO-COPPER INTERCONNECTS BETWEEN THE...

STACKED INTEGRATED CIRCUIT DEVICE INCLUDING INTEGRATED CAPACITOR DE...

PACKAGE COMPRISING A PACKAGE SUBSTRATE THAT INCLUDES AN ENCAPSULATE...

THREE-DIMENSIONAL STACKING SEMICONDUCTOR ASSEMBLIES WITH NEAR ZERO...

MICROELECTRONIC ASSEMBLIES WITH COMMUNICATION NETWORKS

POWER DELIVERY FOR EMBEDDED BRIDGE DIE UTILIZING TRENCH STRUCTURES

SEMICONDUCTOR PACKAGE