Pipelined decoder implementations

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H03M13/1555

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HELECTRICITY H03Electronic circuits H03MCODING DECODING CODE CONVERSION IN GENERAL H03M13/00Coding, decoding or code conversion, for error detection or error correction Coding theory basic assumptions Coding bounds Error probability evaluation methods Channel models Simulation or testing of codes

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H03M13/1555Pipelined decoder implementations

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Decoding method, memory storage device and memory control circuit unit
- Patent number 11,962,328
- Issue date Apr 16, 2024
- Phison Electronics Corp.
- Shih-Jia Zeng
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for providing a joint error correction code fo...
- Patent number 11,438,017
- Issue date Sep 6, 2022
- Infineon Technologies AG
- Dirk Hammerschmidt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Turbo product polar coding with hard decision cleaning
- Patent number 10,998,922
- Issue date May 4, 2021
- Mitsubishi Electric Research Laboratories, Inc.
- Toshiaki Koike-Akino
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for providing a joint error correction code fo...
- Patent number 10,931,314
- Issue date Feb 23, 2021
- Infineon Technologies AG
- Dirk Hammerschmidt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reed solomon decoder and semiconductor device including the same
- Patent number 10,879,933
- Issue date Dec 29, 2020
- SK Hynix Inc.
- Hyunho Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Data dependency mitigation in decoder architecture for generalized...
- Patent number 10,439,649
- Issue date Oct 8, 2019
- SK Hynix Inc.
- Naveen Kumar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for providing a joint error correction code fo...
- Patent number 10,298,271
- Issue date May 21, 2019
- Infineon Technologies AG
- Dirk Hammerschmidt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipelined architecture for iterative decoding of product codes
- Patent number 9,564,925
- Issue date Feb 7, 2017
- International Business Machines Corporation
- Steven R. Bentley
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Reed-solomon decoder and reception apparatus
- Patent number 9,077,382
- Issue date Jul 7, 2015
- Kabushiki Kaisha Toshiba
- Koichiro Ban
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory controller and operating method of memory controller
- Patent number 9,043,677
- Issue date May 26, 2015
- Samsung Electronics Co., Ltd.
- JaePhil Kong
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuitry and method for forward error correction
- Patent number 9,009,577
- Issue date Apr 14, 2015
- Xilinx, Inc.
- Hai-Jo Tarn
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Pipelined turbo convolution code decoder
- Patent number 9,003,266
- Issue date Apr 7, 2015
- Xilinx, Inc.
- Colin Stirling
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Architecture and control of reed-solomon error-correction decoding
- Patent number 8,788,916
- Issue date Jul 22, 2014
- Marvell International Ltd.
- Siu-Hung Fred Au
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory controller and operating method of memory controller
- Patent number 8,667,369
- Issue date Mar 4, 2014
- Samsung Electronics Co., Ltd.
- JaePhil Kong
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Architecture and control of Reed-Solomon list decoding
- Patent number 8,635,513
- Issue date Jan 21, 2014
- Marvell International Ltd.
- Siu-Hung Fred Au
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Architecture and control of reed-solomon error identification and e...
- Patent number 8,527,850
- Issue date Sep 3, 2013
- Marvell International Ltd.
- Ichiro Kikuchi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Systems and methods for performing forward error correction
- Patent number 8,522,116
- Issue date Aug 27, 2013
- Marvell Israel (M.I.S.L) Ltd.
- Oren Shafrir
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Chien search device and Chien search method
- Patent number 8,418,028
- Issue date Apr 9, 2013
- Kabushiki Kaisha Toshiba
- Akira Yamaga
- G11 - INFORMATION STORAGE
Information Patent Grant
BCH data correction system and method
- Patent number 8,397,144
- Issue date Mar 12, 2013
- Integrated Device Technology, Inc.
- Christopher I. W. Norrie
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method of distributive ECC processing
- Patent number 8,392,807
- Issue date Mar 5, 2013
- SanDisk Technologies Inc.
- Jayaprakash Naradasi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Architecture and control of Reed-Solomon error-correction decoding
- Patent number 8,296,635
- Issue date Oct 23, 2012
- Marvell International Ltd.
- Siu-Hung Fred Au
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Polynomial division
- Patent number 8,261,176
- Issue date Sep 4, 2012
- Sandisk IL Ltd.
- Idan Alrod
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Architecture and control of reed-solomon error identification and e...
- Patent number 8,245,118
- Issue date Aug 14, 2012
- Marvell International Ltd.
- Ichiro Kikuchi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Architecture and control of reed-solomon error-correction decoding
- Patent number 8,219,894
- Issue date Jul 10, 2012
- Marvell International Ltd.
- Siu-Hung Fred Au
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Architecture and control of Reed-Solomon error-correction decoding
- Patent number 8,132,082
- Issue date Mar 6, 2012
- Marvell International Ltd.
- Siu-Hung Fred Au
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Architecture and control of reed-solomon list decoding
- Patent number 8,132,083
- Issue date Mar 6, 2012
- Marvell International Ltd.
- Siu-Hung Fred Au
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Reed Solomon decoding of signals having variable input data rates
- Patent number 7,987,412
- Issue date Jul 26, 2011
- Alphion Corporation
- Ganesh Lakshminarayana
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Low area architecture in BCH decoder
- Patent number 7,823,050
- Issue date Oct 26, 2010
- LSICorporation
- Elyar E. Gasanov
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Decoding with a concatenated error correcting code
- Patent number 7,810,015
- Issue date Oct 5, 2010
- STMicroelectronics S.A.
- Laurent Paumier
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Error correction code decoder
- Patent number 7,805,662
- Issue date Sep 28, 2010
- Sunplus Technology Co., Ltd.
- Ching-Wen Ma
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
DECODING METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT
- Publication number 20240128987
- Publication date Apr 18, 2024
- PHISON ELECTRONICS CORP.
- Shih-Jia Zeng
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Systems and Methods for Transmitting Streaming Symbols using Instan...
- Publication number 20230261786
- Publication date Aug 17, 2023
- California Institute of Technology
- Nian Guo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DECODING METHOD AND APPARATUS BASED ON POLAR CODE IN COMMUNICATION...
- Publication number 20220271778
- Publication date Aug 25, 2022
- ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
- Gi Yoon PARK
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD AND APPARATUS FOR PROVIDING A JOINT ERROR CORRECTION CODE FO...
- Publication number 20210175906
- Publication date Jun 10, 2021
- INFINEON TECHNOLOGIES AG
- Dirk HAMMERSCHMIDT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REED SOLOMON DECODER AND SEMICONDUCTOR DEVICE INCLUDING THE SAME
- Publication number 20190319643
- Publication date Oct 17, 2019
- SK HYNIX INC.
- Hyunho KIM
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD AND APPARATUS FOR PROVIDING A JOINT ERROR CORRECTION CODE FO...
- Publication number 20190199376
- Publication date Jun 27, 2019
- INFINEON TECHNOLOGIES AG
- Dirk Hammerschmidt
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Turbo Product Polar Coding with Hard Decision Cleaning
- Publication number 20190036550
- Publication date Jan 31, 2019
- Mitsubishi Electric Research Laboratories, Inc.
- Toshiaki Koike-Akino
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DECODER FOR A MEMORY DEVICE, MEMORY DEVICE AND METHOD OF DECODING A...
- Publication number 20150311920
- Publication date Oct 29, 2015
- Agency for Science, Technology and Research
- Xueqiang Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CONTROLLER AND OPERATING METHOD OF MEMORY CONTROLLER
- Publication number 20140181589
- Publication date Jun 26, 2014
- Samsung Electronics Co., Ltd.
- JaePhil KONG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CONTROLLER AND OPERATING METHOD OF MEMORY CONTROLLER
- Publication number 20120290896
- Publication date Nov 15, 2012
- JaePhil KONG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARCHITECTURE AND CONTROL OF REED-SOLOMON ERROR-CORRECTION DECODING
- Publication number 20120284588
- Publication date Nov 8, 2012
- Siu-Hung Fred Au
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
REED-SOLOMON DECODER AND RECEPTION APPARATUS
- Publication number 20120254704
- Publication date Oct 4, 2012
- Kabushiki Kaisha Toshiba
- Koichiro BAN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ERROR CHECKING AND CORRECTING CIRCUIT, MEMORY SYSTEM COMPISING ERRO...
- Publication number 20120144261
- Publication date Jun 7, 2012
- Samsung Electronics Co., Ltd.
- Ju-Hyung Hong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARCHITECTURE AND CONTROL OF REED-SOLOMON ERROR-CORRECTION DECODING
- Publication number 20120137197
- Publication date May 31, 2012
- Siu-Hung Fred Au
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Systems and Methods for Performing Forward Error Correction
- Publication number 20120036415
- Publication date Feb 9, 2012
- Oren Shafrir
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEM AND METHOD OF DISTRIBUTIVE ECC PROCESSING
- Publication number 20120023384
- Publication date Jan 26, 2012
- SANDISK CORPORATION
- JAYAPRAKASH NARADASI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CHIEN SEARCH DEVICE AND CHIEN SEARCH METHOD
- Publication number 20110047441
- Publication date Feb 24, 2011
- Kabushiki Kaisha Toshiba
- Akira Yamaga
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POLYNOMIAL DIVISION
- Publication number 20100332956
- Publication date Dec 30, 2010
- SANDISK IL LTD.
- IDAN ALROD
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ARCHITECTURE AND CONTROL OF REED-SOLOMON ERROR IDENTIFICATION AND E...
- Publication number 20090292976
- Publication date Nov 26, 2009
- Marvell International Ltd.
- Ichiro Kikuchi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ARCHITECTURE AND CONTROL OF REED-SOLOMON ERROR-CORRECTION DECODING
- Publication number 20090083608
- Publication date Mar 26, 2009
- Marvell International Ltd.
- Siu-Hung Fred Au
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ARCHITECTURE AND CONTROL OF REED-SOLOMON ERROR-CORRECTION DECODING
- Publication number 20090063937
- Publication date Mar 5, 2009
- Marvell International Ltd.
- Siu-Hung Fred Au
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ARCHITECTURE AND CONTROL OF REED-SOLOMON LIST DECODING
- Publication number 20090055717
- Publication date Feb 26, 2009
- Marvell International Ltd.
- Siu-Hung Fred Au
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Low Area Architecture in BCH Decoder
- Publication number 20080155381
- Publication date Jun 26, 2008
- LSI Logic Corporation
- Elyar E. Gasanov
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
REED SOLOMON DECODING OF SIGNALS HAVING VARIABLE INPUT DATA RATES
- Publication number 20070300137
- Publication date Dec 27, 2007
- Alphion Corporation
- Ganesh Lakshminarayana
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Error correction code decoder
- Publication number 20070204207
- Publication date Aug 30, 2007
- Sunplus Technology Co., Ltd.
- Ching-Wen Ma
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DECODING WITH A CONCATENATED ERROR CORRECTING CODE
- Publication number 20070198896
- Publication date Aug 23, 2007
- STMicroelectronics S.A.
- Laurent Paumier
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Reed-Solomon decoding apparatus and method having high error correc...
- Publication number 20070157068
- Publication date Jul 5, 2007
- Electronics and Telecommunications Research Institute.
- Joon-Young Jung
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Memory device for use in high-speed block pipelined reed-solomon de...
- Publication number 20060184863
- Publication date Aug 17, 2006
- Hyung-Joon Kwon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and apparatus for error correction of transparent GFP (gene...
- Publication number 20060041826
- Publication date Feb 23, 2006
- Santanu Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Decoding device and decoding method
- Publication number 20060031742
- Publication date Feb 9, 2006
- Matsushita Electric Industrial Co., Ltd.
- Toshihiko Fukuoka
- H03 - BASIC ELECTRONIC CIRCUITRY

Pipelined decoder implementations

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Decoding method, memory storage device and memory control circuit unit

Method and apparatus for providing a joint error correction code fo...

Turbo product polar coding with hard decision cleaning

Method and apparatus for providing a joint error correction code fo...

Reed solomon decoder and semiconductor device including the same

Data dependency mitigation in decoder architecture for generalized...

Method and apparatus for providing a joint error correction code fo...

Pipelined architecture for iterative decoding of product codes

Reed-solomon decoder and reception apparatus

Memory controller and operating method of memory controller

Circuitry and method for forward error correction

Pipelined turbo convolution code decoder

Architecture and control of reed-solomon error-correction decoding

Memory controller and operating method of memory controller

Architecture and control of Reed-Solomon list decoding

Architecture and control of reed-solomon error identification and e...

Systems and methods for performing forward error correction

Chien search device and Chien search method

BCH data correction system and method

System and method of distributive ECC processing

Architecture and control of Reed-Solomon error-correction decoding

Polynomial division

Architecture and control of reed-solomon error identification and e...

Architecture and control of reed-solomon error-correction decoding

Architecture and control of Reed-Solomon error-correction decoding

Architecture and control of reed-solomon list decoding

Reed Solomon decoding of signals having variable input data rates

Low area architecture in BCH decoder

Decoding with a concatenated error correcting code

Error correction code decoder

Patents Applicationslast 30 patents

DECODING METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT

Systems and Methods for Transmitting Streaming Symbols using Instan...

DECODING METHOD AND APPARATUS BASED ON POLAR CODE IN COMMUNICATION...

METHOD AND APPARATUS FOR PROVIDING A JOINT ERROR CORRECTION CODE FO...

REED SOLOMON DECODER AND SEMICONDUCTOR DEVICE INCLUDING THE SAME

METHOD AND APPARATUS FOR PROVIDING A JOINT ERROR CORRECTION CODE FO...

Turbo Product Polar Coding with Hard Decision Cleaning

DECODER FOR A MEMORY DEVICE, MEMORY DEVICE AND METHOD OF DECODING A...

MEMORY CONTROLLER AND OPERATING METHOD OF MEMORY CONTROLLER

MEMORY CONTROLLER AND OPERATING METHOD OF MEMORY CONTROLLER

ARCHITECTURE AND CONTROL OF REED-SOLOMON ERROR-CORRECTION DECODING

REED-SOLOMON DECODER AND RECEPTION APPARATUS

ERROR CHECKING AND CORRECTING CIRCUIT, MEMORY SYSTEM COMPISING ERRO...

ARCHITECTURE AND CONTROL OF REED-SOLOMON ERROR-CORRECTION DECODING

Systems and Methods for Performing Forward Error Correction

SYSTEM AND METHOD OF DISTRIBUTIVE ECC PROCESSING

CHIEN SEARCH DEVICE AND CHIEN SEARCH METHOD

POLYNOMIAL DIVISION

ARCHITECTURE AND CONTROL OF REED-SOLOMON ERROR IDENTIFICATION AND E...

ARCHITECTURE AND CONTROL OF REED-SOLOMON ERROR-CORRECTION DECODING

ARCHITECTURE AND CONTROL OF REED-SOLOMON ERROR-CORRECTION DECODING

ARCHITECTURE AND CONTROL OF REED-SOLOMON LIST DECODING

Low Area Architecture in BCH Decoder

REED SOLOMON DECODING OF SIGNALS HAVING VARIABLE INPUT DATA RATES

Error correction code decoder

DECODING WITH A CONCATENATED ERROR CORRECTING CODE

Reed-Solomon decoding apparatus and method having high error correc...

Memory device for use in high-speed block pipelined reed-solomon de...

Methods and apparatus for error correction of transparent GFP (gene...

Decoding device and decoding method