Process induced defects

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CPC
Y10S148/127

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YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10USPC classification Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10S148/00Metal treatment

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Y10S148/127Process induced defects

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Patents Grantslast 30 patents

Information Patent Grant
Method of controlling misfit dislocation
- Patent number 5,395,770
- Issue date Mar 7, 1995
- Shin-Etsu Handotai Co., Ltd.
- Katsuhiko Miki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making tapered poly profile for TFT device manufacturing
- Patent number 5,393,682
- Issue date Feb 28, 1995
- Taiwan Semiconductor Manufacturing Company
- Chwen-Ming Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating SOI substrate with uniform thin silicon film
- Patent number 5,240,883
- Issue date Aug 31, 1993
- Shin-Etsu Handotai Co., Ltd.
- Takao Abe
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for semiconductor isolation
- Patent number 5,192,706
- Issue date Mar 9, 1993
- Texas Instruments Incorporated
- Mark S. Rodder
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for producing a semiconductor device with a bulk-defect reg...
- Patent number 5,094,963
- Issue date Mar 10, 1992
- Fujitsu Limited
- Takao Hiraguchi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and a process for producing a semiconductor de...
- Patent number 4,970,568
- Issue date Nov 13, 1990
- Fujitsu Limited
- Takao Hiraguchi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gettering process with multi-step annealing and inert ion implantation
- Patent number 4,885,257
- Issue date Dec 5, 1989
- Kabushiki Kaisha Toshiba
- Yoshiaki Matsushita
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of standardizing and stabilizing semiconductor wafers
- Patent number 4,637,123
- Issue date Jan 20, 1987
- International Business Machines Corporation
- Victor Cazcarra
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing a semiconductor substrate having dielectric...
- Patent number 4,552,595
- Issue date Nov 12, 1985
- Oki Electric Industry Co., Ltd.
- Hiroshi Hoga
- H01 - BASIC ELECTRIC ELEMENTS

Process induced defects

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Method of controlling misfit dislocation

Method of making tapered poly profile for TFT device manufacturing

Method of fabricating SOI substrate with uniform thin silicon film

Method for semiconductor isolation

Process for producing a semiconductor device with a bulk-defect reg...

Semiconductor device and a process for producing a semiconductor de...

Gettering process with multi-step annealing and inert ion implantation

Method of standardizing and stabilizing semiconductor wafers

Method of manufacturing a semiconductor substrate having dielectric...

Patents Applicationslast 30 patents