Read-write circuits

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G11C11/419

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GPHYSICS G11Information storage G11CSTATIC STORES G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements Storage elements therefor

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G11C11/419Read-write circuits

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Patents Grantslast 30 patents

Information Patent Grant
Non-volatile static random access memory bit cells with ferroelectr...
- Patent number 12,176,023
- Issue date Dec 24, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Pirooz Parvarandeh
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive body bias management for an in-memory compute operation wh...
- Patent number 12,176,025
- Issue date Dec 24, 2024
- STMICROELECTRONICS INTERNATIONAL N.V.
- Harsh Rawat
- G11 - INFORMATION STORAGE
Information Patent Grant
Scalable analog PIM module, method of controlling analog PIM, signa...
- Patent number 12,174,595
- Issue date Dec 24, 2024
- SKAIChips Co., Ltd.
- Kang Yoon Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Static random access memory with a supplementary driver circuit and...
- Patent number 12,176,026
- Issue date Dec 24, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chih-Yu Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
PUF generators based on SRAM bit cells
- Patent number 12,177,370
- Issue date Dec 24, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Cormac Michael O'Connell
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuitry for power management assertion
- Patent number 12,170,108
- Issue date Dec 17, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Sanjeev Kumar Jain
- G11 - INFORMATION STORAGE
Information Patent Grant
Layout of static random access memory periphery circuit
- Patent number 12,171,092
- Issue date Dec 17, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yangsyu Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Electronic bistable circuit with third voltage to retain memory data
- Patent number 12,165,697
- Issue date Dec 10, 2024
- Japan Science and Technology Agency
- Satoshi Sugahara
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device including standard cells
- Patent number 12,165,701
- Issue date Dec 10, 2024
- Samsung Electronics Co., Ltd.
- Jaehyun Lim
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device
- Patent number 12,165,702
- Issue date Dec 10, 2024
- Renesas Electronics Corporation
- Kouji Satou
- G11 - INFORMATION STORAGE
Information Patent Grant
Ternary memory cell and memory device comprising same
- Patent number 12,165,699
- Issue date Dec 10, 2024
- UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)
- Kyung Rok Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory with FRAM and SRAM of IC
- Patent number 12,165,707
- Issue date Dec 10, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Han-Jong Chia
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM power savings and write assist
- Patent number 12,165,700
- Issue date Dec 10, 2024
- Advanced Micro Devices, Inc.
- Russell J. Schreiber
- G11 - INFORMATION STORAGE
Information Patent Grant
Static random access memory apparatus that maintains stable write p...
- Patent number 12,165,719
- Issue date Dec 10, 2024
- Kwangwoon University Industry-Academic Collaboration Foundation
- Hanwool Jeong
- G11 - INFORMATION STORAGE
Information Patent Grant
Concurrent memory access operations
- Patent number 12,159,664
- Issue date Dec 3, 2024
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Display apparatus and method of manufacturing the same
- Patent number 12,155,020
- Issue date Nov 26, 2024
- Seoul Semiconductor Co., Ltd.
- Motonobu Takeya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Current leakage management controller for reading from memory cells
- Patent number 12,148,464
- Issue date Nov 19, 2024
- Xilinx, Inc.
- Michael Tsivyan
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of operating an integrated circuit and integrated circuit
- Patent number 12,148,465
- Issue date Nov 19, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Shih-Lien Linus Lu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
At-speed synchronous write-through operation for testing two-port m...
- Patent number 12,148,490
- Issue date Nov 19, 2024
- Synopsys, Inc.
- Harold Pilo
- G11 - INFORMATION STORAGE
Information Patent Grant
Device signature based on trim and redundancy information
- Patent number 12,149,643
- Issue date Nov 19, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd
- Katherine H. Chiang
- G11 - INFORMATION STORAGE
Information Patent Grant
Configuration latch for programmable logic device
- Patent number 12,149,244
- Issue date Nov 19, 2024
- QuickLogic Corporation
- Ket Chong Yap
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with selective precharging
- Patent number 12,142,346
- Issue date Nov 12, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Ed McCombs
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory based compute-in-memory cell
- Patent number 12,131,776
- Issue date Oct 29, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Zheng-Jun Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and method of manufacturing the same
- Patent number 12,125,523
- Issue date Oct 22, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yi-Hsin Nien
- G11 - INFORMATION STORAGE
Information Patent Grant
Electronic device for configuring neural network
- Patent number 12,125,524
- Issue date Oct 22, 2024
- Samsung Electronics Co., Ltd.
- Jinseok Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory with bitcell power boosting
- Patent number 12,125,526
- Issue date Oct 22, 2024
- QUALCOMM Incorporated
- Chulmin Jung
- G11 - INFORMATION STORAGE
Information Patent Grant
Computational circuit with hierarchical accumulator
- Patent number 12,118,060
- Issue date Oct 15, 2024
- Tenstorrent Inc.
- Davor Capalija
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Variable delay word line enable
- Patent number 12,119,050
- Issue date Oct 15, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hyunsung Hong
- G11 - INFORMATION STORAGE
Information Patent Grant
Low voltage memory device
- Patent number 12,119,052
- Issue date Oct 15, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Mahmut Sinangil
- G11 - INFORMATION STORAGE
Information Patent Grant
Micro-LED display
- Patent number 12,118,926
- Issue date Oct 15, 2024
- Microsoft Technology Licensing, LLC
- Charles Walter Boecker
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY WITH CHARGE SHARING BITLINES
- Publication number 20240428851
- Publication date Dec 26, 2024
- Intel Corporation
- Amlan GHOSH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY ARRAY INCLUDING REPEATER BUFFER
- Publication number 20240428852
- Publication date Dec 26, 2024
- Brillnics Singapore Pte. Ltd.
- Kwuang-Han CHANG
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR STORAGE DEVICE
- Publication number 20240431088
- Publication date Dec 26, 2024
- SOCIONEXT INC.
- Masanobu HIROSE
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE
- Publication number 20240420760
- Publication date Dec 19, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Shih-Lien Linus LU
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND SYSTEMS TO INCREASE EFFICIENCY OF SRAM WTITE ASSIST SCHEME
- Publication number 20240412780
- Publication date Dec 12, 2024
- BIPRANGSHU SAHA
- G11 - INFORMATION STORAGE
Information Patent Application
COMPUTE-IN-MEMORY PROCESSOR SUPPORTING BOTH GENERAL-PURPOSE CPU AND...
- Publication number 20240412781
- Publication date Dec 12, 2024
- Northwestern University
- Jie Gu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SRAM INTERNAL DFT CIRCUIT WITHOUT OUTPUT HOLD DEGRADATION
- Publication number 20240412794
- Publication date Dec 12, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yoshisato Yokoyama
- G11 - INFORMATION STORAGE
Information Patent Application
FLY SHARED BIT LINE ON 4-CPP STATIC RANDOM ACCESS MEMORY (SRAM) CEL...
- Publication number 20240404588
- Publication date Dec 5, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yi-Hsin Nien
- G11 - INFORMATION STORAGE
Information Patent Application
DEVICE SIGNATURE BASED ON TRIM AND REDUNDANCY INFORMATION
- Publication number 20240396749
- Publication date Nov 28, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Katherine H. CHIANG
- G11 - INFORMATION STORAGE
Information Patent Application
Static Random Access Memory With Pre-Charge Circuit
- Publication number 20240397691
- Publication date Nov 28, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Po-Sheng WANG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY WITH DOUBLE REDUNDANCY
- Publication number 20240395320
- Publication date Nov 28, 2024
- QUALCOMM Incorporated
- Dhvani SHETH
- G11 - INFORMATION STORAGE
Information Patent Application
EMBEDDED MEMORY DEVICE AND OPERATING METHOD THEREOF
- Publication number 20240386946
- Publication date Nov 21, 2024
- Samsung Electronics Co., Ltd.
- Hyunjun Kim
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND METHOD OF OPERATING THE SAME
- Publication number 20240386949
- Publication date Nov 21, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chien-Yuan Chen
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
- Publication number 20240386945
- Publication date Nov 21, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yi-Hsin NIEN
- G11 - INFORMATION STORAGE
Information Patent Application
ADAPTIVE WORD LINE CONTROL CIRCUIT
- Publication number 20240386947
- Publication date Nov 21, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chien-Chen Lin
- G11 - INFORMATION STORAGE
Information Patent Application
LOGIC DRIVE USING STANDARD COMMODITY PROGRAMMABLE LOGIC IC CHIPS CO...
- Publication number 20240380401
- Publication date Nov 14, 2024
- iCometrue Company Ltd.
- Jin-Yuan Lee
- G11 - INFORMATION STORAGE
Information Patent Application
TRACKING WORST CASE MEMORY CELLS BY SUPPRESSING TRACKING WORDLINE V...
- Publication number 20240379154
- Publication date Nov 14, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yumito Aoyagi
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY BASED COMPUTE-IN-MEMORY CELL
- Publication number 20240379155
- Publication date Nov 14, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Zheng-Jun LIN
- G11 - INFORMATION STORAGE
Information Patent Application
THREE-PORT SRAM CELL AND LAYOUT METHOD
- Publication number 20240381612
- Publication date Nov 14, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jhon-Jhy Liaw
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE
- Publication number 20240371437
- Publication date Nov 7, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chia-Hao PAO
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT WITH EMBEDDED HIGH-DENSITY AND HIGH-CURRENT SRAM...
- Publication number 20240373618
- Publication date Nov 7, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jhon Jhy Liaw
- G11 - INFORMATION STORAGE
Information Patent Application
Robust Circuit for Negative Bit Line Generation in SRAM Cells
- Publication number 20240371436
- Publication date Nov 7, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Sanjeev Kumar Jain
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CELL ARRAY AND METHOD OF OPERATING SAME
- Publication number 20240371853
- Publication date Nov 7, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Shih-Lien Linus LU
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUITS INCLUDING BACKSIDE WIRING
- Publication number 20240363531
- Publication date Oct 31, 2024
- Samsung Electronics Co., Ltd.
- Soyeon Kim
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE INCLUDING DUAL CONTROL CIRCUITS
- Publication number 20240363158
- Publication date Oct 31, 2024
- Taiwan Semiconductor Manufacturing company Ltd.
- HIDEHIRO FUJIWARA
- G11 - INFORMATION STORAGE
Information Patent Application
DELTA-SIGMA MODULATOR-BASED VARIABLE-RESOLUTION ACTIVATION IN-MEMOR...
- Publication number 20240355383
- Publication date Oct 24, 2024
- Arizona Board of Regents on behalf of Arizona State University
- Arindam SANYAL
- G11 - INFORMATION STORAGE
Information Patent Application
LOW CONTENTION CURRENT CIRCUITS
- Publication number 20240356552
- Publication date Oct 24, 2024
- Intel Corporation
- Steven Hsu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEW WAS CELL FOR SRAM HIGH-R ISSUE IN ADVANCED TECHNOLOGY NODE
- Publication number 20240355384
- Publication date Oct 24, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yangsyu Lin
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND OPERATION TO REDUCE IMPACT OF PARASITIC WIRE RESI...
- Publication number 20240347104
- Publication date Oct 17, 2024
- Samsung Electronics Co., Ltd.
- Lava Kumar Pulluru
- G11 - INFORMATION STORAGE
Information Patent Application
RANDOM ACCESS MEMORY AND METHOD OF FABRICATING THE SAME
- Publication number 20240347105
- Publication date Oct 17, 2024
- Seoul National University R&DB Foundation
- Jae-Joon KIM
- G11 - INFORMATION STORAGE

Read-write circuits

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Non-volatile static random access memory bit cells with ferroelectr...

Adaptive body bias management for an in-memory compute operation wh...

Scalable analog PIM module, method of controlling analog PIM, signa...

Static random access memory with a supplementary driver circuit and...

PUF generators based on SRAM bit cells

Circuitry for power management assertion

Layout of static random access memory periphery circuit

Electronic bistable circuit with third voltage to retain memory data

Semiconductor device including standard cells

Semiconductor device

Ternary memory cell and memory device comprising same

Memory with FRAM and SRAM of IC

SRAM power savings and write assist

Static random access memory apparatus that maintains stable write p...

Concurrent memory access operations

Display apparatus and method of manufacturing the same

Current leakage management controller for reading from memory cells

Method of operating an integrated circuit and integrated circuit

At-speed synchronous write-through operation for testing two-port m...

Device signature based on trim and redundancy information

Configuration latch for programmable logic device

Memory device with selective precharging

Non-volatile memory based compute-in-memory cell

Memory device and method of manufacturing the same

Electronic device for configuring neural network

Memory with bitcell power boosting

Computational circuit with hierarchical accumulator

Variable delay word line enable

Low voltage memory device

Micro-LED display

Patents Applicationslast 30 patents

MEMORY WITH CHARGE SHARING BITLINES

MEMORY ARRAY INCLUDING REPEATER BUFFER

SEMICONDUCTOR STORAGE DEVICE

MEMORY DEVICE

METHODS AND SYSTEMS TO INCREASE EFFICIENCY OF SRAM WTITE ASSIST SCHEME

COMPUTE-IN-MEMORY PROCESSOR SUPPORTING BOTH GENERAL-PURPOSE CPU AND...

SRAM INTERNAL DFT CIRCUIT WITHOUT OUTPUT HOLD DEGRADATION

FLY SHARED BIT LINE ON 4-CPP STATIC RANDOM ACCESS MEMORY (SRAM) CEL...

DEVICE SIGNATURE BASED ON TRIM AND REDUNDANCY INFORMATION

Static Random Access Memory With Pre-Charge Circuit

MEMORY WITH DOUBLE REDUNDANCY

EMBEDDED MEMORY DEVICE AND OPERATING METHOD THEREOF

MEMORY DEVICE AND METHOD OF OPERATING THE SAME

MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME

ADAPTIVE WORD LINE CONTROL CIRCUIT

LOGIC DRIVE USING STANDARD COMMODITY PROGRAMMABLE LOGIC IC CHIPS CO...

TRACKING WORST CASE MEMORY CELLS BY SUPPRESSING TRACKING WORDLINE V...

NON-VOLATILE MEMORY BASED COMPUTE-IN-MEMORY CELL

THREE-PORT SRAM CELL AND LAYOUT METHOD

MEMORY DEVICE

INTEGRATED CIRCUIT WITH EMBEDDED HIGH-DENSITY AND HIGH-CURRENT SRAM...

Robust Circuit for Negative Bit Line Generation in SRAM Cells

MEMORY CELL ARRAY AND METHOD OF OPERATING SAME

INTEGRATED CIRCUITS INCLUDING BACKSIDE WIRING

MEMORY DEVICE INCLUDING DUAL CONTROL CIRCUITS

DELTA-SIGMA MODULATOR-BASED VARIABLE-RESOLUTION ACTIVATION IN-MEMOR...

LOW CONTENTION CURRENT CIRCUITS

NEW WAS CELL FOR SRAM HIGH-R ISSUE IN ADVANCED TECHNOLOGY NODE

MEMORY DEVICE AND OPERATION TO REDUCE IMPACT OF PARASITIC WIRE RESI...

RANDOM ACCESS MEMORY AND METHOD OF FABRICATING THE SAME