Read-write circuits

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G11C11/419

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GPHYSICS G11Information storage G11CSTATIC STORES G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements Storage elements therefor

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G11C11/419Read-write circuits

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Memory devices with improved bit line loading
- Patent number 12,260,903
- Issue date Mar 25, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yi-Hsin Nien
- G11 - INFORMATION STORAGE
Information Patent Grant
Testability circuit and read and write path decoupling circuit of SRAM
- Patent number 12,260,924
- Issue date Mar 25, 2025
- Shanghai Huali Integrated Circuit Corporation
- Zhenan Lai
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory devices with backside boost capacitor and methods for formin...
- Patent number 12,260,928
- Issue date Mar 25, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Nail Etkin Can Akkaya
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM with improved write performance and write operation method the...
- Patent number 12,260,905
- Issue date Mar 25, 2025
- UIF (University Industry Foundation), Yonsei University
- Seong Ook Jung
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with additional write bit lines
- Patent number 12,260,904
- Issue date Mar 25, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hidehiro Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile SRAM
- Patent number 12,254,923
- Issue date Mar 18, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Perng-Fei Yuh
- G11 - INFORMATION STORAGE
Information Patent Grant
Single bitline SRAM pixel and method for driving the same
- Patent number 12,249,299
- Issue date Mar 11, 2025
- OmniVision Technologies, Inc.
- Qing Qin
- G11 - INFORMATION STORAGE
Information Patent Grant
Write assist circuit for memory device
- Patent number 12,249,367
- Issue date Mar 11, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chia-Che Chung
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for reading memory
- Patent number 12,243,586
- Issue date Mar 4, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yuhsiang Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
In-memory compute array with integrated bias elements
- Patent number 12,243,584
- Issue date Mar 4, 2025
- STMICROELECTRONICS INTERNATIONAL N.V.
- Anuj Grover
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory write assist
- Patent number 12,243,585
- Issue date Mar 4, 2025
- Synopsys, Inc.
- M Sultan M Siddiqui
- G11 - INFORMATION STORAGE
Information Patent Grant
Low-power static random access memory
- Patent number 12,237,008
- Issue date Feb 25, 2025
- UNTETHER AI CORPORATION
- Katsuyuki Sato
- G11 - INFORMATION STORAGE
Information Patent Grant
Selective bit line clamping control for an in-memory compute operat...
- Patent number 12,237,007
- Issue date Feb 25, 2025
- STMICROELECTRONICS INTERNATIONAL N.V.
- Kedar Janardan Dhori
- G11 - INFORMATION STORAGE
Information Patent Grant
Three-dimensional (3-D) write assist scheme for memory cells
- Patent number 12,237,050
- Issue date Feb 25, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chih-Chieh Chiu
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for protecting a PUF generator
- Patent number 12,236,001
- Issue date Feb 25, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Shih-Lien Linus Lu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sense amplifier circuit, memory circuit, and sensing method thereof
- Patent number 12,237,009
- Issue date Feb 25, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Jui-Jen Wu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device including a word line with portions with different si...
- Patent number 12,230,318
- Issue date Feb 18, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd
- Yi-Hsin Nien
- G11 - INFORMATION STORAGE
Information Patent Grant
On-chip power regulation circuitry and regulation method thereof
- Patent number 12,230,351
- Issue date Feb 18, 2025
- MICLEDI MICRODISPLAYS BV
- Soeren Steudel
- G11 - INFORMATION STORAGE
Information Patent Grant
Column multiplexer circuitry
- Patent number 12,230,317
- Issue date Feb 18, 2025
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Masking circuit and pre-charge circuit applicable to content addres...
- Patent number 12,230,324
- Issue date Feb 18, 2025
- Realtek Semiconductor Corporation
- I-Hao Chiang
- G11 - INFORMATION STORAGE
Information Patent Grant
Pose estimation in extended reality systems
- Patent number 12,224,002
- Issue date Feb 11, 2025
- QUALCOMM Incorporated
- Wesley James Holland
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual port SRAM cell and method of designing the same
- Patent number 12,225,702
- Issue date Feb 11, 2025
- Samsung Electronics Co., Ltd.
- Eojin Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Modular memory architecture with more significant bit sub-array wor...
- Patent number 12,210,754
- Issue date Jan 28, 2025
- STMICROELECTRONICS INTERNATIONAL N.V.
- Praveen Kumar Verma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
SRAM with tracking circuitry for reducing active power
- Patent number 12,211,587
- Issue date Jan 28, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Tsung-Hsien Huang
- G11 - INFORMATION STORAGE
Information Patent Grant
Write assist circuit for static random-access memory (SRAM)
- Patent number 12,205,636
- Issue date Jan 21, 2025
- Samsung Electronics Co., Ltd.
- Poornima Venkatasubramanian
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory module with improved timing adaptivity of sensing amplification
- Patent number 12,205,635
- Issue date Jan 21, 2025
- M31 Technology Corporation
- Po-Yu Wu
- G11 - INFORMATION STORAGE
Information Patent Grant
Electronic circuits, memory devices, and methods for operating an e...
- Patent number 12,205,634
- Issue date Jan 21, 2025
- Taiwan Semiconductor Manufacturing Company Ltd.
- Wei-Cheng Wu
- G11 - INFORMATION STORAGE
Information Patent Grant
Timing control circuit of memory device with tracking word line and...
- Patent number 12,198,754
- Issue date Jan 14, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Xiu-Li Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit devices including a power distribution network a...
- Patent number 12,200,920
- Issue date Jan 14, 2025
- Samsung Electronics Co., Ltd.
- Inchan Hwang
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for noise injection for PUF generator characte...
- Patent number 12,200,148
- Issue date Jan 14, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Shih-Lien Linus Lu
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SRAM WITH TRACKING CIRCUITRY FOR REDUCING ACTIVE POWER
- Publication number 20250104753
- Publication date Mar 27, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tsung-Hsien HUANG
- G11 - INFORMATION STORAGE
Information Patent Application
TIMING CONTROL CIRCUIT OF MEMORY DEVICE WITH TRACKING WORD LINE AND...
- Publication number 20250104765
- Publication date Mar 27, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Xiu-Li YANG
- G11 - INFORMATION STORAGE
Information Patent Application
TIMING CONTROL CIRCUIT OF MEMORY DEVICE WITH TRACKING WORD LINE AND...
- Publication number 20250104766
- Publication date Mar 27, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Xiu-Li YANG
- G11 - INFORMATION STORAGE
Information Patent Application
CONNECTIONS OF BIT LINES AND WORD LINES IN STACKED MEMORY LAYERS TO...
- Publication number 20250095693
- Publication date Mar 20, 2025
- Intel Corporation
- Abhishek A. Sharma
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY DEVICE AND CONTROL METHOD
- Publication number 20250095715
- Publication date Mar 20, 2025
- Yangtze Memory Technologies Co., Ltd.
- Jianquan Jia
- G11 - INFORMATION STORAGE
Information Patent Application
NOVEL PUF GENERATORS BASED ON SRAM BIT CELLS
- Publication number 20250097056
- Publication date Mar 20, 2025
- Taiwan Semiconductor Manufacturing Co., LTD
- Cormac Michael O'Connell
- G11 - INFORMATION STORAGE
Information Patent Application
Turbo Mode SRAM for High Performance
- Publication number 20250087258
- Publication date Mar 13, 2025
- Taiwan Semiconductor Manufacturing Company Limited
- Michael Clinton
- G11 - INFORMATION STORAGE
Information Patent Application
SCALABLE ANALOG PIM MODULE, METHOD OF CONTROLLING ANALOG PIM, SIGNA...
- Publication number 20250085674
- Publication date Mar 13, 2025
- SKAIChips Co., Ltd.
- Kang Yoon LEE
- G11 - INFORMATION STORAGE
Information Patent Application
Multi-Transistor Bitcell Structure
- Publication number 20250078912
- Publication date Mar 6, 2025
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Application
STATIC RANDOM ACCESS MEMORY (SRAM) CELL WITH VARIABLE TOGGLE THRESH...
- Publication number 20250078913
- Publication date Mar 6, 2025
- GLOBALFOUNDRIES U.S. Inc.
- Xuemei Hui
- G11 - INFORMATION STORAGE
Information Patent Application
LOW POWER READ CIRCUIT FOR MULTI-BANK MEMORY
- Publication number 20250078915
- Publication date Mar 6, 2025
- MEDIATEK SINGAPORE PTE LTD
- Jaswinder Singh Sidhu
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND MANUFACTURING METHOD OF THE SAME
- Publication number 20250078878
- Publication date Mar 6, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Po-Sheng WANG
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR IDENTIFYING SELF-TIME AND BREAKPOINTS FOR MEMORY
- Publication number 20250078916
- Publication date Mar 6, 2025
- Synopsys, Inc.
- Prasanna NALAWAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTING IN MEMORY DEVICE SHARING CHARGES OF BIT LINES TO GENERATE...
- Publication number 20250078918
- Publication date Mar 6, 2025
- Korea University Research and Business Foundation
- Jongsun PARK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF OPERATING AN INTEGRATED CIRCUIT AND INTEGRATED CIRCUIT
- Publication number 20250078919
- Publication date Mar 6, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Shih-Lien Linus LU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SRAM CELL WITH WRITE-ASSIST TRANSISTORS
- Publication number 20250078917
- Publication date Mar 6, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hsin-Cheng LIN
- G11 - INFORMATION STORAGE
Information Patent Application
COMPUTING-IN-MEMORY CIRCUIT AND SRAM MEMORY DEVICE
- Publication number 20250069653
- Publication date Feb 27, 2025
- Institute of Microelectronics, Chinese Academy of Sciences
- Huaxiang YIN
- G11 - INFORMATION STORAGE
Information Patent Application
THREE-PORT SRAM CIRCUIT
- Publication number 20250069650
- Publication date Feb 27, 2025
- Shanghai Huali Integrated Circuit Corporation
- Pinhan CHEN
- G11 - INFORMATION STORAGE
Information Patent Application
BISTABLE CIRCUIT AND ELECTRONIC CIRCUIT
- Publication number 20250069651
- Publication date Feb 27, 2025
- Japan Science and Technology Agency
- Satoshi Sugahara
- G11 - INFORMATION STORAGE
Information Patent Application
TERNARY MEMORY CELL AND MEMORY DEVICE COMPRISING SAME
- Publication number 20250061940
- Publication date Feb 20, 2025
- UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)
- Kyung Rok Kim
- G11 - INFORMATION STORAGE
Information Patent Application
LAYOUT OF STATIC RANDOM ACCESS MEMORY PERIPHERY CIRCUIT
- Publication number 20250063712
- Publication date Feb 20, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yangsyu LIN
- G11 - INFORMATION STORAGE
Information Patent Application
ACTIVE INTERPOSER SYSTEM
- Publication number 20250061935
- Publication date Feb 20, 2025
- Rambus Inc.
- Dongyun LEE
- G11 - INFORMATION STORAGE
Information Patent Application
Circuitry for Power Management Assertion
- Publication number 20250061941
- Publication date Feb 20, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Sanjeev Kumar Jain
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND SYSTEM TO BALANCE GROUND BOUNCE
- Publication number 20250054537
- Publication date Feb 13, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hidehiro Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR CHIP AND SEMICONDUCTOR PACKAGE INCLUDING THE SEMICOND...
- Publication number 20250056813
- Publication date Feb 13, 2025
- Samsung Electronics Co., Ltd.
- Seulji Song
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE
- Publication number 20250054536
- Publication date Feb 13, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tao CHOU
- G11 - INFORMATION STORAGE
Information Patent Application
STRUCTURES OF SRAM CELL AND METHODS OF FABRICATING THE SAME
- Publication number 20250056785
- Publication date Feb 13, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Kuan-Chung Chiu
- G11 - INFORMATION STORAGE
Information Patent Application
PULSE GENERATOR AND MEMORY DEVICE COMPRISING THE SAME
- Publication number 20250046366
- Publication date Feb 6, 2025
- Samsung Electronics Co., Ltd.
- Kiryong KIM
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF
- Publication number 20250046367
- Publication date Feb 6, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Kao-Cheng Lin
- G11 - INFORMATION STORAGE
Information Patent Application
ELECTRONIC CIRCUIT
- Publication number 20250046365
- Publication date Feb 6, 2025
- Japan Science and Technology Agency
- Satoshi Sugahara
- G11 - INFORMATION STORAGE

Read-write circuits

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Memory devices with improved bit line loading

Testability circuit and read and write path decoupling circuit of SRAM

Memory devices with backside boost capacitor and methods for formin...

SRAM with improved write performance and write operation method the...

Memory device with additional write bit lines

Nonvolatile SRAM

Single bitline SRAM pixel and method for driving the same

Write assist circuit for memory device

Method for reading memory

In-memory compute array with integrated bias elements

Memory write assist

Low-power static random access memory

Selective bit line clamping control for an in-memory compute operat...

Three-dimensional (3-D) write assist scheme for memory cells

Method and apparatus for protecting a PUF generator

Sense amplifier circuit, memory circuit, and sensing method thereof

Memory device including a word line with portions with different si...

On-chip power regulation circuitry and regulation method thereof

Column multiplexer circuitry

Masking circuit and pre-charge circuit applicable to content addres...

Pose estimation in extended reality systems

Dual port SRAM cell and method of designing the same

Modular memory architecture with more significant bit sub-array wor...

SRAM with tracking circuitry for reducing active power

Write assist circuit for static random-access memory (SRAM)

Memory module with improved timing adaptivity of sensing amplification

Electronic circuits, memory devices, and methods for operating an e...

Timing control circuit of memory device with tracking word line and...

Integrated circuit devices including a power distribution network a...

Method and apparatus for noise injection for PUF generator characte...

Patents Applicationslast 30 patents

SRAM WITH TRACKING CIRCUITRY FOR REDUCING ACTIVE POWER

TIMING CONTROL CIRCUIT OF MEMORY DEVICE WITH TRACKING WORD LINE AND...

TIMING CONTROL CIRCUIT OF MEMORY DEVICE WITH TRACKING WORD LINE AND...

CONNECTIONS OF BIT LINES AND WORD LINES IN STACKED MEMORY LAYERS TO...

NON-VOLATILE MEMORY DEVICE AND CONTROL METHOD

NOVEL PUF GENERATORS BASED ON SRAM BIT CELLS

Turbo Mode SRAM for High Performance

SCALABLE ANALOG PIM MODULE, METHOD OF CONTROLLING ANALOG PIM, SIGNA...

Multi-Transistor Bitcell Structure

STATIC RANDOM ACCESS MEMORY (SRAM) CELL WITH VARIABLE TOGGLE THRESH...

LOW POWER READ CIRCUIT FOR MULTI-BANK MEMORY

MEMORY DEVICE AND MANUFACTURING METHOD OF THE SAME

TECHNIQUES FOR IDENTIFYING SELF-TIME AND BREAKPOINTS FOR MEMORY

COMPUTING IN MEMORY DEVICE SHARING CHARGES OF BIT LINES TO GENERATE...

METHOD OF OPERATING AN INTEGRATED CIRCUIT AND INTEGRATED CIRCUIT

SRAM CELL WITH WRITE-ASSIST TRANSISTORS

COMPUTING-IN-MEMORY CIRCUIT AND SRAM MEMORY DEVICE

THREE-PORT SRAM CIRCUIT

BISTABLE CIRCUIT AND ELECTRONIC CIRCUIT

TERNARY MEMORY CELL AND MEMORY DEVICE COMPRISING SAME

LAYOUT OF STATIC RANDOM ACCESS MEMORY PERIPHERY CIRCUIT

ACTIVE INTERPOSER SYSTEM

Circuitry for Power Management Assertion

METHOD AND SYSTEM TO BALANCE GROUND BOUNCE

SEMICONDUCTOR CHIP AND SEMICONDUCTOR PACKAGE INCLUDING THE SEMICOND...

MEMORY DEVICE

STRUCTURES OF SRAM CELL AND METHODS OF FABRICATING THE SAME

PULSE GENERATOR AND MEMORY DEVICE COMPRISING THE SAME

SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF

ELECTRONIC CIRCUIT