Read-write circuits

Industry

CPC
G11C11/419

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements Storage elements therefor

Current Industry

G11C11/419Read-write circuits

Industries

Patents Grantslast 30 patents

Information Patent Grant
SRAM with reconfigurable setting
- Patent number 12,362,011
- Issue date Jul 15, 2025
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Jean-Philippe Noel
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM performance optimization via transistor width and threshold vo...
- Patent number 12,362,009
- Issue date Jul 15, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Jhon Jhy Liaw
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive word line underdrive control for an in-memory compute oper...
- Patent number 12,354,644
- Issue date Jul 8, 2025
- STMICROELECTRONICS INTERNATIONAL N.V.
- Kedar Janardan Dhori
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuits with single-functional-unit level integration o...
- Patent number 12,354,650
- Issue date Jul 8, 2025
- The University of North Carolina at Charlotte
- Yong Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
Reducing precharge current surge in digital compute in memory
- Patent number 12,354,657
- Issue date Jul 8, 2025
- Mediatek Inc.
- Chetan Deshpande
- G11 - INFORMATION STORAGE
Information Patent Grant
Arrangements of memory devices and methods of operating the memory...
- Patent number 12,347,483
- Issue date Jul 1, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chien-Yuan Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Drive circuit with improved timing margin for memory device
- Patent number 12,340,838
- Issue date Jun 24, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Masaru Haraguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor storage device
- Patent number 12,342,520
- Issue date Jun 24, 2025
- SOCIONEXT INC.
- Masanobu Hirose
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory bit cell for in-memory computation
- Patent number 12,333,357
- Issue date Jun 17, 2025
- Apple Inc.
- Michael A. Dreesen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power loss reduction in data storage arrays
- Patent number 12,334,146
- Issue date Jun 17, 2025
- Apple Inc.
- Vivekanandan Venugopal
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit, system and method of forming the same
- Patent number 12,334,178
- Issue date Jun 17, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yen Lin Chung
- G11 - INFORMATION STORAGE
Information Patent Grant
Bitcell supporting bit-write-mask function
- Patent number 12,334,145
- Issue date Jun 17, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hidehiro Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device
- Patent number 12,327,585
- Issue date Jun 10, 2025
- Renesas Electronics Corporation
- Shunya Nagata
- G11 - INFORMATION STORAGE
Information Patent Grant
Bit line pre-charge circuit for power management modes in multi ban...
- Patent number 12,327,586
- Issue date Jun 10, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Sanjeev Kumar Jain
- G11 - INFORMATION STORAGE
Information Patent Grant
Latch circuit formed by modified memory cells
- Patent number 12,322,438
- Issue date Jun 3, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hua-Hsin Yu
- G11 - INFORMATION STORAGE
Information Patent Grant
Latch-based storage circuits having efficient integrated circuit la...
- Patent number 12,315,559
- Issue date May 27, 2025
- Samsung Electronics Co., Ltd.
- Kijun Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-port bitcell architecture
- Patent number 12,300,310
- Issue date May 13, 2025
- ARM Limited
- Vianney Antoine Choserot
- G11 - INFORMATION STORAGE
Information Patent Grant
Pre-charging bit lines through charge-sharing
- Patent number 12,300,312
- Issue date May 13, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Mahmut Sinangil
- G11 - INFORMATION STORAGE
Information Patent Grant
Temperature sensor circuits for integrated circuit devices
- Patent number 12,294,357
- Issue date May 6, 2025
- Samsung Electronics Co., Ltd.
- Darryl G. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Electronic device with buffered operation engine and method for per...
- Patent number 12,283,344
- Issue date Apr 22, 2025
- XCENA Inc.
- Ji Hun Choi
- G11 - INFORMATION STORAGE
Information Patent Grant
Low-power static random access memory
- Patent number 12,283,313
- Issue date Apr 22, 2025
- UNTETHER AI CORPORATION
- Katsuyuki Sato
- G11 - INFORMATION STORAGE
Information Patent Grant
Display apparatus and method of manufacturing the same
- Patent number 12,283,651
- Issue date Apr 22, 2025
- Seoul Semiconductor Co., Ltd.
- Motonobu Takeya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
SRAM-based cell for in-memory computing and hybrid computations/sto...
- Patent number 12,277,319
- Issue date Apr 15, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yu-Der Chih
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error handling device, semiconductor memory device including the sa...
- Patent number 12,277,987
- Issue date Apr 15, 2025
- SK Hynix Inc.
- Giseok Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of forming 3D stacked compute and memory with copper pillars
- Patent number 12,272,675
- Issue date Apr 8, 2025
- Kepler Computing Inc.
- Sasikanth Manipatruni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compact memory-in-pixel display structure
- Patent number 12,272,299
- Issue date Apr 8, 2025
- GLOBALFOUNDRIES U.S. Inc.
- Juhan Kim
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Memory devices with improved bit line loading
- Patent number 12,260,903
- Issue date Mar 25, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yi-Hsin Nien
- G11 - INFORMATION STORAGE
Information Patent Grant
Testability circuit and read and write path decoupling circuit of SRAM
- Patent number 12,260,924
- Issue date Mar 25, 2025
- Shanghai Huali Integrated Circuit Corporation
- Zhenan Lai
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory devices with backside boost capacitor and methods for formin...
- Patent number 12,260,928
- Issue date Mar 25, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Nail Etkin Can Akkaya
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM with improved write performance and write operation method the...
- Patent number 12,260,905
- Issue date Mar 25, 2025
- UIF (University Industry Foundation), Yonsei University
- Seong Ook Jung
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
SRAM CELL ARRAY, DRIVING METHOD AND DEVICE THEREFOR, AND PROGRAM TH...
- Publication number 20250232806
- Publication date Jul 17, 2025
- Research & Business Foundation Sungkyunkwan University
- Jung-Hoon CHUN
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES WITH RC TRACKING AND METHODS FOR OPERATING THE SAME
- Publication number 20250232804
- Publication date Jul 17, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chien-Yuan Chen
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CIRCUITS WITH TRACKING CELLS AND METHODS FOR OPERATING THE SAME
- Publication number 20250232805
- Publication date Jul 17, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yumito Aoyagi
- G11 - INFORMATION STORAGE
Information Patent Application
COMPUTATION IN MEMORY SYSTEM
- Publication number 20250226028
- Publication date Jul 10, 2025
- National Taiwan University
- Tsung-Te LIU
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
- Publication number 20250227907
- Publication date Jul 10, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jui-Wen Chang
- G11 - INFORMATION STORAGE
Information Patent Application
TIME MULTIPLEXING OF CLEANUP AND WRITE FOR SERIAL READ WRITE MEMORY
- Publication number 20250218506
- Publication date Jul 3, 2025
- QUALCOMM Incorporated
- Pradeep RAJ
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE, MEMORY SYSTEM, AND METHOD FOR DATA CALCULATION WITH...
- Publication number 20250218507
- Publication date Jul 3, 2025
- Yangtze Memory Technologies Co., Ltd.
- Yue Sheng
- G11 - INFORMATION STORAGE
Information Patent Application
Compute-in-Memory with Current Transition Detection
- Publication number 20250218475
- Publication date Jul 3, 2025
- QUALCOMM Incorporated
- Seohee KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DUAL RAIL MEMORY DEVICE
- Publication number 20250218505
- Publication date Jul 3, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- YEN-CHI CHOU
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE PERFORMING IN-MEMORY COMPUTING AND OPERATING METHOD T...
- Publication number 20250210103
- Publication date Jun 26, 2025
- Seoul National University R&DB Foundation
- Jae-Joon KIM
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY BITCELL WITH BALANCED DIFFUSION LAYOUT
- Publication number 20250210102
- Publication date Jun 26, 2025
- Intel Corporation
- Amlan Ghosh
- G11 - INFORMATION STORAGE
Information Patent Application
STACKED INTEGRATED CIRCUIT STRUCTURE AND MANUFACTURING METHOD THEREOF
- Publication number 20250212377
- Publication date Jun 26, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Rui-Teng CHANG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE PERFORMING IN-MEMORY COMPUTING AND OPERATING METHOD T...
- Publication number 20250210104
- Publication date Jun 26, 2025
- Seoul National University R&DB Foundation
- Jae-Joon KIM
- G11 - INFORMATION STORAGE
Information Patent Application
NONVOLATILE SRAM
- Publication number 20250210107
- Publication date Jun 26, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Perng-Fei Yuh
- G11 - INFORMATION STORAGE
Information Patent Application
THREE-DIMENSIONAL STACK OF HETEROGENEOUS MEMORY AND COMPUTE DIES
- Publication number 20250201778
- Publication date Jun 19, 2025
- Kepler Computing Inc.
- Sasikanth MANIPATRUNI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW-POWER STATIC RANDOM ACCESS MEMORY
- Publication number 20250201300
- Publication date Jun 19, 2025
- UNTETHER AI CORPORATION
- Katsuyuki SATO
- G11 - INFORMATION STORAGE
Information Patent Application
FAST, ENERGY EFFICIENT CMOS 2P1R1W REGISTER FILE ARRAY USING HARVES...
- Publication number 20250201302
- Publication date Jun 19, 2025
- Metis Microsystems, LLC
- Azeez Bhavnagarwala
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES WITH BACKSIDE BOOST CAPACITOR AND METHODS FOR FORMIN...
- Publication number 20250201281
- Publication date Jun 19, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Nail Etkin Can Akkaya
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES WITH IMPROVED BIT LINE LOADING
- Publication number 20250201303
- Publication date Jun 19, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yi-Hsin NIEN
- G11 - INFORMATION STORAGE
Information Patent Application
PULSE SIGNAL GENERATOR TO REDUCE POWER CONSUMPTION OF SRAM AND SRAM...
- Publication number 20250191651
- Publication date Jun 12, 2025
- UIF (UNIVERSITY INDUSTRY FOUNDATION), YONSEI UNIVERSITY
- Seong Ook JUNG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH ADDITIONAL WRITE BIT LINES
- Publication number 20250191652
- Publication date Jun 12, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hidehiro Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Application
WRITE ASSIST CIRCUIT FOR MEMORY DEVICE
- Publication number 20250182821
- Publication date Jun 5, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chia-Che CHUNG
- G11 - INFORMATION STORAGE
Information Patent Application
DEVICES AND SYSTEMS FOR FLYING BITLINE WITH JUMPER CELL
- Publication number 20250176154
- Publication date May 29, 2025
- ADVANCED MICRO DEVICES, INC.
- Sahilpreet Singh
- G11 - INFORMATION STORAGE
Information Patent Application
SELECTIVE BIT LINE CLAMPING CONTROL FOR AN IN-MEMORY COMPUTE OPERAT...
- Publication number 20250174269
- Publication date May 29, 2025
- STMicroelectronics International N.V.
- Kedar Janardan DHORI
- G11 - INFORMATION STORAGE
Information Patent Application
THREE-DIMENSIONAL (3-D) WRITE ASSIST SCHEME FOR MEMORY CELLS
- Publication number 20250166681
- Publication date May 22, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chih-Chieh CHIU
- G11 - INFORMATION STORAGE
Information Patent Application
System Control Using Sparse Data
- Publication number 20250165404
- Publication date May 22, 2025
- Apple Inc.
- Michael R. Seningen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE, WRITE ASSIST CIRCUIT, AND METHOD
- Publication number 20250166698
- Publication date May 22, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jun-Cheng LIU
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20250169048
- Publication date May 22, 2025
- Samsung Electronics Co., Ltd.
- Jeewoong Kim
- G11 - INFORMATION STORAGE
Information Patent Application
SENSE AMPLIFIER CIRCUIT, MEMORY CIRCUIT, AND SENSING METHOD THEREOF
- Publication number 20250166699
- Publication date May 22, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jui-Jen Wu
- G11 - INFORMATION STORAGE
Information Patent Application
LOW-POWER STATIC RANDOM ACCESS MEMORY
- Publication number 20250157530
- Publication date May 15, 2025
- UNTETHER AI CORPORATION
- Saijagan SAIJAGAN
- G11 - INFORMATION STORAGE

Read-write circuits

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

SRAM with reconfigurable setting

SRAM performance optimization via transistor width and threshold vo...

Adaptive word line underdrive control for an in-memory compute oper...

Integrated circuits with single-functional-unit level integration o...

Reducing precharge current surge in digital compute in memory

Arrangements of memory devices and methods of operating the memory...

Drive circuit with improved timing margin for memory device

Semiconductor storage device

Memory bit cell for in-memory computation

Power loss reduction in data storage arrays

Integrated circuit, system and method of forming the same

Bitcell supporting bit-write-mask function

Semiconductor device

Bit line pre-charge circuit for power management modes in multi ban...

Latch circuit formed by modified memory cells

Latch-based storage circuits having efficient integrated circuit la...

Multi-port bitcell architecture

Pre-charging bit lines through charge-sharing

Temperature sensor circuits for integrated circuit devices

Electronic device with buffered operation engine and method for per...

Low-power static random access memory

Display apparatus and method of manufacturing the same

SRAM-based cell for in-memory computing and hybrid computations/sto...

Error handling device, semiconductor memory device including the sa...

Method of forming 3D stacked compute and memory with copper pillars

Compact memory-in-pixel display structure

Memory devices with improved bit line loading

Testability circuit and read and write path decoupling circuit of SRAM

Memory devices with backside boost capacitor and methods for formin...

SRAM with improved write performance and write operation method the...

Patents Applicationslast 30 patents

SRAM CELL ARRAY, DRIVING METHOD AND DEVICE THEREFOR, AND PROGRAM TH...

MEMORY DEVICES WITH RC TRACKING AND METHODS FOR OPERATING THE SAME

MEMORY CIRCUITS WITH TRACKING CELLS AND METHODS FOR OPERATING THE SAME

COMPUTATION IN MEMORY SYSTEM

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

TIME MULTIPLEXING OF CLEANUP AND WRITE FOR SERIAL READ WRITE MEMORY

MEMORY DEVICE, MEMORY SYSTEM, AND METHOD FOR DATA CALCULATION WITH...

Compute-in-Memory with Current Transition Detection

DUAL RAIL MEMORY DEVICE

MEMORY DEVICE PERFORMING IN-MEMORY COMPUTING AND OPERATING METHOD T...

MEMORY BITCELL WITH BALANCED DIFFUSION LAYOUT

STACKED INTEGRATED CIRCUIT STRUCTURE AND MANUFACTURING METHOD THEREOF

MEMORY DEVICE PERFORMING IN-MEMORY COMPUTING AND OPERATING METHOD T...

NONVOLATILE SRAM

THREE-DIMENSIONAL STACK OF HETEROGENEOUS MEMORY AND COMPUTE DIES

LOW-POWER STATIC RANDOM ACCESS MEMORY

FAST, ENERGY EFFICIENT CMOS 2P1R1W REGISTER FILE ARRAY USING HARVES...

MEMORY DEVICES WITH BACKSIDE BOOST CAPACITOR AND METHODS FOR FORMIN...

MEMORY DEVICES WITH IMPROVED BIT LINE LOADING

PULSE SIGNAL GENERATOR TO REDUCE POWER CONSUMPTION OF SRAM AND SRAM...

MEMORY DEVICE WITH ADDITIONAL WRITE BIT LINES

WRITE ASSIST CIRCUIT FOR MEMORY DEVICE

DEVICES AND SYSTEMS FOR FLYING BITLINE WITH JUMPER CELL

SELECTIVE BIT LINE CLAMPING CONTROL FOR AN IN-MEMORY COMPUTE OPERAT...

THREE-DIMENSIONAL (3-D) WRITE ASSIST SCHEME FOR MEMORY CELLS

System Control Using Sparse Data

MEMORY DEVICE, WRITE ASSIST CIRCUIT, AND METHOD

SEMICONDUCTOR DEVICE

SENSE AMPLIFIER CIRCUIT, MEMORY CIRCUIT, AND SENSING METHOD THEREOF

LOW-POWER STATIC RANDOM ACCESS MEMORY