Self-alignment coat gate

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CPC
Y10S148/141

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YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10USPC classification Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10S148/00Metal treatment

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Y10S148/141Self-alignment coat gate

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Patents Grantslast 30 patents

Information Patent Grant
Electro-optical device and method for driving the same
- Patent number 7,916,232
- Issue date Mar 29, 2011
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Electro-optical device and method for driving the same
- Patent number 7,489,367
- Issue date Feb 10, 2009
- Semiconductor Energy Laboratory, Co., LTD
- Shunpei Yamazaki
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Electro-optical device and method for driving the same
- Patent number 6,437,367
- Issue date Aug 20, 2002
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Electro-optical device and method for driving the same
- Patent number 6,436,815
- Issue date Aug 20, 2002
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Electro-optical device and method for driving the same
- Patent number 5,963,278
- Issue date Oct 5, 1999
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Electro-optical device and method for driving the same
- Patent number 5,933,205
- Issue date Aug 3, 1999
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Method for forming thin film transistors with anodic oxide on sides...
- Patent number 5,568,288
- Issue date Oct 22, 1996
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Simplified contact method for high density CMOS
- Patent number 5,420,057
- Issue date May 30, 1995
- International Business Machines Corporation
- Reid S. Bennett
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for forming self-aligned titanium silicide by heating in an...
- Patent number 5,288,666
- Issue date Feb 22, 1994
- NCR Corporation
- Steven S. Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gradation method for driving liquid crystal device with ramp and se...
- Patent number 5,287,205
- Issue date Feb 15, 1994
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Method for manufacturing field effect transistors
- Patent number 5,114,870
- Issue date May 19, 1992
- Hitachi, Ltd.
- Yuji Yatsuda
- G11 - INFORMATION STORAGE
Information Patent Grant
Self aligned silicide process for gate/runner without extra masking
- Patent number 5,086,017
- Issue date Feb 4, 1992
- Industrial Technology Research Institute
- Chih-Yuan Lu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a connection device in a semiconductor device
- Patent number 5,081,060
- Issue date Jan 14, 1992
- Hyundai Electronics Industries, Co., Ltd.
- Jae K. Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming an antifuse element with substantially reduced ca...
- Patent number 5,057,451
- Issue date Oct 15, 1991
- Actel Corporation
- John L. McCollum
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned semiconductor devices
- Patent number 5,028,555
- Issue date Jul 2, 1991
- Advanced Micro Devices, Inc.
- Jacob D. Haskell
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Making a self aligned semiconductor device
- Patent number 4,992,389
- Issue date Feb 12, 1991
- Kabushiki Kaisha Toshiba
- Mitsugi Ogura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making self-aligned, planarized contacts for semiconducto...
- Patent number 4,977,108
- Issue date Dec 11, 1990
- Advanced Micro Devices, Inc.
- Jacob D. Haskell
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
GaAs FET manufacturing process employing channel confining layers
- Patent number 4,962,050
- Issue date Oct 9, 1990
- ITT Corporation
- Arthur E. Geissberger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a submicron silicon gate MOSFETg21 which has...
- Patent number 4,895,520
- Issue date Jan 23, 1990
- Standard Microsystems Corporation
- John E. Berg
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming well regions for field effect transistors utilizi...
- Patent number 4,851,364
- Issue date Jul 25, 1989
- Hitachi, Ltd.
- Yuji Yatsuda
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for manufacturing a semiconductor device utilizing self-alig...
- Patent number 4,830,971
- Issue date May 16, 1989
- Tokyo Shibaura Denki Kabushiki Kaisha
- Tadashi Shibata
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned sidewall gate IGFET
- Patent number 4,729,002
- Issue date Mar 1, 1988
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Depletion mode short channel IGFET
- Patent number 4,725,871
- Issue date Feb 16, 1988
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned dual-gate igfet assembly
- Patent number 4,721,988
- Issue date Jan 26, 1988
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sidewall multiple-gate IGFET
- Patent number 4,717,941
- Issue date Jan 5, 1988
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sidewall gate IGFET
- Patent number 4,654,680
- Issue date Mar 31, 1987
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of producing MOS FET type semiconductor device
- Patent number 4,646,426
- Issue date Mar 3, 1987
- Fujitsu Limited
- Nobuo Sasaki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a semiconductor device utilizing self-alig...
- Patent number 4,622,735
- Issue date Nov 18, 1986
- Tokyo Shibaura Denki Kabushiki Kaisha
- Tadashi Shibata
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing field-effect transistors utilizing self-ali...
- Patent number 4,586,238
- Issue date May 6, 1986
- Hitachi, Ltd.
- Yuji Yatsuda
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of making semiconductor deivce using a conductive layer as mask
- Patent number 4,541,166
- Issue date Sep 17, 1985
- SemiConductor Energy Laboratory Co.
- Shunpei Yamazaki
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
ELECTRO-OPTICAL DEVICE AND METHOD FOR DRIVING THE SAME
- Publication number 20090190056
- Publication date Jul 30, 2009
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei YAMAZAKI
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS

Self-alignment coat gate

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Electro-optical device and method for driving the same

Electro-optical device and method for driving the same

Electro-optical device and method for driving the same

Electro-optical device and method for driving the same

Electro-optical device and method for driving the same

Electro-optical device and method for driving the same

Method for forming thin film transistors with anodic oxide on sides...

Simplified contact method for high density CMOS

Process for forming self-aligned titanium silicide by heating in an...

Gradation method for driving liquid crystal device with ramp and se...

Method for manufacturing field effect transistors

Self aligned silicide process for gate/runner without extra masking

Method for forming a connection device in a semiconductor device

Method of forming an antifuse element with substantially reduced ca...

Self-aligned semiconductor devices

Making a self aligned semiconductor device

Method of making self-aligned, planarized contacts for semiconducto...

GaAs FET manufacturing process employing channel confining layers

Method of fabricating a submicron silicon gate MOSFETg21 which has...

Method of forming well regions for field effect transistors utilizi...

Method for manufacturing a semiconductor device utilizing self-alig...

Self-aligned sidewall gate IGFET

Depletion mode short channel IGFET

Self-aligned dual-gate igfet assembly

Sidewall multiple-gate IGFET

Sidewall gate IGFET

Method of producing MOS FET type semiconductor device

Method for manufacturing a semiconductor device utilizing self-alig...

Method of manufacturing field-effect transistors utilizing self-ali...

Method of making semiconductor deivce using a conductive layer as mask

Patents Applicationslast 30 patents

ELECTRO-OPTICAL DEVICE AND METHOD FOR DRIVING THE SAME