Solid-solid interdiffusion

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CPC
H01L2224/8083

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Parent Industries

HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00

Current Industry

H01L2224/8083Solid-solid interdiffusion

Industries

Patents Grantslast 30 patents

Information Patent Grant
Stacked semiconductor structure and method
- Patent number 12,068,287
- Issue date Aug 20, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Szu-Ying Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bonding structure and method thereof
- Patent number 12,015,001
- Issue date Jun 18, 2024
- Taiwan Semiconductor Manufacturing Company Ltd.
- Wen-Chuan Tai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bonded wafer device structure and methods for making the same
- Patent number 11,961,826
- Issue date Apr 16, 2024
- Harry-Hak-Lay Chuang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package and method
- Patent number 11,855,067
- Issue date Dec 26, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional memory device having support-die-assisted source...
- Patent number 11,791,327
- Issue date Oct 17, 2023
- SanDisk Technologies LLC
- Kwang-Ho Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a semiconductor device having an interconn...
- Patent number 11,658,069
- Issue date May 23, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd
- Ming-Fa Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bonded wafer device structure and methods for making the same
- Patent number 11,621,248
- Issue date Apr 4, 2023
- Taiwan Semiconductor Manufacturing Company Limited
- Harry-Hak-Lay Chuang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked semiconductor structure and method
- Patent number 11,587,910
- Issue date Feb 21, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Szu-Ying Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package and method
- Patent number 11,502,072
- Issue date Nov 15, 2022
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device including interconnection structure including...
- Patent number 11,152,317
- Issue date Oct 19, 2021
- Samsung Electronics Co., Ltd.
- Ju-Il Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional memory device having support-die-assisted source...
- Patent number 11,133,297
- Issue date Sep 28, 2021
- SanDisk Technologies LLC
- Kwang-Ho Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for bonding and connecting substrates
- Patent number 11,107,855
- Issue date Aug 31, 2021
- Sony Corporation
- Nobutoshi Fujii
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bonded assembly containing a dielectric bonding pattern definition...
- Patent number 11,094,653
- Issue date Aug 17, 2021
- SanDisk Technologies LLC
- Chen Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked semiconductor structure and method
- Patent number 11,037,909
- Issue date Jun 15, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Szu-Ying Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with multiple substrates electrically connecte...
- Patent number 10,707,258
- Issue date Jul 7, 2020
- Sony Corporation
- Nobutoshi Fujii
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Three-dimensional memory device having support-die-assisted source...
- Patent number 10,510,738
- Issue date Dec 17, 2019
- SanDisk Technologies LLC
- Kwang-Ho Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked semiconductor structure and method
- Patent number 10,510,730
- Issue date Dec 17, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Szu-Ying Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device
- Patent number 10,504,749
- Issue date Dec 10, 2019
- Mitsubishi Materials Corporation
- Shuji Nishimoto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked semiconductor structure and method
- Patent number 10,157,889
- Issue date Dec 18, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Szu-Ying Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package assembly with facing active surfaces of first...
- Patent number 10,032,756
- Issue date Jul 24, 2018
- Mediatek Inc.
- Tzu-Hung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multilayer semiconductor integrated circuit device
- Patent number 9,978,717
- Issue date May 22, 2018
- THRUCHIP JAPAN INC.
- Tadahiro Kuroda
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for producing a structure by assembling at least two elemen...
- Patent number 9,922,953
- Issue date Mar 20, 2018
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Paul Gondcharton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and manufacturing method thereof
- Patent number 9,673,147
- Issue date Jun 6, 2017
- Kabushiki Kaisha Toshiba
- Kenro Nakamura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked integrated memory device
- Patent number 9,401,183
- Issue date Jul 26, 2016
- Glenn J. Leedy
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device and manufacturing method thereof
- Patent number 9,287,225
- Issue date Mar 15, 2016
- Kabushiki Kaisha Toshiba
- Kenro Nakamura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chip-on-wafer bonding method and bonding device, and structure comp...
- Patent number 9,142,532
- Issue date Sep 22, 2015
- BONDTECH CO., LTD.
- Tadatomo Suga
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Three dimension structure memory
- Patent number 9,087,556
- Issue date Jul 21, 2015
- Glenn J Leedy
- G11 - INFORMATION STORAGE
Information Patent Grant
Transistor formation using cold welding
- Patent number 9,087,905
- Issue date Jul 21, 2015
- International Business Machines Corporation
- Cheng-Wei Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor formation using cold welding
- Patent number 8,941,147
- Issue date Jan 27, 2015
- International Business Machines Corporation
- Cheng-Wei Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three dimensional structure memory
- Patent number 8,928,119
- Issue date Jan 6, 2015
- Glenn J. Leedy
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
BONDING STRUCTURE AND METHOD THEREOF
- Publication number 20240304580
- Publication date Sep 12, 2024
- Taiwan Semiconductor Manufacturing company Ltd.
- WEN-CHUAN TAI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BONDED WAFER DEVICE STRUCTURE AND METHODS FOR MAKING THE SAME
- Publication number 20240222332
- Publication date Jul 4, 2024
- Taiwan Semiconductor Manufacturing Company Limited
- Harry-Hak-Lay CHUANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated Circuit Package and Method
- Publication number 20240088123
- Publication date Mar 14, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE AND METHOD
- Publication number 20240014095
- Publication date Jan 11, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Ming-Fa Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE DIMENSIONAL (3D) CHIPLET AND METHODS FOR FORMING THE SAME
- Publication number 20230420437
- Publication date Dec 28, 2023
- Taiwan Semiconductor Manufacturing Company Limited
- Chieh-Yen Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONNECTION STRUCTURAL BODY AND SEMICONDUCTOR DEVICE
- Publication number 20230317650
- Publication date Oct 5, 2023
- Shinko Electric Industries Co., Ltd.
- Mitsuhiro AIZAWA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF ATOMIC DIFFUSION HYBRID BONDING AND APPARATUS MADE FROM SAME
- Publication number 20230299040
- Publication date Sep 21, 2023
- Intel Corporation
- Jay Prakash Gupta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BONDING STRUCTURE AND METHOD THEREOF
- Publication number 20230299028
- Publication date Sep 21, 2023
- Taiwan Semiconductor Manufacturing company Ltd.
- WEN-CHUAN TAI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BONDED WAFER DEVICE STRUCTURE AND METHODS FOR MAKING THE SAME
- Publication number 20230223380
- Publication date Jul 13, 2023
- Taiwan Semiconductor Manufacturing Company Limited
- Harry-Hak-Lay CHUANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Stacked Semiconductor Structure and Method
- Publication number 20230207530
- Publication date Jun 29, 2023
- Taiwan Semiconductor Manufacturing Co, LTD.
- Szu-Ying Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIFFUSION BARRIERS AND METHOD OF FORMING SAME
- Publication number 20230132632
- Publication date May 4, 2023
- ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
- Rajesh Katkar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MANUFACTURING METHOD OF SEMICONDUCTOR CHIP
- Publication number 20230114550
- Publication date Apr 13, 2023
- Samsung Electronics Co., Ltd.
- Yongbum KWON
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BONDING METHOD, BONDED ARTICLE, AND BONDING DEVICE
- Publication number 20230030272
- Publication date Feb 2, 2023
- BONDTECH CO., LTD.
- Akira YAMAUCHI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE, EQUIPMENT, AND MANUFACTURING METHOD OF SEMICO...
- Publication number 20230008401
- Publication date Jan 12, 2023
- Canon Kabushiki Kaisha
- Takuya Hara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated Circuit Package and Method
- Publication number 20220392884
- Publication date Dec 8, 2022
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BONDED WAFER DEVICE STRUCTURE AND METHODS FOR MAKING THE SAME
- Publication number 20220320044
- Publication date Oct 6, 2022
- Taiwan Semiconductor Manufacturing Company Limited
- Harry-Hak-Lay CHUANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FABRICATING A SEMICONDUCTOR DEVICE
- Publication number 20220068852
- Publication date Mar 3, 2022
- Samsung Electronics Co., Ltd.
- Ju-Il CHOI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD
- Publication number 20210366958
- Publication date Nov 25, 2021
- SONY GROUP CORPORATION
- Nobutoshi Fujii
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE AND METHOD
- Publication number 20210327866
- Publication date Oct 21, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Stacked Semiconductor Structure and Method
- Publication number 20210225813
- Publication date Jul 22, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Szu-Ying Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BONDED ASSEMBLY CONTAINING A DIELECTRIC BONDING PATTERN DEFINITION...
- Publication number 20210143115
- Publication date May 13, 2021
- SANDISK TECHNOLOGIES LLC
- Chen WU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Stacked Semiconductor Structure and Method
- Publication number 20200075556
- Publication date Mar 5, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Szu-Ying Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Stacked Semiconductor Structure and Method
- Publication number 20190123026
- Publication date Apr 25, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Szu-Ying Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Three dimension structure memory
- Publication number 20140346649
- Publication date Nov 27, 2014
- Glenn J. Leedy
- G11 - INFORMATION STORAGE
Information Patent Application
TRANSISTOR FORMATION USING COLD WELDING
- Publication number 20140094006
- Publication date Apr 3, 2014
- International Business Machines Corporation
- CHENG-WEI CHENG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR FORMATION USING COLD WELDING
- Publication number 20140091370
- Publication date Apr 3, 2014
- International Business Machines Corporation
- CHENG-WEI CHENG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CIRCUIT DEVICE
- Publication number 20140063767
- Publication date Mar 6, 2014
- Sanyo Electric Co., Ltd.
- Kouichi SAITOU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Three dimensional structure memory
- Publication number 20140043883
- Publication date Feb 13, 2014
- Glenn J. Leedy
- G11 - INFORMATION STORAGE
Information Patent Application
Three dimensional memory structure
- Publication number 20130320341
- Publication date Dec 5, 2013
- Glenn J. Leedy
- G11 - INFORMATION STORAGE
Information Patent Application
Three dimensional memory structure
- Publication number 20130320563
- Publication date Dec 5, 2013
- Glenn J. Leedy
- G11 - INFORMATION STORAGE

Solid-solid interdiffusion

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Stacked semiconductor structure and method

Bonding structure and method thereof

Bonded wafer device structure and methods for making the same

Integrated circuit package and method

Three-dimensional memory device having support-die-assisted source...

Method for manufacturing a semiconductor device having an interconn...

Bonded wafer device structure and methods for making the same

Stacked semiconductor structure and method

Integrated circuit package and method

Semiconductor device including interconnection structure including...

Three-dimensional memory device having support-die-assisted source...

Method for bonding and connecting substrates

Bonded assembly containing a dielectric bonding pattern definition...

Stacked semiconductor structure and method

Semiconductor device with multiple substrates electrically connecte...

Three-dimensional memory device having support-die-assisted source...

Stacked semiconductor structure and method

Semiconductor device

Stacked semiconductor structure and method

Semiconductor package assembly with facing active surfaces of first...

Multilayer semiconductor integrated circuit device

Process for producing a structure by assembling at least two elemen...

Semiconductor device and manufacturing method thereof

Stacked integrated memory device

Semiconductor device and manufacturing method thereof

Chip-on-wafer bonding method and bonding device, and structure comp...

Three dimension structure memory

Transistor formation using cold welding

Transistor formation using cold welding

Three dimensional structure memory

Patents Applicationslast 30 patents

BONDING STRUCTURE AND METHOD THEREOF

BONDED WAFER DEVICE STRUCTURE AND METHODS FOR MAKING THE SAME

Integrated Circuit Package and Method

SEMICONDUCTOR PACKAGE AND METHOD

THREE DIMENSIONAL (3D) CHIPLET AND METHODS FOR FORMING THE SAME

CONNECTION STRUCTURAL BODY AND SEMICONDUCTOR DEVICE

METHOD OF ATOMIC DIFFUSION HYBRID BONDING AND APPARATUS MADE FROM SAME

BONDING STRUCTURE AND METHOD THEREOF

BONDED WAFER DEVICE STRUCTURE AND METHODS FOR MAKING THE SAME

Stacked Semiconductor Structure and Method

DIFFUSION BARRIERS AND METHOD OF FORMING SAME

MANUFACTURING METHOD OF SEMICONDUCTOR CHIP

BONDING METHOD, BONDED ARTICLE, AND BONDING DEVICE

SEMICONDUCTOR DEVICE, EQUIPMENT, AND MANUFACTURING METHOD OF SEMICO...

Integrated Circuit Package and Method

BONDED WAFER DEVICE STRUCTURE AND METHODS FOR MAKING THE SAME

METHOD OF FABRICATING A SEMICONDUCTOR DEVICE

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD

INTEGRATED CIRCUIT PACKAGE AND METHOD

Stacked Semiconductor Structure and Method

BONDED ASSEMBLY CONTAINING A DIELECTRIC BONDING PATTERN DEFINITION...

Stacked Semiconductor Structure and Method

Stacked Semiconductor Structure and Method

Three dimension structure memory

TRANSISTOR FORMATION USING COLD WELDING

TRANSISTOR FORMATION USING COLD WELDING

CIRCUIT DEVICE

Three dimensional structure memory

Three dimensional memory structure

Three dimensional memory structure