Test controller

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CPC
G01R31/31724

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GPHYSICS G01Measuring instruments G01RMEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES G01R31/00Arrangements for testing electric properties Arrangements for locating electric faults Arrangements for electrical testing characterised by what is being tested not provided for elsewhere

Current Industry

G01R31/31724Test controller

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Test access port with address and command capability
- Patent number 12,188,980
- Issue date Jan 7, 2025
- Texas Instruments Incorporated
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Grant
3D tap and scan port architectures
- Patent number 12,164,001
- Issue date Dec 10, 2024
- Texas Instruments Incorporated
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Grant
Electronic circuit performing analog built-in self test and operati...
- Patent number 12,158,497
- Issue date Dec 3, 2024
- Samsung Electronics Co., Ltd.
- Hyunseok Nam
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit with state machine for pre-boot self-tests
- Patent number 12,158,836
- Issue date Dec 3, 2024
- Texas Instruments Incorporated
- Venkateswar Reddy Kowkutla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Electronic device for self-testing period of clock signal and monit...
- Patent number 12,153,089
- Issue date Nov 26, 2024
- Richtek Technology Corporation
- Fu-Shiang Lai
- G01 - MEASURING TESTING
Information Patent Grant
Clock gating circuits and methods for dual-edge-triggered applications
- Patent number 12,146,912
- Issue date Nov 19, 2024
- Texas Instruments Incorporated
- Arnab Khawas
- G01 - MEASURING TESTING
Information Patent Grant
Random number generation testing systems and methods
- Patent number 12,135,352
- Issue date Nov 5, 2024
- Advantest Corporation
- Marilyn Kushnick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple clock and clock cycle selection for x-tolerant logic built...
- Patent number 12,117,488
- Issue date Oct 15, 2024
- Synopsys, Inc.
- Peter Wohl
- G01 - MEASURING TESTING
Information Patent Grant
System and method for access control of a plurality of instruments...
- Patent number 12,111,356
- Issue date Oct 8, 2024
- Erik Larsson
- G01 - MEASURING TESTING
Information Patent Grant
System for testing an electronic circuit comprising a digital to an...
- Patent number 12,105,143
- Issue date Oct 1, 2024
- STMicroelectronics S.r.l.
- Leonardo Pedone
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Scan test in a single-wire bus circuit
- Patent number 12,092,689
- Issue date Sep 17, 2024
- Qorvo US, Inc.
- Alexander Wayne Hietala
- G11 - INFORMATION STORAGE
Information Patent Grant
Switchable FMCW/PMCW radar transceiver
- Patent number 12,085,664
- Issue date Sep 10, 2024
- AyDeeKay LLC
- Tom Heller
- G01 - MEASURING TESTING
Information Patent Grant
Methods and apparatus to identify faults in processors
- Patent number 12,085,610
- Issue date Sep 10, 2024
- Texas Instruments Incorporated
- Devanathan Varadarajan
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus of testing circuit, and storage medium
- Patent number 12,078,671
- Issue date Sep 3, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Cheng Gu
- G01 - MEASURING TESTING
Information Patent Grant
Automated test equipment with hardware accelerator
- Patent number 12,079,098
- Issue date Sep 3, 2024
- Advantest Corporation
- Mei-Mei Su
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Measuring input receiver thresholds using automated test equipment...
- Patent number 12,078,677
- Issue date Sep 3, 2024
- Amazon Technologies, Inc.
- Brendan Tully
- G01 - MEASURING TESTING
Information Patent Grant
In system test of chips in functional systems
- Patent number 12,078,678
- Issue date Sep 3, 2024
- NVIDIA Corporation
- Shantanu Sarangi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Test access port architecture to facilitate multiple testing modes
- Patent number 12,057,183
- Issue date Aug 6, 2024
- Micron Technology, Inc.
- Michael Richard Spica
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of testing a stacked integrated circuit device
- Patent number 12,032,021
- Issue date Jul 9, 2024
- Graphcore Limited
- Stephen Felix
- G01 - MEASURING TESTING
Information Patent Grant
3D stacked die test architecture
- Patent number 12,007,441
- Issue date Jun 11, 2024
- Texas Instruments Incorporated
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Grant
Current test circuit, device and method, and storage medium
- Patent number 11,977,116
- Issue date May 7, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Maosong Ma
- G01 - MEASURING TESTING
Information Patent Grant
Interleaved testing of digital and analog subsystems with on-chip t...
- Patent number 11,940,490
- Issue date Mar 26, 2024
- QUALCOMM Incorporated
- Praveen Raghuraman
- G01 - MEASURING TESTING
Information Patent Grant
Single pin DFT architecture for USBPD ICs
- Patent number 11,933,841
- Issue date Mar 19, 2024
- SILICONCH SYSTEMS PVT LTD
- Munnangi Sirisha
- G01 - MEASURING TESTING
Information Patent Grant
Path based controls for ATE mode testing of multicell memory circuit
- Patent number 11,933,844
- Issue date Mar 19, 2024
- Texas Instruments Incorporated
- Wilson Pradeep
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Benchmark circuit on a semiconductor wafer and method for operating...
- Patent number 11,927,628
- Issue date Mar 12, 2024
- Taiwan Semiconductor Manufacturing Company Ltd.
- Chu-Feng Liao
- G01 - MEASURING TESTING
Information Patent Grant
Fan-out buffer with skew control function, operating method thereof...
- Patent number 11,921,158
- Issue date Mar 5, 2024
- Samsung Electronics Co., Ltd.
- Byung-Sung Kim
- G01 - MEASURING TESTING
Information Patent Grant
Automated test equipment for testing one or more devices under test...
- Patent number 11,913,990
- Issue date Feb 27, 2024
- Advantest Corporation
- Olaf Pöppe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and systems for performing built-in-self-test operations wi...
- Patent number 11,906,585
- Issue date Feb 20, 2024
- Samsung Electronics Co., Ltd.
- A Santosh Kumar Reddy
- G01 - MEASURING TESTING
Information Patent Grant
Basic logic element, semiconductor device including the same, outpu...
- Patent number 11,899,062
- Issue date Feb 13, 2024
- NEC Space Technologies, Ltd.
- Hiroki Hihara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and device for monitoring the reliability of an electronic s...
- Patent number 11,879,937
- Issue date Jan 23, 2024
- Volkswagen Aktiengesellschaft
- Andreas Aal
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CLOCK GATING CIRCUITS AND METHODS FOR DUAL-EDGE-TRIGGERED APPLICATIONS
- Publication number 20240361384
- Publication date Oct 31, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Arnab Khawas
- G01 - MEASURING TESTING
Information Patent Application
STORAGE SYSTEM AND AN OPERATING METHOD THEREOF
- Publication number 20240353486
- Publication date Oct 24, 2024
- Samsung Electronics Co., Ltd.
- Ganggyu LEE
- G01 - MEASURING TESTING
Information Patent Application
METHODS AND APPARATUS TO IDENTIFY FAULTS IN PROCESSORS
- Publication number 20240345160
- Publication date Oct 17, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Devanathan Varadarajan
- G01 - MEASURING TESTING
Information Patent Application
SCAN TEST IN A SINGLE-WIRE BUS CIRCUIT
- Publication number 20240345162
- Publication date Oct 17, 2024
- Qorvo US, Inc.
- Alexander Wayne Hietala
- G11 - INFORMATION STORAGE
Information Patent Application
INFIELD TEST AND DEBUG
- Publication number 20240329130
- Publication date Oct 3, 2024
- Rakesh KANDULA
- G01 - MEASURING TESTING
Information Patent Application
TEST SYSTEM
- Publication number 20240329131
- Publication date Oct 3, 2024
- SINTOKOGIO, LTD.
- Nobuyuki TAKITA
- G01 - MEASURING TESTING
Information Patent Application
BUILT-IN SELF-TEST ENHANCEMENTS
- Publication number 20240319268
- Publication date Sep 26, 2024
- QUALCOMM Incorporated
- Gaurav VERMA
- B60 - VEHICLES IN GENERAL
Information Patent Application
3D STACKED DIE TEST ARCHITECTURE
- Publication number 20240319274
- Publication date Sep 26, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
BUILT-IN SELF TEST CIRCUIT FOR MEASURING PERFORMANCE OF CLOCK DATA...
- Publication number 20240302432
- Publication date Sep 12, 2024
- Samsung Electronics Co., Ltd.
- Hobin SONG
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
BENCHMARK CIRCUIT ON A SEMICONDUCTOR WAFER AND METHOD FOR OPERATING...
- Publication number 20240175920
- Publication date May 30, 2024
- Taiwan Semiconductor Manufacturing company Ltd.
- CHU-FENG LIAO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROCESSOR TEST PATTERN GENERATION AND APPLICATION FOR TESTER SYSTEMS
- Publication number 20240118340
- Publication date Apr 11, 2024
- Advantest Corporation
- Edmundo De La Puente
- G01 - MEASURING TESTING
Information Patent Application
Functional Circuit Block Harvesting in Computer Systems
- Publication number 20240103074
- Publication date Mar 28, 2024
- Apple Inc.
- Peter A. Lisherness
- G01 - MEASURING TESTING
Information Patent Application
BUILT-IN SELF TEST CIRCUIT FOR SEGMENTED STATIC RANDOM ACCESS MEMOR...
- Publication number 20240069096
- Publication date Feb 29, 2024
- STMicroelectronics International N.V.
- Bhupender SINGH
- G11 - INFORMATION STORAGE
Information Patent Application
ELECTRONIC DEVICE FOR SELF-TESTING PERIOD OF CLOCK SIGNAL AND MONIT...
- Publication number 20240069097
- Publication date Feb 29, 2024
- RICHTEK TECHNOLOGY CORPORATION
- Fu-Shiang LAI
- G01 - MEASURING TESTING
Information Patent Application
SCAN CIRCUIT AND METHOD
- Publication number 20240012051
- Publication date Jan 11, 2024
- STMicroelectronics International N.V.
- Venkata Narayanan Srinivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
3D TAP & SCAN PORT ARCHITECTURES
- Publication number 20230417831
- Publication date Dec 28, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
DEFECT DETECTING SYSTEM OF AUTOMOTIVE APPARATUS
- Publication number 20230375606
- Publication date Nov 23, 2023
- Samsung Electronics Co., Ltd.
- Hyun Seok NAM
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
IN SYSTEM TEST OF CHIPS IN FUNCTIONAL SYSTEMS
- Publication number 20230349970
- Publication date Nov 2, 2023
- NVIDIA Corporation
- Shantanu Sarangi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CIRCUIT FOR CONTROLLING CALIBRATION, ELECTRONIC DEVICE, AND METHOD...
- Publication number 20230349973
- Publication date Nov 2, 2023
- CHANGXIN MEMORY TECHNOLOGIES, INC
- Kai TIAN
- G01 - MEASURING TESTING
Information Patent Application
TEST ACCESS PORT WITH ADDRESS AND COMMAND CAPABILITY
- Publication number 20230333159
- Publication date Oct 19, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
PROCESSING SYSTEM, RELATED INTEGRATED CIRCUIT, DEVICE AND METHOD
- Publication number 20230314506
- Publication date Oct 5, 2023
- STMicroelectronics International N.V.
- Roberto Colombo
- G01 - MEASURING TESTING
Information Patent Application
BUILT-IN SELF-TEST CIRCUIT AND TEMPERATURE MEASUREMENT CIRCUIT INCL...
- Publication number 20230280398
- Publication date Sep 7, 2023
- Samsung Electronics Co., Ltd.
- Junhee Shin
- G01 - MEASURING TESTING
Information Patent Application
INTEGRATED CIRCUIT WITH RESILIENT SYSTEM
- Publication number 20230258709
- Publication date Aug 17, 2023
- STMicroelectronics S.r.l.
- Carlo CAIMI
- G01 - MEASURING TESTING
Information Patent Application
BUILT-IN TESTING IN MODULAR SYSTEM-ON-CHIP DEVICE
- Publication number 20230258720
- Publication date Aug 17, 2023
- Marvell Asia Pte Ltd.
- Xiongzhi Ning
- G01 - MEASURING TESTING
Information Patent Application
INTEGRATED CIRCUIT WITH STATE MACHINE FOR PRE-BOOT SELF-TESTS
- Publication number 20230259448
- Publication date Aug 17, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Venkateswar Reddy KOWKUTLA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS OF TESTING CIRCUIT, AND STORAGE MEDIUM
- Publication number 20230221365
- Publication date Jul 13, 2023
- CHANGXIN MEMORY TECHNOLOGIES, INC
- Cheng GU
- G01 - MEASURING TESTING
Information Patent Application
METHODS AND SYSTEMS FOR PERFORMING BUILT-IN-SELF-TEST OPERATIONS WI...
- Publication number 20230194608
- Publication date Jun 22, 2023
- Samsung Electronics Co., Ltd.
- A Santosh Kumar Reddy
- G01 - MEASURING TESTING
Information Patent Application
WAFER SCALE TESTING USING A 2 SIGNAL JTAG INTERFACE
- Publication number 20230160959
- Publication date May 25, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
3D TAP & SCAN PORT ARCHITECTURES
- Publication number 20230160958
- Publication date May 25, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
SCAN CHAIN SELF-TESTING OF LOCKSTEP CORES ON RESET
- Publication number 20230152373
- Publication date May 18, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Prakash NARAYANAN
- G01 - MEASURING TESTING

Test controller

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Test access port with address and command capability

3D tap and scan port architectures

Electronic circuit performing analog built-in self test and operati...

Integrated circuit with state machine for pre-boot self-tests

Electronic device for self-testing period of clock signal and monit...

Clock gating circuits and methods for dual-edge-triggered applications

Random number generation testing systems and methods

Multiple clock and clock cycle selection for x-tolerant logic built...

System and method for access control of a plurality of instruments...

System for testing an electronic circuit comprising a digital to an...

Scan test in a single-wire bus circuit

Switchable FMCW/PMCW radar transceiver

Methods and apparatus to identify faults in processors

Method and apparatus of testing circuit, and storage medium

Automated test equipment with hardware accelerator

Measuring input receiver thresholds using automated test equipment...

In system test of chips in functional systems

Test access port architecture to facilitate multiple testing modes

Method of testing a stacked integrated circuit device

3D stacked die test architecture

Current test circuit, device and method, and storage medium

Interleaved testing of digital and analog subsystems with on-chip t...

Single pin DFT architecture for USBPD ICs

Path based controls for ATE mode testing of multicell memory circuit

Benchmark circuit on a semiconductor wafer and method for operating...

Fan-out buffer with skew control function, operating method thereof...

Automated test equipment for testing one or more devices under test...

Methods and systems for performing built-in-self-test operations wi...

Basic logic element, semiconductor device including the same, outpu...

Method and device for monitoring the reliability of an electronic s...

Patents Applicationslast 30 patents

CLOCK GATING CIRCUITS AND METHODS FOR DUAL-EDGE-TRIGGERED APPLICATIONS

STORAGE SYSTEM AND AN OPERATING METHOD THEREOF

METHODS AND APPARATUS TO IDENTIFY FAULTS IN PROCESSORS

SCAN TEST IN A SINGLE-WIRE BUS CIRCUIT

INFIELD TEST AND DEBUG

TEST SYSTEM

BUILT-IN SELF-TEST ENHANCEMENTS

3D STACKED DIE TEST ARCHITECTURE

BUILT-IN SELF TEST CIRCUIT FOR MEASURING PERFORMANCE OF CLOCK DATA...

BENCHMARK CIRCUIT ON A SEMICONDUCTOR WAFER AND METHOD FOR OPERATING...

PROCESSOR TEST PATTERN GENERATION AND APPLICATION FOR TESTER SYSTEMS

Functional Circuit Block Harvesting in Computer Systems

BUILT-IN SELF TEST CIRCUIT FOR SEGMENTED STATIC RANDOM ACCESS MEMOR...

ELECTRONIC DEVICE FOR SELF-TESTING PERIOD OF CLOCK SIGNAL AND MONIT...

SCAN CIRCUIT AND METHOD

3D TAP & SCAN PORT ARCHITECTURES

DEFECT DETECTING SYSTEM OF AUTOMOTIVE APPARATUS

IN SYSTEM TEST OF CHIPS IN FUNCTIONAL SYSTEMS

CIRCUIT FOR CONTROLLING CALIBRATION, ELECTRONIC DEVICE, AND METHOD...

TEST ACCESS PORT WITH ADDRESS AND COMMAND CAPABILITY

PROCESSING SYSTEM, RELATED INTEGRATED CIRCUIT, DEVICE AND METHOD

BUILT-IN SELF-TEST CIRCUIT AND TEMPERATURE MEASUREMENT CIRCUIT INCL...

INTEGRATED CIRCUIT WITH RESILIENT SYSTEM

BUILT-IN TESTING IN MODULAR SYSTEM-ON-CHIP DEVICE

INTEGRATED CIRCUIT WITH STATE MACHINE FOR PRE-BOOT SELF-TESTS

METHOD AND APPARATUS OF TESTING CIRCUIT, AND STORAGE MEDIUM

METHODS AND SYSTEMS FOR PERFORMING BUILT-IN-SELF-TEST OPERATIONS WI...

WAFER SCALE TESTING USING A 2 SIGNAL JTAG INTERFACE

3D TAP & SCAN PORT ARCHITECTURES

SCAN CHAIN SELF-TESTING OF LOCKSTEP CORES ON RESET