Test pattern compression or decompression

Industry

CPC
G01R31/318335

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GPHYSICS G01Measuring instruments G01RMEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES G01R31/00Arrangements for testing electric properties Arrangements for locating electric faults Arrangements for electrical testing characterised by what is being tested not provided for elsewhere

Current Industry

G01R31/318335Test pattern compression or decompression

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Scan compression through pin data encoding
- Patent number 12,105,145
- Issue date Oct 1, 2024
- STMICROELECTRONICS INTERNATIONAL N.V.
- Sandeep Jain
- G01 - MEASURING TESTING
Information Patent Grant
Scan tree construction
- Patent number 12,092,691
- Issue date Sep 17, 2024
- Tsinghua University
- Can Xiang
- G01 - MEASURING TESTING
Information Patent Grant
Embedded PHY (EPHY) IP core for FPGA
- Patent number 12,066,488
- Issue date Aug 20, 2024
- SanDisk Technologies, Inc.
- Doron Ganon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Decompression circuit, circuit generation method, and IC chip
- Patent number 12,050,248
- Issue date Jul 30, 2024
- Huawei Technologies Co., Ltd.
- Yu Huang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable test compression architecture input/output shift regis...
- Patent number 12,013,434
- Issue date Jun 18, 2024
- Texas Instruments Incorporated
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Single-pass diagnosis for multiple chain defects
- Patent number 11,789,077
- Issue date Oct 17, 2023
- Synopsys, Inc.
- Emil Gizdarski
- G01 - MEASURING TESTING
Information Patent Grant
Scan compression through pin data encoding
- Patent number 11,782,092
- Issue date Oct 10, 2023
- STMICROELECTRONICS INTERNATIONAL N.V.
- Sandeep Jain
- G01 - MEASURING TESTING
Information Patent Grant
Re-programmable self-test
- Patent number 11,768,240
- Issue date Sep 26, 2023
- Texas Instruments Incorporated
- Neil John Simpson
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable scan chain debug technique
- Patent number 11,754,624
- Issue date Sep 12, 2023
- Seagate Technology LLC
- Bharat Londhe
- G01 - MEASURING TESTING
Information Patent Grant
Embedded PHY (EPHY) IP core for FPGA
- Patent number 11,675,008
- Issue date Jun 13, 2023
- Western Digital Technologies, Inc.
- Doron Ganon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Core partition circuit and testing device
- Patent number 11,624,782
- Issue date Apr 11, 2023
- SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.
- Yunhao Xing
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Failure pattern obtaining method and apparatus
- Patent number 11,609,263
- Issue date Mar 21, 2023
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Chiasheng Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Trajectory-optimized test pattern generation for built-in self-test
- Patent number 11,585,853
- Issue date Feb 21, 2023
- SIEMENS INDUSTRY SOFTWARE INC.
- Grzegorz Mrugalski
- G01 - MEASURING TESTING
Information Patent Grant
Systems and methods for enhanced compression of trace data in an em...
- Patent number 11,573,883
- Issue date Feb 7, 2023
- Cadence Design Systems, Inc.
- Mitchell G. Poplack
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable test compression architecture input/output shift regis...
- Patent number 11,567,131
- Issue date Jan 31, 2023
- Texas Instruments Incorporated
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Isometric control data generation for test compression
- Patent number 11,422,188
- Issue date Aug 23, 2022
- SIEMENS INDUSTRY SOFTWARE INC.
- Yu Huang
- G01 - MEASURING TESTING
Information Patent Grant
Per-shift X-tolerant logic built-in self-test
- Patent number 11,422,186
- Issue date Aug 23, 2022
- Synopsys, Inc.
- John A. Waicukauski
- G01 - MEASURING TESTING
Information Patent Grant
Scan wrapper architecture for system-on-chip
- Patent number 11,320,485
- Issue date May 3, 2022
- NXP USA, INC.
- Akhil Garg
- G01 - MEASURING TESTING
Information Patent Grant
Programmable test compactor for improving defect determination
- Patent number 11,320,487
- Issue date May 3, 2022
- SIEMENS INDUSTRY SOFTWARE INC.
- Wu-Tung Cheng
- G01 - MEASURING TESTING
Information Patent Grant
Programmable scan compression
- Patent number 11,275,112
- Issue date Mar 15, 2022
- Seagate Technology LLC
- Bharat P. Londhe
- G01 - MEASURING TESTING
Information Patent Grant
Semiconductor device and method of controlling self-diagnosis
- Patent number 11,255,907
- Issue date Feb 22, 2022
- Renesas Electronics Corporation
- Yoshinori Nishida
- G01 - MEASURING TESTING
Information Patent Grant
Microchip having a plurality of reconfigurable test structures
- Patent number 11,237,211
- Issue date Feb 1, 2022
- Hochschule Hamm-Lippstadt
- Rene Krenz-Baath
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable test compression architecture input/output shift regis...
- Patent number 11,231,463
- Issue date Jan 25, 2022
- Texas Instruments Incorporated
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable test compression architecture input/output shift regis...
- Patent number 11,199,583
- Issue date Dec 14, 2021
- Texas Instruments Incorporated
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compressed test patterns for a field programmable gate array
- Patent number 11,193,975
- Issue date Dec 7, 2021
- Intel Corportion
- Christopher J. Nelson
- G01 - MEASURING TESTING
Information Patent Grant
Software defined LFSR for LOC delay testing low-power test compression
- Patent number 11,156,662
- Issue date Oct 26, 2021
- Tsinghua University
- Dong Xiang
- G01 - MEASURING TESTING
Information Patent Grant
Re-programmable self-test
- Patent number 11,092,650
- Issue date Aug 17, 2021
- Texas Instruments Incorporated
- Neil John Simpson
- G11 - INFORMATION STORAGE
Information Patent Grant
Test generation using testability-based guidance
- Patent number 10,996,273
- Issue date May 4, 2021
- SIEMENS INDUSTRY SOFTWARE INC.
- Sylwester Milewski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Test scheduling and test access in test compression environment
- Patent number 10,955,460
- Issue date Mar 23, 2021
- Mentor Graphics Corporation
- Mark Kassab
- G01 - MEASURING TESTING
Information Patent Grant
TCK to shift register and decompressor on shift-DR and pause-DR
- Patent number 10,845,415
- Issue date Nov 24, 2020
- Texas Instruments Incorporated
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CLUSTERING CLOCK CHAIN DATA FOR TEST-TIME REDUCTION
- Publication number 20240385241
- Publication date Nov 21, 2024
- STMicroelectronics International N.V.
- Sandeep JAIN
- G01 - MEASURING TESTING
Information Patent Application
Embedded PHY (EPHY) IP Core for FPGA
- Publication number 20240369628
- Publication date Nov 7, 2024
- SANDISK TECHNOLOGIES, INC.
- Doron GANON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMABLE TEST COMPRESSION ARCHITECTURE INPUT/OUTPUT SHIFT REGISTER
- Publication number 20240337691
- Publication date Oct 10, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BUILT-IN SELF-TEST ENHANCEMENTS
- Publication number 20240319268
- Publication date Sep 26, 2024
- QUALCOMM Incorporated
- Gaurav VERMA
- B60 - VEHICLES IN GENERAL
Information Patent Application
Scan Tree Construction
- Publication number 20240151771
- Publication date May 9, 2024
- TSINGHUA UNIVERSITY
- Can Xiang
- G01 - MEASURING TESTING
Information Patent Application
SCAN COMPRESSION THROUGH PIN DATA ENCODING
- Publication number 20230375617
- Publication date Nov 23, 2023
- STMicroelectronics International N.V.
- Sandeep Jain
- G01 - MEASURING TESTING
Information Patent Application
Embedded PHY (EPHY) IP Core for FPGA
- Publication number 20230305058
- Publication date Sep 28, 2023
- Western Digital Technologies, Inc.
- Doron GANON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DECOMPRESSION CIRCUIT, CIRCUIT GENERATION METHOD, AND IC CHIP
- Publication number 20230258717
- Publication date Aug 17, 2023
- Huawei Technologies Co., Ltd
- Yu HUANG
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PROGRAMMABLE TEST COMPRESSION ARCHITECTURE INPUT/OUTPUT SHIFT REGIS...
- Publication number 20230176123
- Publication date Jun 8, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SINGLE-PASS DIAGNOSIS FOR MULTIPLE CHAIN DEFECTS
- Publication number 20220128628
- Publication date Apr 28, 2022
- Synopsys, Inc.
- Emil Gizdarski
- G01 - MEASURING TESTING
Information Patent Application
PROGRAMMABLE TEST COMPRESSION ARCHITECTURE INPUT/OUTPUT SHIFT REGIS...
- Publication number 20220074989
- Publication date Mar 10, 2022
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAILURE PATTERN OBTAINING METHOD AND APPARATUS
- Publication number 20220026484
- Publication date Jan 27, 2022
- CHANGXIN MEMORY TECHNOLOGIES, INC
- Chiasheng LIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RE-PROGRAMMABLE SELF-TEST
- Publication number 20210333324
- Publication date Oct 28, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Neil John Simpson
- G01 - MEASURING TESTING
Information Patent Application
Embedded PHY (EPHY) IP Core for FPGA
- Publication number 20210270896
- Publication date Sep 2, 2021
- Western Digital Technologies, Inc.
- Doron GANON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMABLE SCAN COMPRESSION
- Publication number 20210072311
- Publication date Mar 11, 2021
- SEAGATE TECHNOLOGY LLC
- Bharat P. Londhe
- G01 - MEASURING TESTING
Information Patent Application
PROGRAMMABLE TEST COMPRESSION ARCHITECTURE INPUT/OUTPUT SHIFT REGIS...
- Publication number 20210041500
- Publication date Feb 11, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
Microchip Having A Plurality Of Reconfigurable Test Structures
- Publication number 20200271723
- Publication date Aug 27, 2020
- HOCHSCHULE HAMM-LIPPSTADT
- Rene KRENZ-BAATH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMABLE TEST COMPRESSION ARCHITECTURE INPUT/OUTPUT SHIFT REGIS...
- Publication number 20200264233
- Publication date Aug 20, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD OF CONTROLLING SELF-DIAGNOSIS
- Publication number 20200072903
- Publication date Mar 5, 2020
- RENESAS ELECTRONICS CORPORATION
- Yoshinori NISHIDA
- G01 - MEASURING TESTING
Information Patent Application
COMPRESSED TEST PATTERNS FOR A FIELD PROGRAMMABLE GATE ARRAY
- Publication number 20200003836
- Publication date Jan 2, 2020
- Intel Corporation
- Christopher J. NELSON
- G01 - MEASURING TESTING
Information Patent Application
SOFTWARE DEFINED LFSR FOR LOC DELAY TESTING LOW-POWER TEST COMPRESSION
- Publication number 20190339328
- Publication date Nov 7, 2019
- TSINGHUA UNIVERSITY
- Dong XIANG
- G01 - MEASURING TESTING
Information Patent Application
Test Generation Using Testability-Based Guidance
- Publication number 20190293718
- Publication date Sep 26, 2019
- Mentor Graphics Corporation
- Sylwester Milewski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Isometric Control Data Generation For Test Compression
- Publication number 20190293717
- Publication date Sep 26, 2019
- Mentor Graphics Corporation
- Yu Huang
- G01 - MEASURING TESTING
Information Patent Application
RE-PROGRAMMABLE SELF-TEST
- Publication number 20190227122
- Publication date Jul 25, 2019
- TEXAS INSTRUMENTS INCORPORATED
- Neil John Simpson
- G01 - MEASURING TESTING
Information Patent Application
PROGRAMMABLE TEST COMPRESSION ARCHITECTURE INPUT/OUTPUT SHIFT REGIS...
- Publication number 20190178939
- Publication date Jun 13, 2019
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RE-PROGRAMMABLE SELF-TEST
- Publication number 20190041459
- Publication date Feb 7, 2019
- TEXAS INSTRUMENTS INCORPORATED
- Neil John Simpson
- G01 - MEASURING TESTING
Information Patent Application
PROGRAMMABLE TEST COMPRESSION ARCHITECTURE INPUT/OUTPUT SHIFT REGIS...
- Publication number 20180180676
- Publication date Jun 28, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMABLE TEST COMPRESSION ARCHITECTURE INPUT/OUTPUT SHIFT REGIS...
- Publication number 20180164377
- Publication date Jun 14, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMABLE TEST COMPRESSION ARCHITECTURE INPUT/OUTPUT SHIFT REGIS...
- Publication number 20180080988
- Publication date Mar 22, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20170285106
- Publication date Oct 5, 2017
- RENESAS ELECTRONICS CORPORATION
- Yoichi MAEDA
- G01 - MEASURING TESTING

Test pattern compression or decompression

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Scan compression through pin data encoding

Scan tree construction

Embedded PHY (EPHY) IP core for FPGA

Decompression circuit, circuit generation method, and IC chip

Programmable test compression architecture input/output shift regis...

Single-pass diagnosis for multiple chain defects

Scan compression through pin data encoding

Re-programmable self-test

Programmable scan chain debug technique

Embedded PHY (EPHY) IP core for FPGA

Core partition circuit and testing device

Failure pattern obtaining method and apparatus

Trajectory-optimized test pattern generation for built-in self-test

Systems and methods for enhanced compression of trace data in an em...

Programmable test compression architecture input/output shift regis...

Isometric control data generation for test compression

Per-shift X-tolerant logic built-in self-test

Scan wrapper architecture for system-on-chip

Programmable test compactor for improving defect determination

Programmable scan compression

Semiconductor device and method of controlling self-diagnosis

Microchip having a plurality of reconfigurable test structures

Programmable test compression architecture input/output shift regis...

Programmable test compression architecture input/output shift regis...

Compressed test patterns for a field programmable gate array

Software defined LFSR for LOC delay testing low-power test compression

Re-programmable self-test

Test generation using testability-based guidance

Test scheduling and test access in test compression environment

TCK to shift register and decompressor on shift-DR and pause-DR

Patents Applicationslast 30 patents

CLUSTERING CLOCK CHAIN DATA FOR TEST-TIME REDUCTION

Embedded PHY (EPHY) IP Core for FPGA

PROGRAMMABLE TEST COMPRESSION ARCHITECTURE INPUT/OUTPUT SHIFT REGISTER

BUILT-IN SELF-TEST ENHANCEMENTS

Scan Tree Construction

SCAN COMPRESSION THROUGH PIN DATA ENCODING

Embedded PHY (EPHY) IP Core for FPGA

DECOMPRESSION CIRCUIT, CIRCUIT GENERATION METHOD, AND IC CHIP

PROGRAMMABLE TEST COMPRESSION ARCHITECTURE INPUT/OUTPUT SHIFT REGIS...

SINGLE-PASS DIAGNOSIS FOR MULTIPLE CHAIN DEFECTS

PROGRAMMABLE TEST COMPRESSION ARCHITECTURE INPUT/OUTPUT SHIFT REGIS...

FAILURE PATTERN OBTAINING METHOD AND APPARATUS

RE-PROGRAMMABLE SELF-TEST

Embedded PHY (EPHY) IP Core for FPGA

PROGRAMMABLE SCAN COMPRESSION

PROGRAMMABLE TEST COMPRESSION ARCHITECTURE INPUT/OUTPUT SHIFT REGIS...

Microchip Having A Plurality Of Reconfigurable Test Structures

PROGRAMMABLE TEST COMPRESSION ARCHITECTURE INPUT/OUTPUT SHIFT REGIS...

SEMICONDUCTOR DEVICE AND METHOD OF CONTROLLING SELF-DIAGNOSIS

COMPRESSED TEST PATTERNS FOR A FIELD PROGRAMMABLE GATE ARRAY

SOFTWARE DEFINED LFSR FOR LOC DELAY TESTING LOW-POWER TEST COMPRESSION

Test Generation Using Testability-Based Guidance

Isometric Control Data Generation For Test Compression

RE-PROGRAMMABLE SELF-TEST

PROGRAMMABLE TEST COMPRESSION ARCHITECTURE INPUT/OUTPUT SHIFT REGIS...

RE-PROGRAMMABLE SELF-TEST

PROGRAMMABLE TEST COMPRESSION ARCHITECTURE INPUT/OUTPUT SHIFT REGIS...

PROGRAMMABLE TEST COMPRESSION ARCHITECTURE INPUT/OUTPUT SHIFT REGIS...

PROGRAMMABLE TEST COMPRESSION ARCHITECTURE INPUT/OUTPUT SHIFT REGIS...

SEMICONDUCTOR DEVICE