Testing of digital circuits

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CPC
G01R31/317

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GPHYSICS G01Measuring instruments G01RMEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES G01R31/00Arrangements for testing electric properties Arrangements for locating electric faults Arrangements for electrical testing characterised by what is being tested not provided for elsewhere

Current Industry

G01R31/317Testing of digital circuits

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Methods and apparatus for testing inaccessible interface circuits i...
- Patent number 12,196,805
- Issue date Jan 14, 2025
- RAMBUS INC.
- Frederick A. Ware
- G01 - MEASURING TESTING
Information Patent Grant
Signal test
- Patent number 12,196,803
- Issue date Jan 14, 2025
- Infineon Technologies AG
- Muhammad Hassan
- G01 - MEASURING TESTING
Information Patent Grant
Electronic instrument for analyzing a DUT
- Patent number 12,196,809
- Issue date Jan 14, 2025
- Rohde & Schwarz GmbH & Co. KG
- Mathias Hellwig
- G01 - MEASURING TESTING
Information Patent Grant
Error protection analysis of an integrated circuit
- Patent number 12,188,979
- Issue date Jan 7, 2025
- International Business Machines Corporation
- Benjamin Neil Trombley
- G01 - MEASURING TESTING
Information Patent Grant
Oscillation period detection circuit and method, and semiconductor...
- Patent number 12,188,981
- Issue date Jan 7, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Zhiqiang Zhang
- G01 - MEASURING TESTING
Information Patent Grant
Test method for delay circuit and test circuitry
- Patent number 12,188,982
- Issue date Jan 7, 2025
- Realtek Semiconductor Corp.
- Kuo-Wei Chi
- G01 - MEASURING TESTING
Information Patent Grant
Test access port with address and command capability
- Patent number 12,188,980
- Issue date Jan 7, 2025
- Texas Instruments Incorporated
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Grant
Method and system for controlling actions of testbench components w...
- Patent number 12,188,983
- Issue date Jan 7, 2025
- HCL America Inc.
- Manickam Muthiah
- G01 - MEASURING TESTING
Information Patent Grant
Frequency-detecting circuit, duty-cycle corrector, and electronic d...
- Patent number 12,184,287
- Issue date Dec 31, 2024
- GigaDevice Semiconductor Inc.
- Menghai Wang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit having test circuitry for memory sub-systems
- Patent number 12,181,522
- Issue date Dec 31, 2024
- NXP USA, INC.
- Alexander Hoefler
- G11 - INFORMATION STORAGE
Information Patent Grant
Method, arrangement, and computer program product for organizing th...
- Patent number 12,182,612
- Issue date Dec 31, 2024
- Minima Processor Oy
- Lauri Koskinen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Intelligent riser testing device and methods
- Patent number 12,181,992
- Issue date Dec 31, 2024
- SANBlaze Technology, Inc.
- B. Vincent Asbridge
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
At-speed test access port operations
- Patent number 12,181,521
- Issue date Dec 31, 2024
- Texas Instruments Incorporated
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data correction and phase optimization in high-speed receivers
- Patent number 12,181,523
- Issue date Dec 31, 2024
- Diodes Incorporated
- Yu-Wei Lin
- G01 - MEASURING TESTING
Information Patent Grant
Chip test circuit and circuit test method
- Patent number 12,181,519
- Issue date Dec 31, 2024
- Huawei Technologies Co., Ltd.
- Changming Cui
- G01 - MEASURING TESTING
Information Patent Grant
Method for checking DFT circuit, test platform, storage medium and...
- Patent number 12,174,250
- Issue date Dec 24, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Teng Shi
- G01 - MEASURING TESTING
Information Patent Grant
System testing using partitioned and controlled noise
- Patent number 12,174,251
- Issue date Dec 24, 2024
- International Business Machines Corporation
- Mary P. Kusko
- G01 - MEASURING TESTING
Information Patent Grant
Circuit arrangement for validation of operation of a logic module i...
- Patent number 12,174,252
- Issue date Dec 24, 2024
- STMicroelectronics S.r.l.
- Diego Alagna
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for fault detection and reporting through seria...
- Patent number 12,169,218
- Issue date Dec 17, 2024
- Maxim Integrated Products, Inc.
- Ling Liu
- G01 - MEASURING TESTING
Information Patent Grant
Delay measurement system and measurement method
- Patent number 12,169,222
- Issue date Dec 17, 2024
- Taiwan Semiconductor Manufacturing Company Ltd.
- Shang Hsien Yang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Adaptive body biasing or voltage regulation using slack sensors
- Patent number 12,169,221
- Issue date Dec 17, 2024
- Dolphin Design
- Sebastien Genevey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3D tap and scan port architectures
- Patent number 12,164,001
- Issue date Dec 10, 2024
- Texas Instruments Incorporated
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Grant
Bi-directional scan flip-flop circuit and method
- Patent number 12,166,487
- Issue date Dec 10, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Huaixin Xian
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
On-chip checker for on-chip safety area
- Patent number 12,164,000
- Issue date Dec 10, 2024
- STMicroelectronics S.r.l.
- Alessandro Cannone
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus to inject errors in a memory block and validat...
- Patent number 12,164,401
- Issue date Dec 10, 2024
- NXP B.V.
- Umesh Pratap Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Time-to-digital converter circuit with self-testing function
- Patent number 12,164,002
- Issue date Dec 10, 2024
- STMICROELECTRONICS INTERNATIONAL N.V.
- John Kevin Moore
- G04 - HOROLOGY
Information Patent Grant
Electronic circuit performing analog built-in self test and operati...
- Patent number 12,158,497
- Issue date Dec 3, 2024
- Samsung Electronics Co., Ltd.
- Hyunseok Nam
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Automatic test system and automatic test method for integrated-circ...
- Patent number 12,158,494
- Issue date Dec 3, 2024
- Kingston Digital, Inc.
- Chao-Kun Lee
- B65 - CONVEYING PACKING STORING HANDLING THIN OR FILAMENTARY MATERIAL
Information Patent Grant
Signal processing apparatus
- Patent number 12,158,503
- Issue date Dec 3, 2024
- Hyundai Autoever Corp.
- Bong-Gu Lee
- G01 - MEASURING TESTING
Information Patent Grant
Integrated circuit with state machine for pre-boot self-tests
- Patent number 12,158,836
- Issue date Dec 3, 2024
- Texas Instruments Incorporated
- Venkateswar Reddy Kowkutla
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
TEST APPARATUS, TEST METHOD, AND COMPUTER-READABLE STORAGE MEDIUM
- Publication number 20250012847
- Publication date Jan 9, 2025
- Advantest Corporation
- Kotaro HASEGAWA
- G01 - MEASURING TESTING
Information Patent Application
FULLY DIGITAL DOMAIN INTEGRATED FREQUENCY MONITOR
- Publication number 20250012857
- Publication date Jan 9, 2025
- NVIDIA Corporation
- Ofek Abadi
- G01 - MEASURING TESTING
Information Patent Application
METHODS AND APPARATUS TO ESTIMATE ANALOG TO DIGITAL CONVERTER (ADC)...
- Publication number 20250004049
- Publication date Jan 2, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Nithin Gopinath
- G01 - MEASURING TESTING
Information Patent Application
METHOD FOR ANALYZING A DEMODULATED MEASUREMENT SIGNAL, COMPUTER-REA...
- Publication number 20250004050
- Publication date Jan 2, 2025
- ROHDE &SCHWARZ GMBH & CO. KG
- PB BALASUBRAMANIUM
- G01 - MEASURING TESTING
Information Patent Application
PROTECTION OF THE CONTENT OF A FUSE MEMORY
- Publication number 20250004051
- Publication date Jan 2, 2025
- STMicroelectronics (Grenoble 2) SAS
- Mark Trimmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE PULSE EXTRACTION FOR TRANSMITTER CALIBRATION
- Publication number 20250004014
- Publication date Jan 2, 2025
- Tektronix, Inc.
- Kan Tan
- G01 - MEASURING TESTING
Information Patent Application
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, VEHICLE-MOUNTED APPLIANCE,...
- Publication number 20240426899
- Publication date Dec 26, 2024
- Rohm Co., Ltd.
- Takumi YAMADA
- G01 - MEASURING TESTING
Information Patent Application
GENERATING A TEST PROGRAM
- Publication number 20240426906
- Publication date Dec 26, 2024
- Teradyne, Inc.
- Charles J. Carline
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND SYSTEM FOR CONTROLLING ACTIONS OF TESTBENCH COMPONENTS W...
- Publication number 20240418774
- Publication date Dec 19, 2024
- HCL America Inc.
- MANICKAM MUTHIAH
- G01 - MEASURING TESTING
Information Patent Application
SIGNAL INTEGRITY MONITORING SYSTEM
- Publication number 20240410943
- Publication date Dec 12, 2024
- Synopsys, Inc.
- Firooz MASSOUDI
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ELECTRONIC DEVICE FOR IMPROVING A PERFORMANCE OF A SIGNAL CHAIN
- Publication number 20240410942
- Publication date Dec 12, 2024
- ROHDE &SCHWARZ GMBH & CO. KG
- Matthias RUENGELER
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SELECTABLE JTAG OR TRACE ACCESS WITH DATA STORE AND OUTPUT
- Publication number 20240402247
- Publication date Dec 5, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR PROTECTION ANALYSIS OF AN INTEGRATED CIRCUIT
- Publication number 20240402246
- Publication date Dec 5, 2024
- International Business Machines Corporation
- BENJAMIN NEIL TROMBLEY
- G01 - MEASURING TESTING
Information Patent Application
MEMORY DEVICE INCLUDING A PLURALITY OF PADS AND METHOD OF DETECTING...
- Publication number 20240402248
- Publication date Dec 5, 2024
- Samsung Electronics Co., Ltd.
- Dojong CHUN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEM AND METHOD FOR DETECTING FAULTS IN INTEGRATED CIRCUITS
- Publication number 20240393391
- Publication date Nov 28, 2024
- NXP B.V.
- Jorge Ernesto Perez Chamorro
- G01 - MEASURING TESTING
Information Patent Application
DIE-TO-DIE CONNECTIVITY MONITORING
- Publication number 20240393390
- Publication date Nov 28, 2024
- PROTEANTECS LTD.
- Eyal FAYNEH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEM AND METHOD FOR FAULT SEQUENCE RECORDING
- Publication number 20240393392
- Publication date Nov 28, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Abhinay Patil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EVALUATION APPARATUS, EVALUATION METHOD, AND NON-TRANSITORY COMPUTE...
- Publication number 20240385239
- Publication date Nov 21, 2024
- Advantest Corporation
- Yasunori MATSUZAKI
- G01 - MEASURING TESTING
Information Patent Application
VERIFICATION METHOD AND VERIFICATION DEVICE
- Publication number 20240385240
- Publication date Nov 21, 2024
- REALTEK SEMICONDUCTOR CORPORATION
- Xianghua SHEN
- G01 - MEASURING TESTING
Information Patent Application
PHOTONIC WAVEGUIDE POWER AND PHASE MONITOR
- Publication number 20240385243
- Publication date Nov 21, 2024
- IMEC vzw
- Wim BOGAERTS
- G01 - MEASURING TESTING
Information Patent Application
CLUSTERING CLOCK CHAIN DATA FOR TEST-TIME REDUCTION
- Publication number 20240385241
- Publication date Nov 21, 2024
- STMicroelectronics International N.V.
- Sandeep JAIN
- G01 - MEASURING TESTING
Information Patent Application
ELECTRONIC CIRCUIT AND METHOD OF ERROR CORRECTION
- Publication number 20240385242
- Publication date Nov 21, 2024
- Taiwan Semiconductor Manufacturing company Ltd.
- CHIA-CHUN LIAO
- G01 - MEASURING TESTING
Information Patent Application
ADDRESSABLE TEST ACCESS PORT
- Publication number 20240385244
- Publication date Nov 21, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
SERIAL TEST CIRCUIT FOR CONTROLLABLE CHIPLETS
- Publication number 20240369631
- Publication date Nov 7, 2024
- Nanjing University Of Posts And Telecommunications
- Zhikuang CAI
- G01 - MEASURING TESTING
Information Patent Application
DEVICE FOR MEASURING FREQUENCY RESPONSE OF A WAFER
- Publication number 20240369627
- Publication date Nov 7, 2024
- Taiwan Semiconductor Manufacturing company Ltd.
- YUNG-SHUN CHEN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD FOR SEPARATING AND MODELING N-UI JITTER BASED ON SPECTRUM
- Publication number 20240369625
- Publication date Nov 7, 2024
- Tektronix, Inc.
- Mark L. Guenther
- G01 - MEASURING TESTING
Information Patent Application
ARRAY OF UNIT CELLS HAVING PAD STRUCTURES
- Publication number 20240369626
- Publication date Nov 7, 2024
- TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Yu-Ching CHIU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOCK GATING CIRCUITS AND METHODS FOR DUAL-EDGE-TRIGGERED APPLICATIONS
- Publication number 20240361384
- Publication date Oct 31, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Arnab Khawas
- G01 - MEASURING TESTING
Information Patent Application
SCAN CLOCK GATING CONTROLLER AND METHOD FOR PERFORMING STUCK-AT FAU...
- Publication number 20240353489
- Publication date Oct 24, 2024
- Realtek Semiconductor Corp.
- Dong-Zhen Li
- G01 - MEASURING TESTING
Information Patent Application
MULTI-ORDER OPTICAL MODULATOR AND MODULATION METHOD FOR ON-CHIP OPT...
- Publication number 20240353487
- Publication date Oct 24, 2024
- SUN YAT-SEN UNIVERSITY
- Zhaohui LI
- G01 - MEASURING TESTING

Testing of digital circuits

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Methods and apparatus for testing inaccessible interface circuits i...

Signal test

Electronic instrument for analyzing a DUT

Error protection analysis of an integrated circuit

Oscillation period detection circuit and method, and semiconductor...

Test method for delay circuit and test circuitry

Test access port with address and command capability

Method and system for controlling actions of testbench components w...

Frequency-detecting circuit, duty-cycle corrector, and electronic d...

Integrated circuit having test circuitry for memory sub-systems

Method, arrangement, and computer program product for organizing th...

Intelligent riser testing device and methods

At-speed test access port operations

Data correction and phase optimization in high-speed receivers

Chip test circuit and circuit test method

Method for checking DFT circuit, test platform, storage medium and...

System testing using partitioned and controlled noise

Circuit arrangement for validation of operation of a logic module i...

Systems and methods for fault detection and reporting through seria...

Delay measurement system and measurement method

Adaptive body biasing or voltage regulation using slack sensors

3D tap and scan port architectures

Bi-directional scan flip-flop circuit and method

On-chip checker for on-chip safety area

Method and apparatus to inject errors in a memory block and validat...

Time-to-digital converter circuit with self-testing function

Electronic circuit performing analog built-in self test and operati...

Automatic test system and automatic test method for integrated-circ...

Signal processing apparatus

Integrated circuit with state machine for pre-boot self-tests

Patents Applicationslast 30 patents

TEST APPARATUS, TEST METHOD, AND COMPUTER-READABLE STORAGE MEDIUM

FULLY DIGITAL DOMAIN INTEGRATED FREQUENCY MONITOR

METHODS AND APPARATUS TO ESTIMATE ANALOG TO DIGITAL CONVERTER (ADC)...

METHOD FOR ANALYZING A DEMODULATED MEASUREMENT SIGNAL, COMPUTER-REA...

PROTECTION OF THE CONTENT OF A FUSE MEMORY

MULTIPLE PULSE EXTRACTION FOR TRANSMITTER CALIBRATION

SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, VEHICLE-MOUNTED APPLIANCE,...

GENERATING A TEST PROGRAM

METHOD AND SYSTEM FOR CONTROLLING ACTIONS OF TESTBENCH COMPONENTS W...

SIGNAL INTEGRITY MONITORING SYSTEM

ELECTRONIC DEVICE FOR IMPROVING A PERFORMANCE OF A SIGNAL CHAIN

SELECTABLE JTAG OR TRACE ACCESS WITH DATA STORE AND OUTPUT

ERROR PROTECTION ANALYSIS OF AN INTEGRATED CIRCUIT

MEMORY DEVICE INCLUDING A PLURALITY OF PADS AND METHOD OF DETECTING...

SYSTEM AND METHOD FOR DETECTING FAULTS IN INTEGRATED CIRCUITS

DIE-TO-DIE CONNECTIVITY MONITORING

SYSTEM AND METHOD FOR FAULT SEQUENCE RECORDING

EVALUATION APPARATUS, EVALUATION METHOD, AND NON-TRANSITORY COMPUTE...

VERIFICATION METHOD AND VERIFICATION DEVICE

PHOTONIC WAVEGUIDE POWER AND PHASE MONITOR

CLUSTERING CLOCK CHAIN DATA FOR TEST-TIME REDUCTION

ELECTRONIC CIRCUIT AND METHOD OF ERROR CORRECTION

ADDRESSABLE TEST ACCESS PORT

SERIAL TEST CIRCUIT FOR CONTROLLABLE CHIPLETS

DEVICE FOR MEASURING FREQUENCY RESPONSE OF A WAFER

METHOD FOR SEPARATING AND MODELING N-UI JITTER BASED ON SPECTRUM

ARRAY OF UNIT CELLS HAVING PAD STRUCTURES

CLOCK GATING CIRCUITS AND METHODS FOR DUAL-EDGE-TRIGGERED APPLICATIONS

SCAN CLOCK GATING CONTROLLER AND METHOD FOR PERFORMING STUCK-AT FAU...

MULTI-ORDER OPTICAL MODULATOR AND MODULATION METHOD FOR ON-CHIP OPT...