Testing of digital circuits

Industry

CPC
G01R31/317

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GPHYSICS G01Measuring instruments G01RMEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES G01R31/00Arrangements for testing electric properties Arrangements for locating electric faults Arrangements for electrical testing characterised by what is being tested not provided for elsewhere

Current Industry

G01R31/317Testing of digital circuits

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Debug probe for measuring at least one property of a target system
- Patent number 12,270,855
- Issue date Apr 8, 2025
- ARM Limited
- Christopher James Styles
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Detection circuit and detection method
- Patent number 12,270,856
- Issue date Apr 8, 2025
- Realtek Semiconductor Corporation
- Chun-Yi Kuo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Signal integrity monitoring system
- Patent number 12,270,857
- Issue date Apr 8, 2025
- Synopsys, Inc.
- Firooz Massoudi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Error rate measurement apparatus and error rate measurement method
- Patent number 12,265,120
- Issue date Apr 1, 2025
- Anritsu Corporation
- Hiroyuki Onuma
- G01 - MEASURING TESTING
Information Patent Grant
Test time reduction in circuits with redundancy flip-flops
- Patent number 12,265,124
- Issue date Apr 1, 2025
- STMICROELECTRONICS INTERNATIONAL N.V.
- Sandeep Jain
- G01 - MEASURING TESTING
Information Patent Grant
System and method for separation and classification of signals usin...
- Patent number 12,265,125
- Issue date Apr 1, 2025
- Tektronix, Inc.
- John J. Pickerd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory profiler for emulation
- Patent number 12,265,122
- Issue date Apr 1, 2025
- Synopsys, Inc.
- Prashant Kumar Mishra
- G01 - MEASURING TESTING
Information Patent Grant
Adhesive composition and methods of forming the same
- Patent number 12,258,495
- Issue date Mar 25, 2025
- Saint-Gobain Performance Plastics Corporation
- Nicky Chan
- C09 - DYES PAINTS POLISHES NATURAL RESINS ADHESIVES MISCELLANEOUS COMPOSITION...
Information Patent Grant
Clock recovery unit adjustment
- Patent number 12,255,979
- Issue date Mar 18, 2025
- Keysight Technologies, Inc.
- Marlin E. Viss
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Mechanism capable of performing on-chip test and verification
- Patent number 12,253,564
- Issue date Mar 18, 2025
- Silicon Motion, Inc.
- Tse-Yen Liu
- G01 - MEASURING TESTING
Information Patent Grant
Integrated circuit applicable to performing system protection throu...
- Patent number 12,254,125
- Issue date Mar 18, 2025
- Realtek Semiconductor Corp.
- Chang-Hsien Tai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing system, related integrated circuit, device and method
- Patent number 12,253,562
- Issue date Mar 18, 2025
- STMicroelectronics Application GmbH
- Roberto Colombo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Device and method for measuring a duty cycle of a clock signal
- Patent number 12,253,563
- Issue date Mar 18, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Eric Soenen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor device, debug system, and debug method
- Patent number 12,253,561
- Issue date Mar 18, 2025
- Renesas Electronics Corporation
- Masahide Matsumoto
- G01 - MEASURING TESTING
Information Patent Grant
Detecting a function section in a representation of a quantum circuit
- Patent number 12,248,020
- Issue date Mar 11, 2025
- CLASSIQ TECHNOLOGIES LTD.
- Amir Naveh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Debug trace microsectors
- Patent number 12,248,021
- Issue date Mar 11, 2025
- Altera Corporation
- Sean R. Atsatt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for detecting defective logic devices
- Patent number 12,248,022
- Issue date Mar 11, 2025
- Taiwan Semiconductor Manufacturing Company Ltd.
- Chi-Che Wu
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for capture clock control to minimize toggling...
- Patent number 12,241,931
- Issue date Mar 4, 2025
- MARVELL ASIA PTE. LTD.
- Balaji Upputuri
- G01 - MEASURING TESTING
Information Patent Grant
Testing method and testing system
- Patent number 12,237,029
- Issue date Feb 25, 2025
- NANYA TECHNOLOGY CORPORATION
- Bo Jung Peng
- G11 - INFORMATION STORAGE
Information Patent Grant
Test system that converts command syntaxes
- Patent number 12,235,317
- Issue date Feb 25, 2025
- Teradyne, Inc.
- Richard W. Fanning
- G01 - MEASURING TESTING
Information Patent Grant
Methods for determining and calibrating non-linearity in a Phase In...
- Patent number 12,235,318
- Issue date Feb 25, 2025
- Samsung Electronics Co., Ltd.
- Gunjan Mandal
- G01 - MEASURING TESTING
Information Patent Grant
System and method for fault sequence recording
- Patent number 12,235,319
- Issue date Feb 25, 2025
- Texas Instruments Incorporated
- Abhinay Patil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and circuit for performing error detection on a clock gated...
- Patent number 12,229,002
- Issue date Feb 18, 2025
- Imagination Technologies Limited
- Faizan Nazar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated communication link testing
- Patent number 12,222,388
- Issue date Feb 11, 2025
- Tektronix, Inc.
- Pirooz Hojabri
- G01 - MEASURING TESTING
Information Patent Grant
Fault tolerant synchronizer
- Patent number 12,222,390
- Issue date Feb 11, 2025
- Texas Instruments Incorporated
- Denis Roland Beaudoin
- G01 - MEASURING TESTING
Information Patent Grant
Test board for testing memory signal
- Patent number 12,222,389
- Issue date Feb 11, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Honglong Shi
- G01 - MEASURING TESTING
Information Patent Grant
Photonic wafer level testing systems, devices, and methods of opera...
- Patent number 12,216,020
- Issue date Feb 4, 2025
- STMicroelectronics S.r.l.
- Marco Piazza
- G01 - MEASURING TESTING
Information Patent Grant
Performing scan data transfer inside multi-die package with serdes...
- Patent number 12,216,162
- Issue date Feb 4, 2025
- Advanced Micro Devices, Inc.
- Ahmet Tokuz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
On-die aging measurements for dynamic timing modeling
- Patent number 12,216,150
- Issue date Feb 4, 2025
- Altera Corporation
- Dheeraj Subbareddy
- G01 - MEASURING TESTING
Information Patent Grant
Clock shaper circuit for transition fault testing
- Patent number 12,216,160
- Issue date Feb 4, 2025
- Texas Instruments Incorporated
- Wilson Pradeep
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
SYSTEM AND METHOD FOR GENERATING CLOCK PULSES FOR AT-SPEED TESTING...
- Publication number 20250116703
- Publication date Apr 10, 2025
- NXP B.V.
- Chandan Gupta
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PHOTONIC WAFER LEVEL TESTING SYSTEMS, DEVICES, AND METHODS OF OPERA...
- Publication number 20250116570
- Publication date Apr 10, 2025
- STMicroelectronics S.r.l.
- Marco Piazza
- G01 - MEASURING TESTING
Information Patent Application
CLOCK SYNCHRONIZATION CIRCUIT
- Publication number 20250116702
- Publication date Apr 10, 2025
- TEXAS INSTRUMENTS INCORPORATED
- David P MAGEE
- G01 - MEASURING TESTING
Information Patent Application
FLEXIBLE TEST INSTRUCTION SET ARCHITECTURE
- Publication number 20250116701
- Publication date Apr 10, 2025
- Signature IP Corporation
- Shivam Mehra
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND APPARATUS TO DETECT COMPUTING SYSTEM HARDWARE DEFECTS US...
- Publication number 20250110175
- Publication date Apr 3, 2025
- Intel Corporation
- Rakesh KANDULA
- G01 - MEASURING TESTING
Information Patent Application
FAULT DETECTION CIRCUIT
- Publication number 20250110176
- Publication date Apr 3, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Weibing Jing
- G01 - MEASURING TESTING
Information Patent Application
TESTING MULTI-CYCLE PATHS BASED ON CLOCK PATTERN
- Publication number 20250102570
- Publication date Mar 27, 2025
- ADVANCED MICRO DEVICES, INC.
- Nehal Patel
- G01 - MEASURING TESTING
Information Patent Application
CIRCUIT CONVERSION METHOD, LATCH CIRCUIT, AND C-ELEMENT CIRCUIT
- Publication number 20250102572
- Publication date Mar 27, 2025
- Sony Semiconductor Solutions Corporation
- Yuji Kaba
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
FAILURE DETECTION CIRCUIT, SEMICONDUCTOR DEVICE AND FAILURE DETECTI...
- Publication number 20250102571
- Publication date Mar 27, 2025
- RENESAS ELECTRONICS CORPORATION
- Akira MIYAGUCHI
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
3D TAP & SCAN PORT ARCHITECTURES
- Publication number 20250102569
- Publication date Mar 27, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
TEST TIME REDUCTION IN CIRCUITS WITH REDUNDANCY FLIP-FLOPS
- Publication number 20250102574
- Publication date Mar 27, 2025
- STMicroelectronics International N.V.
- Sandeep Jain
- G01 - MEASURING TESTING
Information Patent Application
APPARATUS FOR TESTING A DEVICE UNDER TEST SEPARATING ERRORS WITHIN...
- Publication number 20250093414
- Publication date Mar 20, 2025
- Advantest Corporation
- Michael BRAUN
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND SYSTEM FOR CONTROLLING ACTIONS OF TESTBENCH COMPONENTS W...
- Publication number 20250093415
- Publication date Mar 20, 2025
- HCL America Inc.
- MANICKAM MUTHIAH
- G01 - MEASURING TESTING
Information Patent Application
Scan Data Transfer Circuits for Multi-die Chip Testing
- Publication number 20250093416
- Publication date Mar 20, 2025
- Apple Inc.
- Bo Yang
- G01 - MEASURING TESTING
Information Patent Application
BI-DIRECTIONAL SCAN FLIP-FLOP CIRCUIT AND METHOD
- Publication number 20250096783
- Publication date Mar 20, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Huaixin XIAN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TEST APPARATUS AND TEST METHOD
- Publication number 20250095763
- Publication date Mar 20, 2025
- KIOXIA Corporation
- Michiru HOGYOKU
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR FACILIATATING A DYNAMIC CLOCK FREQUENCY...
- Publication number 20250085344
- Publication date Mar 13, 2025
- NXP B.V.
- CHANDAN GUPTA
- G01 - MEASURING TESTING
Information Patent Application
DATA CORRECTION AND PHASE OPTIMIZATION IN HIGH-SPEED RECEIVERS
- Publication number 20250085345
- Publication date Mar 13, 2025
- DIODES INCORPORATED
- Yu-Wei Lin
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
FUNCTIONAL TESTING DEVICE
- Publication number 20250085342
- Publication date Mar 13, 2025
- INVENTEC (PUDONG) TECHNOLOGY CORPORATION
- Chih-Jen CHIN
- G01 - MEASURING TESTING
Information Patent Application
COMMANDED JTAG TEST ACCESS PORT OPERATIONS
- Publication number 20250085343
- Publication date Mar 13, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WAVEFORM-AWARE MIXED SIGNAL MEASUREMENT SYSTEM FOR BUS TRAFFIC REDU...
- Publication number 20250086138
- Publication date Mar 13, 2025
- QUALCOMM Incorporated
- Mustafa KESKIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RECEIVING CIRCUIT IN TEST DEVICE, TEST SYSTEM HAVING THE SAME, AND...
- Publication number 20250076381
- Publication date Mar 6, 2025
- Samsung Electronics Co., Ltd.
- Seongkwan LEE
- G01 - MEASURING TESTING
Information Patent Application
Diagnosing Identical Circuit Blocks in Data Streaming Environment
- Publication number 20250076376
- Publication date Mar 6, 2025
- Siemens Industry Software Inc.
- Wu-Tung Cheng
- G01 - MEASURING TESTING
Information Patent Application
BUILT-IN SELF-TEST CIRCUIT AND TEMPERATURE MEASUREMENT CIRCUIT INCL...
- Publication number 20250076377
- Publication date Mar 6, 2025
- Samsung Electronics Co., Ltd.
- Junhee Shin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PROCESSOR DEBUGGING OVER AN INTERCONNECT FABRIC
- Publication number 20250076375
- Publication date Mar 6, 2025
- International Business Machines Corporation
- Michael James BECHT
- G01 - MEASURING TESTING
Information Patent Application
SOC CHIP DISTRIBUTED SIMULATION AND VERIFICATION PLATFORM AND METHOD
- Publication number 20250076378
- Publication date Mar 6, 2025
- Jinan Xinyu Software Technology Co., Ltd.
- Min Yi
- G01 - MEASURING TESTING
Information Patent Application
EYE-DIAGRAM INDEX ANALYTIC METHOD, COMPUTER READABLE RECORDING MEDI...
- Publication number 20250076379
- Publication date Mar 6, 2025
- NOVATEK MICROELECTRONICS CORP.
- Kai Li
- G01 - MEASURING TESTING
Information Patent Application
Debug Trace Fabric for Integrated Circuit
- Publication number 20250077384
- Publication date Mar 6, 2025
- Apple Inc.
- Charles J. Fleckenstein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SUB-SAMPLED BASED INSTRUMENT NOISE CORRECTION FOR JITTER MEASUREMENTS
- Publication number 20250067801
- Publication date Feb 27, 2025
- Skyworks Solutions, Inc.
- Daniel de Godoy Peixoto
- G01 - MEASURING TESTING
Information Patent Application
SUPERCONDUCTIVE INTEGRATED CIRCUIT DEVICES WITH ON-CHIP TESTING
- Publication number 20250067802
- Publication date Feb 27, 2025
- Synopsys, Inc.
- Abdelrahman G. QOUTB
- G01 - MEASURING TESTING

Testing of digital circuits

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Debug probe for measuring at least one property of a target system

Detection circuit and detection method

Signal integrity monitoring system

Error rate measurement apparatus and error rate measurement method

Test time reduction in circuits with redundancy flip-flops

System and method for separation and classification of signals usin...

Memory profiler for emulation

Adhesive composition and methods of forming the same

Clock recovery unit adjustment

Mechanism capable of performing on-chip test and verification

Integrated circuit applicable to performing system protection throu...

Processing system, related integrated circuit, device and method

Device and method for measuring a duty cycle of a clock signal

Semiconductor device, debug system, and debug method

Detecting a function section in a representation of a quantum circuit

Debug trace microsectors

Method and apparatus for detecting defective logic devices

Method and apparatus for capture clock control to minimize toggling...

Testing method and testing system

Test system that converts command syntaxes

Methods for determining and calibrating non-linearity in a Phase In...

System and method for fault sequence recording

Method and circuit for performing error detection on a clock gated...

Integrated communication link testing

Fault tolerant synchronizer

Test board for testing memory signal

Photonic wafer level testing systems, devices, and methods of opera...

Performing scan data transfer inside multi-die package with serdes...

On-die aging measurements for dynamic timing modeling

Clock shaper circuit for transition fault testing

Patents Applicationslast 30 patents

SYSTEM AND METHOD FOR GENERATING CLOCK PULSES FOR AT-SPEED TESTING...

PHOTONIC WAFER LEVEL TESTING SYSTEMS, DEVICES, AND METHODS OF OPERA...

CLOCK SYNCHRONIZATION CIRCUIT

FLEXIBLE TEST INSTRUCTION SET ARCHITECTURE

METHOD AND APPARATUS TO DETECT COMPUTING SYSTEM HARDWARE DEFECTS US...

FAULT DETECTION CIRCUIT

TESTING MULTI-CYCLE PATHS BASED ON CLOCK PATTERN

CIRCUIT CONVERSION METHOD, LATCH CIRCUIT, AND C-ELEMENT CIRCUIT

FAILURE DETECTION CIRCUIT, SEMICONDUCTOR DEVICE AND FAILURE DETECTI...

3D TAP & SCAN PORT ARCHITECTURES

TEST TIME REDUCTION IN CIRCUITS WITH REDUNDANCY FLIP-FLOPS

APPARATUS FOR TESTING A DEVICE UNDER TEST SEPARATING ERRORS WITHIN...

METHOD AND SYSTEM FOR CONTROLLING ACTIONS OF TESTBENCH COMPONENTS W...

Scan Data Transfer Circuits for Multi-die Chip Testing

BI-DIRECTIONAL SCAN FLIP-FLOP CIRCUIT AND METHOD

TEST APPARATUS AND TEST METHOD

APPARATUSES AND METHODS FOR FACILIATATING A DYNAMIC CLOCK FREQUENCY...

DATA CORRECTION AND PHASE OPTIMIZATION IN HIGH-SPEED RECEIVERS

FUNCTIONAL TESTING DEVICE

COMMANDED JTAG TEST ACCESS PORT OPERATIONS

WAVEFORM-AWARE MIXED SIGNAL MEASUREMENT SYSTEM FOR BUS TRAFFIC REDU...

RECEIVING CIRCUIT IN TEST DEVICE, TEST SYSTEM HAVING THE SAME, AND...

Diagnosing Identical Circuit Blocks in Data Streaming Environment

BUILT-IN SELF-TEST CIRCUIT AND TEMPERATURE MEASUREMENT CIRCUIT INCL...

PROCESSOR DEBUGGING OVER AN INTERCONNECT FABRIC

SOC CHIP DISTRIBUTED SIMULATION AND VERIFICATION PLATFORM AND METHOD

EYE-DIAGRAM INDEX ANALYTIC METHOD, COMPUTER READABLE RECORDING MEDI...

Debug Trace Fabric for Integrated Circuit

SUB-SAMPLED BASED INSTRUMENT NOISE CORRECTION FOR JITTER MEASUREMENTS

SUPERCONDUCTIVE INTEGRATED CIRCUIT DEVICES WITH ON-CHIP TESTING