Testing of digital circuits

Industry

CPC
G01R31/317

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GPHYSICS G01Measuring instruments G01RMEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES G01R31/00Arrangements for testing electric properties Arrangements for locating electric faults Arrangements for electrical testing characterised by what is being tested not provided for elsewhere

Current Industry

G01R31/317Testing of digital circuits

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Scan circuit and method
- Patent number 12,360,161
- Issue date Jul 15, 2025
- STMICROELECTRONICS INTERNATIONAL N.V.
- Venkata Narayanan Srinivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for networked device testing
- Patent number 12,360,160
- Issue date Jul 15, 2025
- Intel Corporation
- Kshitij Doshi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Functional circuit block harvesting in computer systems
- Patent number 12,361,191
- Issue date Jul 15, 2025
- Apple Inc.
- Peter A. Lisherness
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit and an electronic device including integrated ci...
- Patent number 12,352,813
- Issue date Jul 8, 2025
- Samsung Electronics Co., Ltd.
- Yeon Ho Jung
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Interposer circuit
- Patent number 12,352,814
- Issue date Jul 8, 2025
- Texas Instruments Incorporated
- Lee D. Whetsel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Optical wafer-scale photodiode bandwidth measurement system
- Patent number 12,353,007
- Issue date Jul 8, 2025
- Cisco Technology, Inc.
- Attila Mekis
- G01 - MEASURING TESTING
Information Patent Grant
Validating test patterns ported between different levels of a hiera...
- Patent number 12,352,811
- Issue date Jul 8, 2025
- Synopsys, Inc.
- Andrea Costa
- G01 - MEASURING TESTING
Information Patent Grant
Integrated test cell using active thermal interposer (ATI) with par...
- Patent number 12,345,756
- Issue date Jul 1, 2025
- ADVANTEST TEST SOLUTIONS, INC.
- Karthik Ranganathan
- G01 - MEASURING TESTING
Information Patent Grant
Determination device, test system, and generation device
- Patent number 12,345,765
- Issue date Jul 1, 2025
- Kioxia Corporation
- Mikio Shiraishi
- G01 - MEASURING TESTING
Information Patent Grant
Comparator testing circuit and testing method thereof
- Patent number 12,345,763
- Issue date Jul 1, 2025
- Nuvoton Technology Corporation
- Chih-Ping Lu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Built-in self-test circuit and temperature measurement circuit incl...
- Patent number 12,345,762
- Issue date Jul 1, 2025
- Samsung Electronics Co., Ltd.
- Junhee Shin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
NPU capable of being tested during runtime
- Patent number 12,339,318
- Issue date Jun 24, 2025
- DEEPX CO., LTD.
- Lok Won Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for real time outlier detection and product re-bi...
- Patent number 12,339,305
- Issue date Jun 24, 2025
- Optimal Plus Ltd.
- Shaul Teplinsky
- B07 - SEPARATING SOLIDS FROM SOLIDS SORTING
Information Patent Grant
Oscillation handling method, apparatus using the same, and storage...
- Patent number 12,339,319
- Issue date Jun 24, 2025
- SHENZHEN HUAPTEC CO., LTD.
- Chuanzhen Ou
- G01 - MEASURING TESTING
Information Patent Grant
Semiconductor device and method of failure analysis for semiconduct...
- Patent number 12,339,321
- Issue date Jun 24, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Shih-Wei Peng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for automatic fault detection in an electronic de...
- Patent number 12,332,304
- Issue date Jun 17, 2025
- Cadence Design Systems, Inc.
- Sushobhit Singh
- G01 - MEASURING TESTING
Information Patent Grant
Built-in testing in modular system-on-chip device
- Patent number 12,332,310
- Issue date Jun 17, 2025
- MARVELL ASIA PTE. LTD.
- Xiongzhi Ning
- G01 - MEASURING TESTING
Information Patent Grant
Transmitter for ultra-high speed and storage device including the same
- Patent number 12,332,307
- Issue date Jun 17, 2025
- Samsung Electronics Co., Ltd.
- Ikjin Jo
- G01 - MEASURING TESTING
Information Patent Grant
Machine-learning-based design-for-test (DFT) recommendation system...
- Patent number 12,333,227
- Issue date Jun 17, 2025
- Synopsys, Inc.
- Apik A Zorian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operating and testing semiconductor devices
- Patent number 12,334,170
- Issue date Jun 17, 2025
- Samsung Electronics Co., Ltd.
- Taewook Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Constructing quantum processes for quantum processors
- Patent number 12,333,380
- Issue date Jun 17, 2025
- Rigetti & Co, LLC
- William J. Zeng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for implementing a scalable digital infrastruc...
- Patent number 12,332,306
- Issue date Jun 17, 2025
- TOKYO ELECTRON U.S. HOLDINGS, INC.
- Richard Wunderlich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit and method to measure simulation to silicon timing correlation
- Patent number 12,332,305
- Issue date Jun 17, 2025
- MediaTek Singapore Pte Ltd.
- Ashish Kumar Nayak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Software and firmware support for device interface board configured...
- Patent number 12,320,851
- Issue date Jun 3, 2025
- Advantest Corporation
- Mei-Mei Su
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Test device for testing on-chip clock controller having debug function
- Patent number 12,320,847
- Issue date Jun 3, 2025
- Realtek Semiconductor Corporation
- Sheng-Ping Yung
- G01 - MEASURING TESTING
Information Patent Grant
High throughput sort
- Patent number 12,320,845
- Issue date Jun 3, 2025
- Infineon Technologies AG
- David Addison
- G01 - MEASURING TESTING
Information Patent Grant
Superconductive integrated circuit devices with on-chip testing
- Patent number 12,320,848
- Issue date Jun 3, 2025
- Synopsys, Inc.
- Abdelrahman G. Qoutb
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock control circuit and method
- Patent number 12,320,849
- Issue date Jun 3, 2025
- Realtek Semiconductor Corporation
- Yu-Ting Li
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Inspection device for a semiconductor device
- Patent number 12,320,842
- Issue date Jun 3, 2025
- Hamamatsu Photonics K.K.
- Tomonori Nakamura
- G01 - MEASURING TESTING
Information Patent Grant
Processor debugging over an interconnect fabric
- Patent number 12,320,843
- Issue date Jun 3, 2025
- International Business Machines Corporation
- Michael James Becht
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
Latchup Detector and Clock Loss Detector
- Publication number 20250231234
- Publication date Jul 17, 2025
- Omni Design Technologies, Inc.
- Manar Ibrahim El-Chammas
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SCAN CHAINS WITH MULTI-BIT CELLS AND METHODS FOR TESTING THE SAME
- Publication number 20250231235
- Publication date Jul 17, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Mohammed Moiz Khan
- G01 - MEASURING TESTING
Information Patent Application
COMPONENT DIE VALIDATION BUILT-IN SELF-TEST (VBIST) ENGINE
- Publication number 20250231236
- Publication date Jul 17, 2025
- Ampere Computing LLC
- Sandeep BRAHMADATHAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIE-TO-DIE AND CHIP-TO-CHIP INTERCONNECT CLOCK SKEW COMPENSATION
- Publication number 20250224447
- Publication date Jul 10, 2025
- PROTEANTECS LTD.
- Eyal FAYNEH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CUSTOM WRAPPER CELL FOR HARDWARE TESTING
- Publication number 20250224446
- Publication date Jul 10, 2025
- Google LLC
- Wilson Pradeep
- G01 - MEASURING TESTING
Information Patent Application
METHOD FOR CHECKING AT LEAST ONE FIRST CLOCK GENERATOR OF A FIRST F...
- Publication number 20250224448
- Publication date Jul 10, 2025
- Endress+Hauser SE+Co. KG
- Alexander Vogel
- G01 - MEASURING TESTING
Information Patent Application
REDUNDANT ON-CHIP HIGH VOLTAGE GENERATION
- Publication number 20250226743
- Publication date Jul 10, 2025
- Murata Manufacturing Co., Ltd.
- Lasse AALTONEN
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
NOISE MODEL GENERATING METHOD AND NOISE MODEL GENERATING DEVICE
- Publication number 20250216434
- Publication date Jul 3, 2025
- Kabushiki Kaisha Toshiba
- Hidetoshi MIYAHARA
- G01 - MEASURING TESTING
Information Patent Application
NEURAL PROCESSING UNIT PERFORMING TEST FOR DETECTING FAILURE
- Publication number 20250216453
- Publication date Jul 3, 2025
- DEEPX CO., LTD.
- Lok Won KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TESTING CIRCUIT FOR TESTING ELECTRICAL DEVICES AND DEVICE UNDER TEST
- Publication number 20250216455
- Publication date Jul 3, 2025
- WINBOND ELECTRONICS CORP.
- Lih-Wei Lin
- G01 - MEASURING TESTING
Information Patent Application
Chip Self-Repair for Interconnect Short Faults
- Publication number 20250216456
- Publication date Jul 3, 2025
- ADVANCED MICRO DEVICES, INC.
- Nehal R. Patel
- G01 - MEASURING TESTING
Information Patent Application
Functional Circuit Block Harvesting in Integrated Circuits
- Publication number 20250217565
- Publication date Jul 3, 2025
- Apple Inc.
- Peter A. Lisherness
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEVICE TESTING SYSTEM AND DEVICE TESTING METHOD
- Publication number 20250216452
- Publication date Jul 3, 2025
- GETAC TECHNOLOGY CORPORATION
- CHIEN-CHIH HU
- G01 - MEASURING TESTING
Information Patent Application
TEST DEVICE PERFORMING TEST OPERATION ON LATCH CIRCUIT, OPERATING M...
- Publication number 20250216457
- Publication date Jul 3, 2025
- Samsung Electronics Co., Ltd.
- Sangin PARK
- G01 - MEASURING TESTING
Information Patent Application
CONFIGURABLE MULTILAYERED OVERRIDE SYSTEM AND METHOD FOR CIRCUMVENT...
- Publication number 20250216454
- Publication date Jul 3, 2025
- NXP B.V.
- Neha Srivastava
- G01 - MEASURING TESTING
Information Patent Application
AUTOMATED LOW POWER CELL INSERTION IN DFT-ENABLED MULTI POWER PLANE...
- Publication number 20250208206
- Publication date Jun 26, 2025
- Intel Corporation
- Jay RAVAL
- G01 - MEASURING TESTING
Information Patent Application
TEST (DFT) AND DESIGN FOR DEBUG (DFD) GATED POWER DOMAINS
- Publication number 20250208207
- Publication date Jun 26, 2025
- Intel Corporation
- Huah Yuah TAN
- G01 - MEASURING TESTING
Information Patent Application
CIRCUIT FOR DETECTION AND MITIGATION OF DEVICE DAMAGE TO AN ELECTRO...
- Publication number 20250210958
- Publication date Jun 26, 2025
- NXP B.V.
- Rishi BHOOSHAN
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
METHODS AND APPARATUS FOR FAULT ISOLATION WITH SCANNING ELECTRON MI...
- Publication number 20250208208
- Publication date Jun 26, 2025
- Intel Corporation
- Joshua Kevek
- G01 - MEASURING TESTING
Information Patent Application
DEBUG TRACE MICROSECTORS
- Publication number 20250208209
- Publication date Jun 26, 2025
- Altera Corporation
- Sean R. Atsatt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Detecting a Function Section in a Representation of a Quantum Circuit
- Publication number 20250199064
- Publication date Jun 19, 2025
- Classiq Technologies LTD.
- Amir Naveh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TEST IMPLEMENTATION
- Publication number 20250199066
- Publication date Jun 19, 2025
- STMicroelectronics International N.V.
- Thomas SARNO
- G01 - MEASURING TESTING
Information Patent Application
DEVICE UNDER TEST, FAULT INJECTION TESTING SYSTEM AND METHOD FOR FA...
- Publication number 20250199065
- Publication date Jun 19, 2025
- NXP B.V.
- Jean-Michel Cioranesco
- G01 - MEASURING TESTING
Information Patent Application
SCAN FLIP-FLOP
- Publication number 20250199070
- Publication date Jun 19, 2025
- NXP B.V.
- Pramod Gayakwad
- G01 - MEASURING TESTING
Information Patent Application
ARCHITECTURE FOR TESTING MULTIPLE SCAN CHAINS
- Publication number 20250199069
- Publication date Jun 19, 2025
- STMicroelectronics International N.V.
- Enea Dimroci
- G01 - MEASURING TESTING
Information Patent Application
DEVICES AND METHODS FOR TESTING DIES WITH OFF-DIE CLOCKS
- Publication number 20250201637
- Publication date Jun 19, 2025
- ADVANCED MICRO DEVICES, INC.
- Russell Schreiber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOCK-UP LATCH FOR DUAL-EDGE-TRIGGERED FLIP-FLOPS
- Publication number 20250192757
- Publication date Jun 12, 2025
- QUALCOMM Incorporated
- Yimai PENG
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ERROR DETECTION SYSTEM APPLICABLE TO RTL MODULE AND OPERATION METHO...
- Publication number 20250189578
- Publication date Jun 12, 2025
- TELECHIPS INC.
- Yeongbeen KIM
- G01 - MEASURING TESTING
Information Patent Application
SELF-FUNCTIONAL DETECTION SYSTEM FOR TAP CONTROLLER AND METHOD THEREOF
- Publication number 20250189582
- Publication date Jun 12, 2025
- SQ Technology ( Shanghai ) Corporation
- Xue-Shan Han
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND MACHINE FOR FACTORY TESTING OF INTEGRATED CIRCUITS USING...
- Publication number 20250189579
- Publication date Jun 12, 2025
- HIMAX TECHNOLOGIES LIMITED
- Yaw-Guang Chang
- G01 - MEASURING TESTING

Testing of digital circuits

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Scan circuit and method

Systems and methods for networked device testing

Functional circuit block harvesting in computer systems

Integrated circuit and an electronic device including integrated ci...

Interposer circuit

Optical wafer-scale photodiode bandwidth measurement system

Validating test patterns ported between different levels of a hiera...

Integrated test cell using active thermal interposer (ATI) with par...

Determination device, test system, and generation device

Comparator testing circuit and testing method thereof

Built-in self-test circuit and temperature measurement circuit incl...

NPU capable of being tested during runtime

Method and system for real time outlier detection and product re-bi...

Oscillation handling method, apparatus using the same, and storage...

Semiconductor device and method of failure analysis for semiconduct...

System and method for automatic fault detection in an electronic de...

Built-in testing in modular system-on-chip device

Transmitter for ultra-high speed and storage device including the same

Machine-learning-based design-for-test (DFT) recommendation system...

Operating and testing semiconductor devices

Constructing quantum processes for quantum processors

Apparatus and method for implementing a scalable digital infrastruc...

Circuit and method to measure simulation to silicon timing correlation

Software and firmware support for device interface board configured...

Test device for testing on-chip clock controller having debug function

High throughput sort

Superconductive integrated circuit devices with on-chip testing

Clock control circuit and method

Inspection device for a semiconductor device

Processor debugging over an interconnect fabric

Patents Applicationslast 30 patents

Latchup Detector and Clock Loss Detector

SCAN CHAINS WITH MULTI-BIT CELLS AND METHODS FOR TESTING THE SAME

COMPONENT DIE VALIDATION BUILT-IN SELF-TEST (VBIST) ENGINE

DIE-TO-DIE AND CHIP-TO-CHIP INTERCONNECT CLOCK SKEW COMPENSATION

CUSTOM WRAPPER CELL FOR HARDWARE TESTING

METHOD FOR CHECKING AT LEAST ONE FIRST CLOCK GENERATOR OF A FIRST F...

REDUNDANT ON-CHIP HIGH VOLTAGE GENERATION

NOISE MODEL GENERATING METHOD AND NOISE MODEL GENERATING DEVICE

NEURAL PROCESSING UNIT PERFORMING TEST FOR DETECTING FAILURE

TESTING CIRCUIT FOR TESTING ELECTRICAL DEVICES AND DEVICE UNDER TEST

Chip Self-Repair for Interconnect Short Faults

Functional Circuit Block Harvesting in Integrated Circuits

DEVICE TESTING SYSTEM AND DEVICE TESTING METHOD

TEST DEVICE PERFORMING TEST OPERATION ON LATCH CIRCUIT, OPERATING M...

CONFIGURABLE MULTILAYERED OVERRIDE SYSTEM AND METHOD FOR CIRCUMVENT...

AUTOMATED LOW POWER CELL INSERTION IN DFT-ENABLED MULTI POWER PLANE...

TEST (DFT) AND DESIGN FOR DEBUG (DFD) GATED POWER DOMAINS

CIRCUIT FOR DETECTION AND MITIGATION OF DEVICE DAMAGE TO AN ELECTRO...

METHODS AND APPARATUS FOR FAULT ISOLATION WITH SCANNING ELECTRON MI...

DEBUG TRACE MICROSECTORS

Detecting a Function Section in a Representation of a Quantum Circuit

TEST IMPLEMENTATION

DEVICE UNDER TEST, FAULT INJECTION TESTING SYSTEM AND METHOD FOR FA...

SCAN FLIP-FLOP

ARCHITECTURE FOR TESTING MULTIPLE SCAN CHAINS

DEVICES AND METHODS FOR TESTING DIES WITH OFF-DIE CLOCKS

LOCK-UP LATCH FOR DUAL-EDGE-TRIGGERED FLIP-FLOPS

ERROR DETECTION SYSTEM APPLICABLE TO RTL MODULE AND OPERATION METHO...

SELF-FUNCTIONAL DETECTION SYSTEM FOR TAP CONTROLLER AND METHOD THEREOF

METHOD AND MACHINE FOR FACTORY TESTING OF INTEGRATED CIRCUITS USING...