Testing of input or output circuits; test of circuitry between the I/C pins and the functional core

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CPC
G01R31/31715

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GPHYSICS G01Measuring instruments G01RMEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES G01R31/00Arrangements for testing electric properties Arrangements for locating electric faults Arrangements for electrical testing characterised by what is being tested not provided for elsewhere

Current Industry

G01R31/31715Testing of input or output circuits; test of circuitry between the I/C pins and the functional core

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Wafer level methods of testing semiconductor devices using internal...
- Patent number 12,203,980
- Issue date Jan 21, 2025
- Samsung Electronics Co., Ltd.
- Ahn Choi
- G01 - MEASURING TESTING
Information Patent Grant
Signal test
- Patent number 12,196,803
- Issue date Jan 14, 2025
- Infineon Technologies AG
- Muhammad Hassan
- G01 - MEASURING TESTING
Information Patent Grant
Telephone connector to audio connector mapping and leveling device
- Patent number 12,140,633
- Issue date Nov 12, 2024
- Tony Dux
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Systems, methods and devices for high-speed input/output margin tes...
- Patent number 12,117,486
- Issue date Oct 15, 2024
- Daniel S. Froelich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Margin test data tagging and predictive expected margins
- Patent number 12,061,232
- Issue date Aug 13, 2024
- Tektronix, Inc.
- Sam J. Strickling
- G01 - MEASURING TESTING
Information Patent Grant
Integrated circuit including test circuit and method of manufacturi...
- Patent number 12,000,888
- Issue date Jun 4, 2024
- Samsung Electronics Co., Ltd.
- Changho Han
- G01 - MEASURING TESTING
Information Patent Grant
Adaptive port ceiling assignment for background I/O operations betw...
- Patent number 11,994,557
- Issue date May 28, 2024
- Dell Products, L.P.
- Ananthakrishnan Anirudhan
- G01 - MEASURING TESTING
Information Patent Grant
Test compression in a JTAG daisy-chain environment
- Patent number 11,965,930
- Issue date Apr 23, 2024
- Texas Instruments Incorporated
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Grant
Systems, methods and devices for high-speed input/output margin tes...
- Patent number 11,946,970
- Issue date Apr 2, 2024
- Tektronix, Inc.
- Daniel S. Froelich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Built-in self-test for die-to-die physical interfaces
- Patent number 11,940,491
- Issue date Mar 26, 2024
- Apple Inc.
- Fabien S. Faure
- G01 - MEASURING TESTING
Information Patent Grant
Secured scan access for a device including a scan chain
- Patent number 11,927,633
- Issue date Mar 12, 2024
- Texas Instruments Incorporated
- Mudasir Kawoosa
- G01 - MEASURING TESTING
Information Patent Grant
Fan-out buffer with skew control function, operating method thereof...
- Patent number 11,921,158
- Issue date Mar 5, 2024
- Samsung Electronics Co., Ltd.
- Byung-Sung Kim
- G01 - MEASURING TESTING
Information Patent Grant
Wafer level methods of testing semiconductor devices using internal...
- Patent number 11,867,751
- Issue date Jan 9, 2024
- Samsung Electronics Co., Ltd.
- Ahn Choi
- G01 - MEASURING TESTING
Information Patent Grant
Device, system and method to support communication of test, debug o...
- Patent number 11,698,412
- Issue date Jul 11, 2023
- Intel Corporation
- Rolf H. Kuehnis
- G01 - MEASURING TESTING
Information Patent Grant
System and method of testing single DUT through multiple cores in p...
- Patent number 11,686,768
- Issue date Jun 27, 2023
- Test Research, Inc.
- Ching-Chih Lin
- G01 - MEASURING TESTING
Information Patent Grant
Built-in self-test for die-to-die physical interfaces
- Patent number 11,662,380
- Issue date May 30, 2023
- Apple Inc.
- Fabien S. Faure
- G01 - MEASURING TESTING
Information Patent Grant
Method and system of determining application health in an informati...
- Patent number 11,662,379
- Issue date May 30, 2023
- GAVS Technologies Pvt. Ltd.
- Sivaprakash Krishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Test compression in a JTAG daisy-chain environment
- Patent number 11,639,963
- Issue date May 2, 2023
- Texas Instmments Incorporated
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Grant
Method of high speed and dynamic configuration of a transceiver system
- Patent number 11,621,770
- Issue date Apr 4, 2023
- Hughes Network Systems, LLC
- Yogesh Sethi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and/or system for testing devices in non-secured environment
- Patent number 11,480,613
- Issue date Oct 25, 2022
- ARM Limited
- Richard Andrew Paterson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Wafer level methods of testing semiconductor devices using internal...
- Patent number 11,435,397
- Issue date Sep 6, 2022
- Samsung Electronics Co., Ltd.
- Ahn Choi
- G01 - MEASURING TESTING
Information Patent Grant
Core testing machine
- Patent number 11,353,507
- Issue date Jun 7, 2022
- Contec, LLC
- Samant Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory loopback systems and methods
- Patent number 11,327,113
- Issue date May 10, 2022
- Micron Technology, Inc.
- David D. Wilmoth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Testing of asynchronous reset logic
- Patent number 11,301,607
- Issue date Apr 12, 2022
- NXP B.V.
- Tom Waayers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Telephone connector to audio connector mapping and leveling device
- Patent number 11,255,910
- Issue date Feb 22, 2022
- CYARA SOLUTIONS PTY LTD
- Tony Dux
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Methods and systems for switchable logic to recover integrated circ...
- Patent number 11,204,384
- Issue date Dec 21, 2021
- Apple Inc.
- Edgardo F. Klass
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Device, system and method to support communication of test, debug o...
- Patent number 11,193,973
- Issue date Dec 7, 2021
- Intel Corporation
- Rolf H. Kuehnis
- G01 - MEASURING TESTING
Information Patent Grant
Test compression in a JTAG daisy-chain environment
- Patent number 11,105,852
- Issue date Aug 31, 2021
- Texas Instruments Incorporated
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Grant
Device and method for testing a computer system
- Patent number 11,009,547
- Issue date May 18, 2021
- Super Micro Computer, Inc.
- Mao Sui Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adapting the usage configuration of integrated circuit input-output...
- Patent number 10,996,269
- Issue date May 4, 2021
- ARM Limited
- James Edward Myers
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
TEST COMPRESSION IN A JTAG DAISY-CHAIN ENVIRONMENT
- Publication number 20240264230
- Publication date Aug 8, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
SECURED SCAN ACCESS FOR A DEVICE INCLUDING A SCAN CHAIN
- Publication number 20240241174
- Publication date Jul 18, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Mudasir KAWOOSA
- G01 - MEASURING TESTING
Information Patent Application
CAN TRANSCEIVER AND METHOD FOR THE CAN TRANSCEIVER
- Publication number 20240168090
- Publication date May 23, 2024
- NXP B.V.
- Lucas Pieter Lodewijk van Dijk
- G01 - MEASURING TESTING
Information Patent Application
SECURED SCAN ACCESS FOR A DEVICE INCLUDING A SCAN CHAIN
- Publication number 20240103078
- Publication date Mar 28, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Mudasir KAWOOSA
- G01 - MEASURING TESTING
Information Patent Application
Adaptive Port Ceiling Assignment for Background I/O Operations Betw...
- Publication number 20240085474
- Publication date Mar 14, 2024
- Dell Products, L.P.
- Ananthakrishnan Anirudhan
- G01 - MEASURING TESTING
Information Patent Application
WAFER LEVEL METHODS OF TESTING SEMICONDUCTOR DEVICES USING INTERNAL...
- Publication number 20240012045
- Publication date Jan 11, 2024
- Samsung Electronics Co., Ltd.
- Ahn Choi
- G01 - MEASURING TESTING
Information Patent Application
Pin Testing System for Multi-Pin Chip and Method Thereof
- Publication number 20230400511
- Publication date Dec 14, 2023
- INVENTEC (PUDONG) TECHNOLOGY CORPORATION
- Jin-Dong Zhao
- G01 - MEASURING TESTING
Information Patent Application
Built-in Self-Test for Die-to-Die Physical Interfaces
- Publication number 20230384377
- Publication date Nov 30, 2023
- Apple Inc.
- Fabien S. Faure
- G01 - MEASURING TESTING
Information Patent Application
TEST COMPRESSION IN A JTAG DAISY-CHAIN ENVIRONMENT
- Publication number 20230266389
- Publication date Aug 24, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
TEST AND DEBUG SUPPORT WITH HBI CHIPLET ARCHITECTURE
- Publication number 20230095914
- Publication date Mar 30, 2023
- Intel Corporation
- Gerald PASDAST
- G01 - MEASURING TESTING
Information Patent Application
WAFER LEVEL METHODS OF TESTING SEMICONDUCTOR DEVICES USING INTERNAL...
- Publication number 20220357393
- Publication date Nov 10, 2022
- Samsung Electronics Co., Ltd.
- Ahn Choi
- G01 - MEASURING TESTING
Information Patent Application
SIGNAL TEST
- Publication number 20220326298
- Publication date Oct 13, 2022
- INFINEON TECHNOLOGIES AG
- Muhammad Hassan
- G01 - MEASURING TESTING
Information Patent Application
TELEPHONE CONNECTOR TO AUDIO CONNECTOR MAPPING AND LEVELING DEVICE
- Publication number 20220252666
- Publication date Aug 11, 2022
- Cyara Solutions Pty Ltd
- Tony Dux
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
METHOD AND/OR SYSTEM FOR TESTING DEVICES IN NON-SECURED ENVIRONMENT
- Publication number 20220196734
- Publication date Jun 23, 2022
- ARM Limited
- Richard Andrew Paterson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
INPUT-OUTPUT DEVICE WITH DEBUG CONTROLLER
- Publication number 20220113353
- Publication date Apr 14, 2022
- Aruni P. Nelson
- G01 - MEASURING TESTING
Information Patent Application
MARGIN TEST DATA TAGGING AND PREDICTIVE EXPECTED MARGINS
- Publication number 20220091185
- Publication date Mar 24, 2022
- Tektronix, Inc.
- Sam J. Strickling
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEVICE, SYSTEM AND METHOD TO SUPPORT COMMUNICATION OF TEST, DEBUG O...
- Publication number 20220082617
- Publication date Mar 17, 2022
- Intel Corporation
- Rolf H. Kuehnis
- G01 - MEASURING TESTING
Information Patent Application
Digital Input and Output Signal Test Platform
- Publication number 20210396787
- Publication date Dec 23, 2021
- Tyco Electronics (Shanghai) Co. Ltd.
- Lei Zhou
- G01 - MEASURING TESTING
Information Patent Application
TEST COMPRESSION IN A JTAG DAISY-CHAIN ENVIRONMENT
- Publication number 20210356522
- Publication date Nov 18, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
METHOD OF HIGH SPEED AND DYNAMIC CONFIGURATION OF A TRANSCEIVER SYSTEM
- Publication number 20210199718
- Publication date Jul 1, 2021
- Hughes Network Systems, LLC
- Yogesh SETHI
- G01 - MEASURING TESTING
Information Patent Application
TESTING OF ASYNCHRONOUS RESET LOGIC
- Publication number 20210109153
- Publication date Apr 15, 2021
- NXP B.V.
- Tom Waayers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUSES TO DETECT TEST PROBE CONTACT AT EXTERNAL TE...
- Publication number 20210063487
- Publication date Mar 4, 2021
- Micron Technology, Inc.
- Yoshinori Fujiwara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WAFER LEVEL METHODS OF TESTING SEMICONDUCTOR DEVICES USING INTERNAL...
- Publication number 20200371157
- Publication date Nov 26, 2020
- Samsung Electronics Co., Ltd.
- Ahn Choi
- G01 - MEASURING TESTING
Information Patent Application
DEVICE, SYSTEM AND METHOD TO SUPPORT COMMUNICATION OF TEST, DEBUG O...
- Publication number 20200348360
- Publication date Nov 5, 2020
- Intel IP Corporation
- Rolf H. KUEHNIS
- G01 - MEASURING TESTING
Information Patent Application
SYSTEMS, METHODS AND DEVICES FOR HIGH-SPEED INPUT/OUTPUT MARGIN TES...
- Publication number 20200249275
- Publication date Aug 6, 2020
- Tektronix, Inc.
- Daniel S. Froelich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DRIVE CIRCUIT AND LIQUID EJECTING APPARATUS
- Publication number 20200238688
- Publication date Jul 30, 2020
- SEIKO EPSON CORPORATION
- Hidehiko YAJIMA
- G01 - MEASURING TESTING
Information Patent Application
TIME INTERLEAVED SCAN SYSTEM
- Publication number 20200233031
- Publication date Jul 23, 2020
- QUALCOMM Incorporated
- Jais ABRAHAM
- G01 - MEASURING TESTING
Information Patent Application
TEST COMPRESSION IN A JTAG DAISY-CHAIN ENVIRONMENT
- Publication number 20200217890
- Publication date Jul 9, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Lee D. Whetsel
- G01 - MEASURING TESTING
Information Patent Application
DEVICE AND METHOD FOR TESTING A COMPUTER SYSTEM
- Publication number 20200182932
- Publication date Jun 11, 2020
- SUPER MICRO COMPUTER, INC.
- MAO SUI WANG
- G01 - MEASURING TESTING
Information Patent Application
CORE TESTING MACHINE
- Publication number 20200142001
- Publication date May 7, 2020
- CONTEC, LLC
- Samant Kumar
- G06 - COMPUTING CALCULATING COUNTING

Testing of input or output circuits; test of circuitry between the I/C pins and the functional core

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Wafer level methods of testing semiconductor devices using internal...

Signal test

Telephone connector to audio connector mapping and leveling device

Systems, methods and devices for high-speed input/output margin tes...

Margin test data tagging and predictive expected margins

Integrated circuit including test circuit and method of manufacturi...

Adaptive port ceiling assignment for background I/O operations betw...

Test compression in a JTAG daisy-chain environment

Systems, methods and devices for high-speed input/output margin tes...

Built-in self-test for die-to-die physical interfaces

Secured scan access for a device including a scan chain

Fan-out buffer with skew control function, operating method thereof...

Wafer level methods of testing semiconductor devices using internal...

Device, system and method to support communication of test, debug o...

System and method of testing single DUT through multiple cores in p...

Built-in self-test for die-to-die physical interfaces

Method and system of determining application health in an informati...

Test compression in a JTAG daisy-chain environment

Method of high speed and dynamic configuration of a transceiver system

Method and/or system for testing devices in non-secured environment

Wafer level methods of testing semiconductor devices using internal...

Core testing machine

Memory loopback systems and methods

Testing of asynchronous reset logic

Telephone connector to audio connector mapping and leveling device

Methods and systems for switchable logic to recover integrated circ...

Device, system and method to support communication of test, debug o...

Test compression in a JTAG daisy-chain environment

Device and method for testing a computer system

Adapting the usage configuration of integrated circuit input-output...

Patents Applicationslast 30 patents

TEST COMPRESSION IN A JTAG DAISY-CHAIN ENVIRONMENT

SECURED SCAN ACCESS FOR A DEVICE INCLUDING A SCAN CHAIN

CAN TRANSCEIVER AND METHOD FOR THE CAN TRANSCEIVER

SECURED SCAN ACCESS FOR A DEVICE INCLUDING A SCAN CHAIN

Adaptive Port Ceiling Assignment for Background I/O Operations Betw...

WAFER LEVEL METHODS OF TESTING SEMICONDUCTOR DEVICES USING INTERNAL...

Pin Testing System for Multi-Pin Chip and Method Thereof

Built-in Self-Test for Die-to-Die Physical Interfaces

TEST COMPRESSION IN A JTAG DAISY-CHAIN ENVIRONMENT

TEST AND DEBUG SUPPORT WITH HBI CHIPLET ARCHITECTURE

WAFER LEVEL METHODS OF TESTING SEMICONDUCTOR DEVICES USING INTERNAL...

SIGNAL TEST

TELEPHONE CONNECTOR TO AUDIO CONNECTOR MAPPING AND LEVELING DEVICE

METHOD AND/OR SYSTEM FOR TESTING DEVICES IN NON-SECURED ENVIRONMENT

INPUT-OUTPUT DEVICE WITH DEBUG CONTROLLER

MARGIN TEST DATA TAGGING AND PREDICTIVE EXPECTED MARGINS

DEVICE, SYSTEM AND METHOD TO SUPPORT COMMUNICATION OF TEST, DEBUG O...

Digital Input and Output Signal Test Platform

TEST COMPRESSION IN A JTAG DAISY-CHAIN ENVIRONMENT

METHOD OF HIGH SPEED AND DYNAMIC CONFIGURATION OF A TRANSCEIVER SYSTEM

TESTING OF ASYNCHRONOUS RESET LOGIC

METHODS AND APPARATUSES TO DETECT TEST PROBE CONTACT AT EXTERNAL TE...

WAFER LEVEL METHODS OF TESTING SEMICONDUCTOR DEVICES USING INTERNAL...

DEVICE, SYSTEM AND METHOD TO SUPPORT COMMUNICATION OF TEST, DEBUG O...

SYSTEMS, METHODS AND DEVICES FOR HIGH-SPEED INPUT/OUTPUT MARGIN TES...

DRIVE CIRCUIT AND LIQUID EJECTING APPARATUS

TIME INTERLEAVED SCAN SYSTEM

TEST COMPRESSION IN A JTAG DAISY-CHAIN ENVIRONMENT

DEVICE AND METHOD FOR TESTING A COMPUTER SYSTEM

CORE TESTING MACHINE