the chip support structure consisting of a plurality of insulating substrates

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H01L23/49833

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HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR H01L23/00Details of semiconductor or other solid state devices

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H01L23/49833the chip support structure consisting of a plurality of insulating substrates

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Patents Grantslast 30 patents

Information Patent Grant
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Information Patent Grant
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Information Patent Grant
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Information Patent Grant
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Information Patent Grant
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Information Patent Grant
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Information Patent Grant
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Information Patent Grant
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Information Patent Grant
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- MEDIATEK INC.
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STACKED ELECTRONIC PACKAGES
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SEMICONDUCTOR PACKAGE WITH SUBSTRATE PAD
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HIGH DENSITY INTERCONNECTION USING FANOUT INTERPOSER CHIPLET
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EMBEDDED DIE ON INTERPOSER PACKAGES
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- Ping HSU
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Information Patent Application
ELECTRONIC PACKAGE ASSEMBLY AND METHODS FOR FORMING THE SAME
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Information Patent Application
SEMICONDUCTOR PACKAGE INCLUDING A CORE LAYER
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Information Patent Application
SEMICONDUCTOR PACKAGE
- Publication number 20250140705
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Information Patent Application
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- NANYA TECHNOLOGY CORPORATION
- Ping HSU
- H01 - BASIC ELECTRIC ELEMENTS

the chip support structure consisting of a plurality of insulating substrates

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Window ball grid array (WBGA) package and method for manufacturing...

Semiconductor device

Semiconductor structure and manufacturing method thereof

Molded product for semiconductor strip and method of manufacturing...

Electronic package

Semiconductor package structure

Electronic device

Aluminum nitride multilayer power module interposer and method

Semiconductor package

High efficiency heat dissipation using discrete thermal interface m...

Capacitor structure and method for forming the same

Semiconductor package with hybrid mold layers

Semiconductor package

Fan-out semiconductor package

High density interconnection using fanout interposer chiplet

Electronic package and manufacturing method thereof

Substrate frame design for three-dimensional stacked electronic ass...

Coplanar control for film-type thermal interface

Semiconductor package with conductive adhesive that overflows for r...

Semiconductor package having multiple substrates

Semiconductor device package with conductive pillars and reinforcin...

Semiconductor packages including antenna pattern

Chip heat dissipating structure, chip structure, circuit board and...

Semiconductor package having an encapulant comprising conductive fi...

Semiconductor package

Semiconductor package

Secure semiconductor integration and method for making thereof

Semiconductor package including heat dissipation layer

Semiconductor device comprising interconnect structures

Electronic device

Patents Applicationslast 30 patents

SEMICONDUCTOR DEVICE AND ELECTRIC POWER CONVERSION DEVICE

SEMICONDUCTOR PACKAGE INCLUDING HEAT RADIATION STRUCTURE, COOLING S...

SEMICONDUCTOR PACKAGE AND FABRICATION METHOD THEREOF

SEMICONDUCTOR PACKAGE STRUCTURE

3D INTEGRATED CIRCUIT PACKAGE AND SUBSTRATE STRUCTURE THEREOF

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME

DAMPING ELEMENTS FOR PIN VIBRATION FRETTING RISK MITIGATION

SEMICONDUCTOR PACKAGES AND METHODS FOR FORMING THE SAME

STACKED ELECTRONIC PACKAGES

THREE-DIMENSIONAL INTEGRATED CIRCUIT STRUCTURES AND METHODS OF FORM...

SEMICONDUCTOR PACKAGE WITH SUBSTRATE PAD

ELECTRONIC DEVICE

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME

HIGH DENSITY INTERCONNECTION USING FANOUT INTERPOSER CHIPLET

SEMICONDUCTOR PACKAGE WITH HEAT DISSIPATION THROUGH THERMAL VIAS

SEMICONDUCTOR PACKAGING STRUCTURES AND METHODS FOR FORMING THE SAME

SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DE...

ELECTRONIC COMPONENT-INCORPORATING SUBSTRATE

PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF

EMBEDDED DIE ON INTERPOSER PACKAGES

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME

ELECTRONIC COMPONENT-INCORPORATING SUBSTRATE

ELECTRONIC DEVICE

ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOF

SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME

ELECTRONIC PACKAGE ASSEMBLY AND METHODS FOR FORMING THE SAME

SEMICONDUCTOR PACKAGE WITH A BACKSIDE POWER DISTRIBUTION NETWORK

SEMICONDUCTOR PACKAGE INCLUDING A CORE LAYER

SEMICONDUCTOR PACKAGE

SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME