the first connecting process involving a build-up interconnect

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HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00

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H01L2224/92132the first connecting process involving a build-up interconnect

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Patents Grantslast 30 patents

Information Patent Grant
Semiconductor package with embedded die and its methods of fabrication
- Patent number 9,780,054
- Issue date Oct 3, 2017
- Intel Corporation
- John S. Guzek
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded package and method of manufacturing the same
- Patent number 9,099,313
- Issue date Aug 4, 2015
- SK Hynix Inc.
- Sang Yong Lee
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Semiconductor device and manufacturing method thereof
- Patent number 8,884,396
- Issue date Nov 11, 2014
- Kabushiki Kaisha Toshiba
- Mitsuyoshi Endo
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
EMBEDDED PACKAGE AND METHOD OF MANUFACTURING THE SAME
- Publication number 20140167275
- Publication date Jun 19, 2014
- SK HYNIX INC.
- Sang Yong LEE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
- Publication number 20120248579
- Publication date Oct 4, 2012
- Kabushiki Kaisha Toshiba
- Mitsuyoshi Endo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
- Publication number 20120248624
- Publication date Oct 4, 2012
- Kabushiki Kaisha Toshiba
- Mitsuyoshi Endo
- H01 - BASIC ELECTRIC ELEMENTS