the means being an applied insulating layer

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HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier

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H01L29/7843the means being an applied insulating layer

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device structure with metal gate stacks
- Patent number 12,166,105
- Issue date Dec 10, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yi-Hsuan Hsiao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for producing a 3D semiconductor memory device and structure
- Patent number 12,154,817
- Issue date Nov 26, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and device for boosting performance of FinFETs via strained...
- Patent number 12,148,830
- Issue date Nov 19, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd
- Kai-Chieh Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Contact over active gate structures for advanced integrated circuit...
- Patent number 12,142,667
- Issue date Nov 12, 2024
- Intel Corporation
- Andrew W. Yeoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3D semiconductor device and structure with single-crystal layers
- Patent number 12,136,562
- Issue date Nov 5, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device including an upper contact in contact with a s...
- Patent number 12,132,044
- Issue date Oct 29, 2024
- Samsung Electronics Co., Ltd.
- Sung Min Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3D semiconductor device and structure with metal layers and memory...
- Patent number 12,125,737
- Issue date Oct 22, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of modulating stress of dielectric layers
- Patent number 12,125,911
- Issue date Oct 22, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chung-Ting Ko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Strain enhanced SiC power semiconductor device and method of manufa...
- Patent number 12,113,131
- Issue date Oct 8, 2024
- HITACHI ENERGY LTD
- Stephan Wirths
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Strained gate semiconductor device having an interlayer dielectric...
- Patent number 12,100,767
- Issue date Sep 24, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Cheng-Ta Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for producing a 3D semiconductor device and structure with...
- Patent number 12,100,611
- Issue date Sep 24, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device including stress application layer
- Patent number 12,087,858
- Issue date Sep 10, 2024
- Sony Group Corporation
- Satoru Mayuzumi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3D semiconductor device and structure with bonding and DRAM memory...
- Patent number 12,068,187
- Issue date Aug 20, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- G11 - INFORMATION STORAGE
Information Patent Grant
Gate cut and fin trim isolation for advanced integrated circuit str...
- Patent number 12,057,492
- Issue date Aug 6, 2024
- Intel Corporation
- Tahir Ghani
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for producing a 3D semiconductor device and structure with...
- Patent number 12,033,884
- Issue date Jul 9, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- G11 - INFORMATION STORAGE
Information Patent Grant
Device of dielectric layer
- Patent number 12,034,075
- Issue date Jul 9, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd
- Yu-Yun Peng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a gate structure
- Patent number 12,027,425
- Issue date Jul 2, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd
- Shih-Hao Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Field effect transistor having a gate dielectric with a dipole laye...
- Patent number 11,984,506
- Issue date May 14, 2024
- Intel Corporation
- Vishal Tiwari
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fin end plug structures for advanced integrated circuit structure f...
- Patent number 11,961,838
- Issue date Apr 16, 2024
- Intel Corporation
- Byron Ho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual metal silicide structures for advanced integrated circuit stru...
- Patent number 11,961,767
- Issue date Apr 16, 2024
- Intel Corporation
- Jeffrey S. Leib
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual metal gate structure having portions of metal gate layers in c...
- Patent number 11,955,532
- Issue date Apr 9, 2024
- Intel Corporation
- Jeffrey S. Leib
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Heterogeneous metal line compositions for advanced integrated circu...
- Patent number 11,955,534
- Issue date Apr 9, 2024
- Intel Corporation
- Andrew W. Yeoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to induce strain in FINFET channels from an adjacent region
- Patent number 11,948,943
- Issue date Apr 2, 2024
- Bell Semiconductor, LLC
- Pierre Morin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Trench contact structures for advanced integrated circuit structure...
- Patent number 11,948,997
- Issue date Apr 2, 2024
- Intel Corporation
- Subhash M. Joshi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3D semiconductor device and structure with bonding
- Patent number 11,923,230
- Issue date Mar 5, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- G11 - INFORMATION STORAGE
Information Patent Grant
3D semiconductor device and structure with memory
- Patent number 11,901,210
- Issue date Feb 13, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Trench plug hardmask for advanced integrated circuit structure fabr...
- Patent number 11,887,838
- Issue date Jan 30, 2024
- Intel Corporation
- Anthony St. Amour
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fin patterning for advanced integrated circuit structure fabrication
- Patent number 11,881,520
- Issue date Jan 23, 2024
- Intel Corporation
- Curtis Ward
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3D semiconductor device and structure with single-crystal layers
- Patent number 11,876,011
- Issue date Jan 16, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for producing a 3D semiconductor device and structure with m...
- Patent number 11,862,503
- Issue date Jan 2, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH MEMORY CELLS AND MULTIPL...
- Publication number 20240404866
- Publication date Dec 5, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS FOR PRODUCING A 3D SEMICONDUCTOR MEMORY DEVICE AND STRUCTURE
- Publication number 20240395592
- Publication date Nov 28, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF MODULATING STRESS OF DIELECTRIC LAYERS
- Publication number 20240387729
- Publication date Nov 21, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chung-Ting Ko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND DEVICE FOR BOOSTING PERFORMANCE OF FINFETS VIA STRAINED...
- Publication number 20240379849
- Publication date Nov 14, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Kai-Chieh Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH METAL LAYERS AND MEMORY...
- Publication number 20240363385
- Publication date Oct 31, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- G11 - INFORMATION STORAGE
Information Patent Application
GATE CUT AND FIN TRIM ISOLATION FOR ADVANCED INTEGRATED CIRCUIT STR...
- Publication number 20240332399
- Publication date Oct 3, 2024
- Intel Corporation
- Tahir GHANI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING A GATE STRUCTURE
- Publication number 20240332089
- Publication date Oct 3, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Shih-Hao Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE OF DIELECTRIC LAYER
- Publication number 20240332419
- Publication date Oct 3, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Yu-Yun PENG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH BONDING AND DRAM MEMORY...
- Publication number 20240213073
- Publication date Jun 27, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD TO INDUCE STRAIN IN FINFET CHANNELS FROM AN ADJACENT REGION
- Publication number 20240203995
- Publication date Jun 20, 2024
- Bell Semiconductor, LLC
- Pierre MORIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND CORRESPONDING METHODS OF MANUFACTURE
- Publication number 20240194754
- Publication date Jun 13, 2024
- Infineon Technologies Austria AG
- Weichun Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUAL METAL GATE STRUCTURES FOR ADVANCED INTEGRATED CIRCUIT STRUCTUR...
- Publication number 20240186403
- Publication date Jun 6, 2024
- Intel Corporation
- Jeffrey S. LEIB
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUAL METAL SILICIDE STRUCTURES FOR ADVANCED INTEGRATED CIRCUIT STRU...
- Publication number 20240178071
- Publication date May 30, 2024
- Intel Corporation
- Jeffrey S. LEIB
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR PRODUCING A 3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH...
- Publication number 20240178040
- Publication date May 30, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH MEMORY
- Publication number 20240170319
- Publication date May 23, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRENCH CONTACT STRUCTURES FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE...
- Publication number 20240162332
- Publication date May 16, 2024
- Intel Corporation
- Subhash M. JOSHI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FIN END PLUG STRUCTURES FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE F...
- Publication number 20240153947
- Publication date May 9, 2024
- Intel Corporation
- Byron HO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR PRODUCING A 3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH...
- Publication number 20240145289
- Publication date May 2, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- G11 - INFORMATION STORAGE
Information Patent Application
3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH MEMORY
- Publication number 20240128116
- Publication date Apr 18, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- G11 - INFORMATION STORAGE
Information Patent Application
3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH SINGLE-CRYSTAL LAYERS
- Publication number 20240112942
- Publication date Apr 4, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- G11 - INFORMATION STORAGE
Information Patent Application
TRENCH PLUG HARDMASK FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABR...
- Publication number 20240105520
- Publication date Mar 28, 2024
- Intel Corporation
- Anthony ST. AMOUR
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR STRUCTURE AND FORMATION METHOD THEREOF
- Publication number 20240105846
- Publication date Mar 28, 2024
- Invention And Collaboration Laboratory Pte. Ltd.
- Chao-Chun Lu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH MEMORY
- Publication number 20240105490
- Publication date Mar 28, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR ARRANGEMENT AND METHOD OF MANUFACTURE
- Publication number 20240105847
- Publication date Mar 28, 2024
- Taiwan Semiconductor Manufacturing Company Limited
- Pei-Yu WANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FINFET STRUCTURE AND METHOD WITH REDUCED FIN BUCKLING
- Publication number 20240097033
- Publication date Mar 21, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Wei-Jen Lai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR COMPONENT AND MANUFACTURING METHOD THEREOF
- Publication number 20240088290
- Publication date Mar 14, 2024
- SONY GROUP CORPORATION
- Koichi Amari
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SILICIDE TRANSISTOR DEVICE AND METHOD
- Publication number 20240064987
- Publication date Feb 22, 2024
- Micron Technology, Inc.
- Toshihiko Miyashita
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH BONDING
- Publication number 20240055291
- Publication date Feb 15, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR FORMING SEMICONDUCTOR STRUCTURE WITH HIGH ASPECT RATIO
- Publication number 20240047276
- Publication date Feb 8, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Han-Pin CHUNG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HETEROGENEOUS METAL LINE COMPOSITIONS FOR ADVANCED INTEGRATED CIRCU...
- Publication number 20240047556
- Publication date Feb 8, 2024
- Intel Corporation
- Andrew W. YEOH
- H01 - BASIC ELECTRIC ELEMENTS

the means being an applied insulating layer

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Semiconductor device structure with metal gate stacks

Methods for producing a 3D semiconductor memory device and structure

Method and device for boosting performance of FinFETs via strained...

Contact over active gate structures for advanced integrated circuit...

3D semiconductor device and structure with single-crystal layers

Semiconductor device including an upper contact in contact with a s...

3D semiconductor device and structure with metal layers and memory...

Method of modulating stress of dielectric layers

Strain enhanced SiC power semiconductor device and method of manufa...

Strained gate semiconductor device having an interlayer dielectric...

Methods for producing a 3D semiconductor device and structure with...

Semiconductor device including stress application layer

3D semiconductor device and structure with bonding and DRAM memory...

Gate cut and fin trim isolation for advanced integrated circuit str...

Methods for producing a 3D semiconductor device and structure with...

Device of dielectric layer

Method of forming a gate structure

Field effect transistor having a gate dielectric with a dipole laye...

Fin end plug structures for advanced integrated circuit structure f...

Dual metal silicide structures for advanced integrated circuit stru...

Dual metal gate structure having portions of metal gate layers in c...

Heterogeneous metal line compositions for advanced integrated circu...

Method to induce strain in FINFET channels from an adjacent region

Trench contact structures for advanced integrated circuit structure...

3D semiconductor device and structure with bonding

3D semiconductor device and structure with memory

Trench plug hardmask for advanced integrated circuit structure fabr...

Fin patterning for advanced integrated circuit structure fabrication

3D semiconductor device and structure with single-crystal layers

Method for producing a 3D semiconductor device and structure with m...

Patents Applicationslast 30 patents

3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH MEMORY CELLS AND MULTIPL...

METHODS FOR PRODUCING A 3D SEMICONDUCTOR MEMORY DEVICE AND STRUCTURE

METHOD OF MODULATING STRESS OF DIELECTRIC LAYERS

METHOD AND DEVICE FOR BOOSTING PERFORMANCE OF FINFETS VIA STRAINED...

3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH METAL LAYERS AND MEMORY...

GATE CUT AND FIN TRIM ISOLATION FOR ADVANCED INTEGRATED CIRCUIT STR...

METHOD OF FORMING A GATE STRUCTURE

DEVICE OF DIELECTRIC LAYER

3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH BONDING AND DRAM MEMORY...

METHOD TO INDUCE STRAIN IN FINFET CHANNELS FROM AN ADJACENT REGION

SEMICONDUCTOR DEVICE AND CORRESPONDING METHODS OF MANUFACTURE

DUAL METAL GATE STRUCTURES FOR ADVANCED INTEGRATED CIRCUIT STRUCTUR...

DUAL METAL SILICIDE STRUCTURES FOR ADVANCED INTEGRATED CIRCUIT STRU...

METHODS FOR PRODUCING A 3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH...

3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH MEMORY

TRENCH CONTACT STRUCTURES FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE...

FIN END PLUG STRUCTURES FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE F...

METHODS FOR PRODUCING A 3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH...

3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH MEMORY

3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH SINGLE-CRYSTAL LAYERS

TRENCH PLUG HARDMASK FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABR...

TRANSISTOR STRUCTURE AND FORMATION METHOD THEREOF

3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH MEMORY

SEMICONDUCTOR ARRANGEMENT AND METHOD OF MANUFACTURE

FINFET STRUCTURE AND METHOD WITH REDUCED FIN BUCKLING

SEMICONDUCTOR COMPONENT AND MANUFACTURING METHOD THEREOF

SILICIDE TRANSISTOR DEVICE AND METHOD

3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH BONDING

METHOD FOR FORMING SEMICONDUCTOR STRUCTURE WITH HIGH ASPECT RATIO

HETEROGENEOUS METAL LINE COMPOSITIONS FOR ADVANCED INTEGRATED CIRCU...