the principal constituent melting at a temperature of less than 400°C

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HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00

Current Industry

H01L2224/13101the principal constituent melting at a temperature of less than 400°C

Industries

Patents Grantslast 30 patents

Information Patent Grant
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- Taiwan Semiconductor Manufacturing Company Ltd.
- Ming-Fa Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
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- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
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- Issue date Mar 26, 2024
- Amkor Technology Singapore Holding Pte Ltd.
- David Clark
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Information Patent Grant
Land structure for semiconductor package and method therefor
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- Kyoung Yeon Lee
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Information Patent Grant
Semiconductor package having a high reliability
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- Ji-Hwan Hwang
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Information Patent Grant
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- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fan-out semiconductor package
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Information Patent Grant
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Information Patent Grant
Package structure for heat dissipation
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- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
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Information Patent Grant
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Information Patent Grant
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Information Patent Grant
Surface treatment method and apparatus for semiconductor packaging
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Information Patent Grant
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Information Patent Grant
Solder removal from semiconductor devices
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Information Patent Grant
Method of manufacturing semiconductor package structure
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Information Patent Grant
Low warpage high density trench capacitor
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- Jyun-Ying Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Light-emitting device package including a lead frame
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- Ji-hoon Yun
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Information Patent Grant
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Information Patent Grant
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- Brandon P. Wirz
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Information Patent Grant
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- Patent number 11,664,320
- Issue date May 30, 2023
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- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package having a high reliability
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Information Patent Grant
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Information Patent Grant
Uniform pressure gang bonding method
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- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Fabrication process and structure of fine pitch traces for a solid...
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- Kelvin Po Leung Pun
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure and manufacturing method thereof
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- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure and method for making thereof
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Information Patent Grant
Exfoliated graphite materials and composite materials and devices f...
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- Issue date Jan 31, 2023
- 0908905 B.C. Ltd.
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- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Semiconductor package with protected sidewall and method of forming...
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- STMicroelectronics Pte Ltd
- Yun Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package structure
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- Issue date Dec 20, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yi-Da Tsai
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
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- H01 - BASIC ELECTRIC ELEMENTS
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METHOD FOR MANUFACTURING PACKAGE STRUCTURE
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3D HETEROGENEOUS INTEGRATIONS AND METHODS OF MAKING THEREOF
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PACKAGE STRUCTURE
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ENHANCED SEMICONDUCTOR STRUCTURES
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METHOD OF FORMING A PACKAGED SEMICONDUCTOR DEVICE HAVING ENHANCED W...
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SEMICONDUCTOR DEVICE HAVING A REDISTRIBUTION LINE
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SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD OF THE SAME
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3D INTEGRATED CIRCUIT (3DIC) STRUCTURE
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Information Patent Application
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HIGH DENSITY INTERCONNECT DEVICE AND METHOD
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Information Patent Application
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the principal constituent melting at a temperature of less than 400°C

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Semiconductor package and manufacturing method of the same

Ultra small molded module integrated with die by module-on-wafer as...

Semiconductor device with transmissive layer and manufacturing meth...

Land structure for semiconductor package and method therefor

Semiconductor package having a high reliability

Semiconductor device encapsulated by molding material attached to r...

Fan-out semiconductor package

Method of forming a packaged semiconductor device having enhanced w...

Package structure for heat dissipation

Semiconductor package with layer structures, antenna layer and elec...

Semiconductor chip

Method of manufacturing package-on-package device and bonding appar...

Surface treatment method and apparatus for semiconductor packaging

Elastic wave device

Solder removal from semiconductor devices

Method of manufacturing semiconductor package structure

Low warpage high density trench capacitor

Light-emitting device package including a lead frame

Semiconductor chip

Method for solder bridging elimination for bulk solder C2S intercon...

High density interconnect device and method

Semiconductor package having a high reliability

Semiconductor package

Uniform pressure gang bonding method

Fabrication process and structure of fine pitch traces for a solid...

Semiconductor structure and manufacturing method thereof

Semiconductor structure and method for making thereof

Exfoliated graphite materials and composite materials and devices f...

Semiconductor package with protected sidewall and method of forming...

Package structure

Patents Applicationslast 30 patents

LIQUID METAL SHIELD FOR FINE PITCH INTERCONNECTS

Low Warpage High Density Trench Capacitor

HIGH DENSITY INTERCONNECT DEVICE AND METHOD

3D INTEGRATED CIRCUIT (3DIC) STRUCTURE

Semiconductor Package

METHOD FOR MANUFACTURING PACKAGE STRUCTURE

SEMICONDUCTOR DEVICE WITH OPTICALLY-TRANSMISSIVE LAYER AND MANUFACT...

3D HETEROGENEOUS INTEGRATIONS AND METHODS OF MAKING THEREOF

PACKAGE STRUCTURE

ENHANCED SEMICONDUCTOR STRUCTURES

METHOD OF FORMING A PACKAGED SEMICONDUCTOR DEVICE HAVING ENHANCED W...

ULTRA SMALL MOLDED MODULE INTEGRATED WITH DIE BY MODULE-ON-WAFER AS...

SEMICONDUCTOR DEVICE HAVING A REDISTRIBUTION LINE

SECURE SEMICONDUCTOR INTEGRATION AND METHOD FOR MAKING THEREOF

INTEGRATED CIRCUIT PACKAGE WITH ELECTRO-OPTICAL INTERCONNECT CIRCUITRY

SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD OF THE SAME

3D INTEGRATED CIRCUIT (3DIC) STRUCTURE

FLIP-CHIP ON LEADFRAME HAVING PARTIALLY ETCHED LANDING SITES

QUANTUM COMPUTING ASSEMBLIES

SEMICONDUCTOR CHIP

HIGH DENSITY INTERCONNECT DEVICE AND METHOD

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

SEMICONDUCTOR PACKAGES AND METHODS OF FORMING SAME

PACKAGE STRUCTURE

SEMICONDUCTOR STRUCTURE AND METHOD FOR MAKING THEREOF

METHOD OF MANUFACTURING PACKAGE-ON-PACKAGE DEVICE AND BONDING APPAR...

Chip on Package Structure and Method

SEMICONDUCTOR CHIP

Package Structure for Heat Dissipation

Semiconductor Package