using transistors

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GPHYSICS G11Information storage G11CSTATIC STORES G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements Storage elements therefor

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G11C11/40using transistors

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Methods and systems for processing read-modify-write requests
- Patent number 12,271,624
- Issue date Apr 8, 2025
- Recogni Inc.
- Gary S. Goldman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing spurious write operations in a memory device
- Patent number 12,272,424
- Issue date Apr 8, 2025
- Synopsys, Inc.
- Shishir Kumar
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory controller performing training to improve communication and...
- Patent number 12,272,425
- Issue date Apr 8, 2025
- SK Hynix Inc.
- Nam Hyeok Jeong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor devices
- Patent number 12,271,263
- Issue date Apr 8, 2025
- SK hynix Inc.
- Sang Sic Yoon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reading from a mode register having different read and write timing
- Patent number RE50373
- Issue date Apr 8, 2025
- Sony Group Corporation
- Christopher E. Cox
Information Patent Grant
Metal gate memory device and method
- Patent number 12,274,051
- Issue date Apr 8, 2025
- Micron Technology, Inc.
- Hyucksoo Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Delay control circuit and a memory module including the same
- Patent number 12,273,113
- Issue date Apr 8, 2025
- Samsung Electronics Co., Ltd.
- Bumsoo Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Sensing and tuning for memory die power management
- Patent number 12,272,394
- Issue date Apr 8, 2025
- Fuad Badrieh
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device
- Patent number 12,272,395
- Issue date Apr 8, 2025
- Samsung Electronics Co., Ltd.
- Buil Jung
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of generating a multi-level signal using selective equalizat...
- Patent number 12,272,396
- Issue date Apr 8, 2025
- Samsung Electronics Co., Ltd.
- Junyoung Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Process for preparing a compound useful to treat mycoses
- Patent number 12,269,814
- Issue date Apr 8, 2025
- PULMOCIDE LIMITED
- Thomas Christopher Colley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Write operation assist circuit
- Patent number 12,266,399
- Issue date Apr 1, 2025
- Spreadtrum Communications (Shanghai) Co., Ltd.
- Yiqi She
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for manufacturing semiconductor device having diode connecte...
- Patent number 12,267,994
- Issue date Apr 1, 2025
- NANYA TECHNOLOGY CORPORATION
- Hsih-Yang Chiu
- G11 - INFORMATION STORAGE
Information Patent Grant
DRAM sense amplifier architecture with reduced power consumption an...
- Patent number 12,267,996
- Issue date Apr 1, 2025
- ATOMERA INCORPORATED
- Richard Stephen Roy
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and operation method thereof
- Patent number 12,266,395
- Issue date Apr 1, 2025
- Samsung Electronics Co., Ltd.
- Kyo-Gil Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Input data pre-alignment circuit capable of performing a first-in f...
- Patent number 12,266,396
- Issue date Apr 1, 2025
- Fujian Jinhua Integrated Circuit Co., Ltd.
- Minho Park
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus including parallel pipelines and methods of manufacturing...
- Patent number 12,265,485
- Issue date Apr 1, 2025
- Micron Technology, Inc.
- Kallol Mazumder
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for enhanced memory context restore
- Patent number 12,265,467
- Issue date Apr 1, 2025
- Advanced Micro Devices, Inc.
- Anwar Parvez Kashem
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Amplification circuit, control method, and memory
- Patent number 12,266,397
- Issue date Apr 1, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Weibing Shang
- G11 - INFORMATION STORAGE
Information Patent Grant
Communicating data with stacked memory dies
- Patent number 12,265,489
- Issue date Apr 1, 2025
- Robert Nasry Hasbun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device and dynamic logic circuit
- Patent number 12,266,398
- Issue date Apr 1, 2025
- Semiconductor Energy Laboratory Co., Ltd.
- Tomoaki Atsumi
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for ZQ calibration of data transmission drivin...
- Patent number 12,266,400
- Issue date Apr 1, 2025
- Electronics and Telecommunications Research Institute
- Min-Hyung Cho
- G11 - INFORMATION STORAGE
Information Patent Grant
Separated read BL scheme in 3T dram for read speed improvement
- Patent number 12,260,897
- Issue date Mar 25, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hidehiro Fujiwara
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and electronic device
- Patent number 12,260,898
- Issue date Mar 25, 2025
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- G11 - INFORMATION STORAGE
Information Patent Grant
In-memory computing circuit and method, and semiconductor memory
- Patent number 12,260,900
- Issue date Mar 25, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Heng-Chia Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Signal input buffer for effectively calibrating offset
- Patent number 12,260,901
- Issue date Mar 25, 2025
- FIDELIX CO., LTD.
- Jae Jin Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus with power-based data protection mechanism and methods fo...
- Patent number 12,260,895
- Issue date Mar 25, 2025
- Micron Technology, Inc.
- Bryce D. Cook
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus with memory process feedback
- Patent number 12,260,896
- Issue date Mar 25, 2025
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory devices and methods of processing security data thereof
- Patent number 12,260,918
- Issue date Mar 25, 2025
- Samsung Electronics Co., Ltd.
- Yoo-Jung Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit and memory device including sampling circuit
- Patent number 12,260,892
- Issue date Mar 25, 2025
- SK Hynix Inc.
- Jun Seok Noh
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
APPARATUSES AND METHODS FOR SINGLE AND MULTI MEMORY CELL ARCHITECTURES
- Publication number 20250118352
- Publication date Apr 10, 2025
- Micron Technology, Inc.
- Yang Lu
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20250118357
- Publication date Apr 10, 2025
- ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
- Sooji NAM
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE USING SEMICONDUCTOR ELEMENT
- Publication number 20250120062
- Publication date Apr 10, 2025
- Unisantis Electronics Singapore PTE Ltd.
- Koji SAKUI
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR SINGLE AND MULTI MEMORY CELL ARCHITECTURES
- Publication number 20250118353
- Publication date Apr 10, 2025
- Micron Technology, Inc.
- Yang Lu
- G11 - INFORMATION STORAGE
Information Patent Application
DUMMY DATA-BASED READ REFERENCE VOLTAGE SEARCH OF NAND MEMORY
- Publication number 20250118359
- Publication date Apr 10, 2025
- Yangtze Memory Technologies Co., Ltd.
- Lu Guo
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR MONITORED REFRESH MANAGEMENT OPERATIONS
- Publication number 20250118350
- Publication date Apr 10, 2025
- Micron Technology, Inc.
- Randall J. Rooney
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS INCLUDING CLOCK INPUT BUFFER
- Publication number 20250118356
- Publication date Apr 10, 2025
- Micron Technology, Inc.
- Yasuhiro Takai
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE HAVING MEMORY CHIP BONDED TO A CMOS CHI...
- Publication number 20250118354
- Publication date Apr 10, 2025
- KIOXIA Corporation
- Hiroshi MAEJIMA
- G11 - INFORMATION STORAGE
Information Patent Application
SIGNAL RECEIVER, DATA RECEIVER AND DATA LATCH THEREOF
- Publication number 20250118355
- Publication date Apr 10, 2025
- NANYA TECHNOLOGY CORPORATION
- Po-Chun Hsieh
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR SINGLE AND MULTI MEMORY CELL ARCHITECTURES
- Publication number 20250118358
- Publication date Apr 10, 2025
- Micron Technology, Inc.
- Yang Lu
- G11 - INFORMATION STORAGE
Information Patent Application
TARGETED COMMAND/ADDRESS PARITY LOW LIFT
- Publication number 20250117291
- Publication date Apr 10, 2025
- Lodestar Licensing Group LLC
- Aaron P. Boehm
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR SINGLE AND MULTI MEMORY CELL ARCHITECTURES
- Publication number 20250118351
- Publication date Apr 10, 2025
- Micron Technology, Inc.
- Yang Lu
- G11 - INFORMATION STORAGE
Information Patent Application
Methods for Enhanced Memory Context Restore
- Publication number 20250110864
- Publication date Apr 3, 2025
- ADVANCED MICRO DEVICES, INC.
- Anwar Parvez Kashem
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICES HAVING A RANDOM NUMBER GENERATOR FOR PROTECTING MEMO...
- Publication number 20250111871
- Publication date Apr 3, 2025
- NANYA TECHNOLOGY CORPORATION
- Wu-Der Yang
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES HAVING A RANDOM NUMBER GENERATOR FOR PROTECTING MEMO...
- Publication number 20250111870
- Publication date Apr 3, 2025
- NANYA TECHNOLOGY CORPORATION
- Wu-Der Yang
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM
- Publication number 20250111873
- Publication date Apr 3, 2025
- Rambus Inc.
- Thomas J. Giovannini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETECTING AND MITIGATING MEMORY ATTACKS
- Publication number 20250111048
- Publication date Apr 3, 2025
- Microsoft Technology Licensing, LLC
- Ishwar AGARWAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS REFRESH RATE REGISTER ADJUSTMENT BASED ON R...
- Publication number 20250111872
- Publication date Apr 3, 2025
- Micron Technology, Inc.
- Wonjun Choi
- G11 - INFORMATION STORAGE
Information Patent Application
RESERVOIR DEVICE AND RESERVOIR ARRAY
- Publication number 20250111874
- Publication date Apr 3, 2025
- Macronix International Co., Ltd.
- Yu-Hsuan LIN
- G11 - INFORMATION STORAGE
Information Patent Application
STORAGE DEVICE
- Publication number 20250107062
- Publication date Mar 27, 2025
- SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
- Shunpei YAMAZAKI
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE, MEMORY SYSTEM, AND OPERATING METHOD OF MEMORY DEVICE
- Publication number 20250103217
- Publication date Mar 27, 2025
- Samsung Electronics Co., Ltd.
- Tae Won KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND DEVICE FOR SETTING IO PARAMETERS FOR COMMUNICATION BETWE...
- Publication number 20250104756
- Publication date Mar 27, 2025
- SEMIFIVE INC.
- Hyun Min LEE
- G11 - INFORMATION STORAGE
Information Patent Application
SIGNAL ROUTING BETWEEN MEMORY DIE AND LOGIC DIE
- Publication number 20250104761
- Publication date Mar 27, 2025
- Micron Technology, Inc.
- Sean S. Eilert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi Bank Refresh in Volatile Memory Systems
- Publication number 20250104758
- Publication date Mar 27, 2025
- QUALCOMM Incorporated
- Saurabh SETHI
- G11 - INFORMATION STORAGE
Information Patent Application
STACKED MEMROY LAYERS WITH GLOBAL BIT LINE OR GLOBAL WORD LINE
- Publication number 20250104760
- Publication date Mar 27, 2025
- Intel Corporation
- Abhishek A. Sharma
- G11 - INFORMATION STORAGE
Information Patent Application
Compute-In-Memory architecture using look-up tables
- Publication number 20250104762
- Publication date Mar 27, 2025
- Kneron Inc.
- Oscar Ming Kin Law
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MITIGATION OF REFRESH MANAGEMENT ROW HAMMER
- Publication number 20250104757
- Publication date Mar 27, 2025
- Rambus Inc.
- Steven C. Woo
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC RANDOM-ACCESS MEMORY STRUCTURE WITH HIGH SPEED AND WIDE BUS
- Publication number 20250104763
- Publication date Mar 27, 2025
- Invention And Collaboration Laboratory, Inc.
- Chao-Chun Lu
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20250104755
- Publication date Mar 27, 2025
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei YAMAZAKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE
- Publication number 20250104759
- Publication date Mar 27, 2025
- KIOXIA Corporation
- Tsuneo Inaba
- G11 - INFORMATION STORAGE

using transistors

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Methods and systems for processing read-modify-write requests

Reducing spurious write operations in a memory device

Memory controller performing training to improve communication and...

Semiconductor devices

Reading from a mode register having different read and write timing

Metal gate memory device and method

Delay control circuit and a memory module including the same

Sensing and tuning for memory die power management

Memory device

Method of generating a multi-level signal using selective equalizat...

Process for preparing a compound useful to treat mycoses

Write operation assist circuit

Method for manufacturing semiconductor device having diode connecte...

DRAM sense amplifier architecture with reduced power consumption an...

Memory device and operation method thereof

Input data pre-alignment circuit capable of performing a first-in f...

Apparatus including parallel pipelines and methods of manufacturing...

Methods for enhanced memory context restore

Amplification circuit, control method, and memory

Communicating data with stacked memory dies

Semiconductor device and dynamic logic circuit

Apparatus and method for ZQ calibration of data transmission drivin...

Separated read BL scheme in 3T dram for read speed improvement

Memory device and electronic device

In-memory computing circuit and method, and semiconductor memory

Signal input buffer for effectively calibrating offset

Apparatus with power-based data protection mechanism and methods fo...

Apparatus with memory process feedback

Memory devices and methods of processing security data thereof

Integrated circuit and memory device including sampling circuit

Patents Applicationslast 30 patents

APPARATUSES AND METHODS FOR SINGLE AND MULTI MEMORY CELL ARCHITECTURES

SEMICONDUCTOR DEVICE

MEMORY DEVICE USING SEMICONDUCTOR ELEMENT

APPARATUSES AND METHODS FOR SINGLE AND MULTI MEMORY CELL ARCHITECTURES

DUMMY DATA-BASED READ REFERENCE VOLTAGE SEARCH OF NAND MEMORY

APPARATUSES AND METHODS FOR MONITORED REFRESH MANAGEMENT OPERATIONS

APPARATUS INCLUDING CLOCK INPUT BUFFER

SEMICONDUCTOR MEMORY DEVICE HAVING MEMORY CHIP BONDED TO A CMOS CHI...

SIGNAL RECEIVER, DATA RECEIVER AND DATA LATCH THEREOF

APPARATUSES AND METHODS FOR SINGLE AND MULTI MEMORY CELL ARCHITECTURES

TARGETED COMMAND/ADDRESS PARITY LOW LIFT

APPARATUSES AND METHODS FOR SINGLE AND MULTI MEMORY CELL ARCHITECTURES

Methods for Enhanced Memory Context Restore

MEMORY DEVICES HAVING A RANDOM NUMBER GENERATOR FOR PROTECTING MEMO...

MEMORY DEVICES HAVING A RANDOM NUMBER GENERATOR FOR PROTECTING MEMO...

METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM

DETECTING AND MITIGATING MEMORY ATTACKS

APPARATUSES AND METHODS REFRESH RATE REGISTER ADJUSTMENT BASED ON R...

RESERVOIR DEVICE AND RESERVOIR ARRAY

STORAGE DEVICE

MEMORY DEVICE, MEMORY SYSTEM, AND OPERATING METHOD OF MEMORY DEVICE

METHOD AND DEVICE FOR SETTING IO PARAMETERS FOR COMMUNICATION BETWE...

SIGNAL ROUTING BETWEEN MEMORY DIE AND LOGIC DIE

Multi Bank Refresh in Volatile Memory Systems

STACKED MEMROY LAYERS WITH GLOBAL BIT LINE OR GLOBAL WORD LINE

Compute-In-Memory architecture using look-up tables

MITIGATION OF REFRESH MANAGEMENT ROW HAMMER

DYNAMIC RANDOM-ACCESS MEMORY STRUCTURE WITH HIGH SPEED AND WIDE BUS

SEMICONDUCTOR DEVICE

MEMORY DEVICE