with separation/delamination along an ion implanted layer

Industry

CPC
H01L21/76254

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Parent Industries

HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Current Industry

H01L21/76254with separation/delamination along an ion implanted layer

Industries

Patents Grantslast 30 patents

Information Patent Grant
Method for transfer of a thin layer of silicon
- Patent number 12,183,625
- Issue date Dec 31, 2024
- GlobalWafers Co., Ltd.
- Gaurab Samanta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for producing a receiver substrate for a semiconductor-on-i...
- Patent number 12,183,624
- Issue date Dec 31, 2024
- Soitec
- Marcel Broekaart
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for bonding two substrates
- Patent number 12,176,244
- Issue date Dec 24, 2024
- Soitec
- Walter Schwarzenbach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming semiconductor device using high stress cleave plane
- Patent number 12,176,326
- Issue date Dec 24, 2024
- Silicon Genesis Corporation
- Theodore E. Fong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for producing a 3D semiconductor memory device and structure
- Patent number 12,154,817
- Issue date Nov 26, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for transferring a useful layer from a donor substrate onto...
- Patent number 12,142,517
- Issue date Nov 12, 2024
- Soitec
- Didier Landru
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3D semiconductor device and structure with single-crystal layers
- Patent number 12,136,562
- Issue date Nov 5, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bonded semiconductor structures
- Patent number 12,131,898
- Issue date Oct 29, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd
- Jing-Cheng Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3D semiconductor device and structure with metal layers and memory...
- Patent number 12,125,737
- Issue date Oct 22, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor structure comprising a buried porous layer for RF app...
- Patent number 12,119,258
- Issue date Oct 15, 2024
- Soitec
- Emmanuel Augendre
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor substrate
- Patent number 12,112,985
- Issue date Oct 8, 2024
- GlobalWafers Co., Ltd.
- Chih-Yuan Chuang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a substrate for a front-facing image sensor
- Patent number 12,100,727
- Issue date Sep 24, 2024
- Soitec
- Walter Schwarzenbach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for producing a 3D semiconductor device and structure with...
- Patent number 12,100,611
- Issue date Sep 24, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for transferring blocks from a donor substrate onto a receiv...
- Patent number 12,094,759
- Issue date Sep 17, 2024
- Soitec
- Didier Landru
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Systems and methods for a semiconductor structure having multiple s...
- Patent number 12,087,777
- Issue date Sep 10, 2024
- Taiwan Semiconductor Manufacturing Company Limited
- Yi-Tang Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a film on a support having a non-flat surface
- Patent number 12,087,615
- Issue date Sep 10, 2024
- Soitec
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for producing an advanced substrate for hybrid integration
- Patent number 12,074,056
- Issue date Aug 27, 2024
- Soitec
- Walter Schwarzenbach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3D semiconductor device and structure with bonding and DRAM memory...
- Patent number 12,068,187
- Issue date Aug 20, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- G11 - INFORMATION STORAGE
Information Patent Grant
Selective etching process for SiGe and doped epitaxial silicon
- Patent number 12,062,571
- Issue date Aug 13, 2024
- Qorvo US, Inc.
- Krishna Chetry
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication method of metal-free SOI wafer
- Patent number 12,040,221
- Issue date Jul 16, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yu-Hung Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for producing a 3D semiconductor device and structure with...
- Patent number 12,033,884
- Issue date Jul 9, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- G11 - INFORMATION STORAGE
Information Patent Grant
3D semiconductor devices and structures with metal layers
- Patent number 12,027,518
- Issue date Jul 2, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Engineered substrate structures for power and RF applications
- Patent number 12,009,205
- Issue date Jun 11, 2024
- QROMIS, Inc.
- Vladimir Odnoblyudov
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
System for fracturing a plurality of wafer assemblies
- Patent number 12,002,690
- Issue date Jun 4, 2024
- Soitec
- Didier Landru
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Selective etching process for SiGe and doped epitaxial silicon
- Patent number 11,996,318
- Issue date May 28, 2024
- Qorvo US, Inc.
- Krishna Chetry
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3D semiconductor devices and structures with metal layers
- Patent number 11,984,445
- Issue date May 14, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Semiconductor on insulator structure comprising a plasma nitride la...
- Patent number 11,984,348
- Issue date May 14, 2024
- GlobalWafers Co., Ltd.
- Sasha Joseph Kweskin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Strained semiconductor using elastic edge relaxation of a stressor...
- Patent number 11,978,800
- Issue date May 7, 2024
- ACORN SEMI, LLC
- Paul A. Clifton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a monocrystalline layer of GaAs material a...
- Patent number 11,976,380
- Issue date May 7, 2024
- Soitec
- Bruno Ghyselen
- C30 - CRYSTAL GROWTH
Information Patent Grant
Gallium oxide semiconductor structure and preparation method therefor
- Patent number 11,955,373
- Issue date Apr 9, 2024
- Shanghai Institute of Microsystem and Information Technology, Chinese Academy...
- Xin Ou
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH METAL LAYERS AND MEMORY...
- Publication number 20250006544
- Publication date Jan 2, 2025
- Monolithic 3D Inc.
- Zvi Or-Bach
- G11 - INFORMATION STORAGE
Information Patent Application
3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH SINGLE-CRYSTAL LAYERS
- Publication number 20240429086
- Publication date Dec 26, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
COMPOSITE SUBSTRATE, MANUFACTURING METHOD THEREOF AND SEMICONDUCTOR...
- Publication number 20240413163
- Publication date Dec 12, 2024
- ENKRIS SEMICONDUCTOR (WUXI), LTD.
- Kai CHENG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH MEMORY CELLS AND MULTIPL...
- Publication number 20240404866
- Publication date Dec 5, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- G11 - INFORMATION STORAGE
Information Patent Application
STRUCTURE COMPRISING A SUPPORT AND HAVING A NON-FLAT SURFACE
- Publication number 20240395601
- Publication date Nov 28, 2024
- Soltec
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
COMPOSITE STRUCTURE COMPRISING A USEFUL MONOCRYSTALLINE SIC LAYER O...
- Publication number 20240395603
- Publication date Nov 28, 2024
- SOITEC
- Gweltaz Gaudin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR PRODUCING A 3D SEMICONDUCTOR MEMORY DEVICE AND STRUCTURE
- Publication number 20240395592
- Publication date Nov 28, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PRODUCING AN ADVANCED SUBSTRATE FOR HYBRID INTEGRATION
- Publication number 20240379410
- Publication date Nov 14, 2024
- SOITEC
- Walter Schwarzenbach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH METAL LAYERS AND MEMORY...
- Publication number 20240363385
- Publication date Oct 31, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- G11 - INFORMATION STORAGE
Information Patent Application
SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING APPARATUS
- Publication number 20240355669
- Publication date Oct 24, 2024
- TOKYO ELECTRON LIMITED
- Yasutaka MIZOMOTO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FABRICATION METHOD OF METAL-FREE SOI WAFER
- Publication number 20240347377
- Publication date Oct 17, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yu-Hung Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PRODUCING AN ELECTRONIC SEMICONDUCTOR COMPONENT
- Publication number 20240321627
- Publication date Sep 26, 2024
- mi2-factory GmbH
- Constantin CSATO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PRODUCING A SEMICONDUCTOR STRUCTURE COMPRISING A USEFUL...
- Publication number 20240312831
- Publication date Sep 19, 2024
- SOITEC
- Alexis Drouin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUBSTRATE PROCESSING APPARATUS, SUBSTRATE PROCESSING METHOD, AND SU...
- Publication number 20240312804
- Publication date Sep 19, 2024
- TOKYO ELECTRON LIMITED
- Hayato TANOUE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D SEMICONDUCTOR DEVICES AND STRUCTURES WITH METAL LAYERS
- Publication number 20240304617
- Publication date Sep 12, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MAKING RADIO FREQUENCY SILICON-ON-INSULATOR (RFSOI) STRU...
- Publication number 20240304493
- Publication date Sep 12, 2024
- ATOMERA INCORPORATED
- HIDEKI TAKEUCHI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SILICON-ON-INSULATOR SUBSTRATE INCLUDING TRAP-RICH LAYER AND METHOD...
- Publication number 20240297070
- Publication date Sep 5, 2024
- Ron Bowman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
- Publication number 20240297145
- Publication date Sep 5, 2024
- KIOXIA Corporation
- Miki TOSHIMA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR ON INSULATOR STRUCTURE COMPRISING A PLASMA NITRIDE LA...
- Publication number 20240258156
- Publication date Aug 1, 2024
- GLOBALWAFERS CO., LTD.
- Sasha Joseph Kweskin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRAINED SEMICONDUCTOR USING ELASTIC EDGE RELAXATION OF A STRESSOR...
- Publication number 20240250172
- Publication date Jul 25, 2024
- Acorn Semi, LLC
- Paul A. Clifton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING SOI SUBSTRATE
- Publication number 20240249974
- Publication date Jul 25, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chi-Ming Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D SEMICONDUCTOR DEVICES AND STRUCTURES WITH METAL LAYERS
- Publication number 20240222368
- Publication date Jul 4, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEM FOR FRACTURING A PLURALITY OF WAFER ASSEMBLIES
- Publication number 20240222158
- Publication date Jul 4, 2024
- SOITEC
- Didier Landru
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH BONDING AND DRAM MEMORY...
- Publication number 20240213073
- Publication date Jun 27, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR PRODUCING 3D SEMICONDUCTOR DEVICES AND STRUCTURES WITH T...
- Publication number 20240215267
- Publication date Jun 27, 2024
- Monolithic 3D Inc.
- Deepak C. Sekar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR PRODUCING A 3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH...
- Publication number 20240178040
- Publication date May 30, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR TRANSFERRING A LAYER OF A HETEROSTRUCTURE
- Publication number 20240178056
- Publication date May 30, 2024
- SOITEC
- Thierry Barge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NCFET TRANSISTOR COMPRISING A SEMICONDUCTOR-ON-INSULATOR SUBSTRATE
- Publication number 20240170577
- Publication date May 23, 2024
- SOITEC
- Ionut Radu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PRODUCING A SILICON CARBIDE-BASED SEMICONDUCTOR STRUCTUR...
- Publication number 20240170284
- Publication date May 23, 2024
- SOITEC
- Gweltaz Gaudin
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING HYDROGEN INTRODUCTION LAYER PROVIDED...
- Publication number 20240170327
- Publication date May 23, 2024
- Micron Technology, Inc.
- MITSUNARI SUKEKAWA
- H01 - BASIC ELECTRIC ELEMENTS

with separation/delamination along an ion implanted layer

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Method for transfer of a thin layer of silicon

Process for producing a receiver substrate for a semiconductor-on-i...

Method for bonding two substrates

Method of forming semiconductor device using high stress cleave plane

Methods for producing a 3D semiconductor memory device and structure

Method for transferring a useful layer from a donor substrate onto...

3D semiconductor device and structure with single-crystal layers

Bonded semiconductor structures

3D semiconductor device and structure with metal layers and memory...

Semiconductor structure comprising a buried porous layer for RF app...

Semiconductor substrate

Method for manufacturing a substrate for a front-facing image sensor

Methods for producing a 3D semiconductor device and structure with...

Method for transferring blocks from a donor substrate onto a receiv...

Systems and methods for a semiconductor structure having multiple s...

Method for manufacturing a film on a support having a non-flat surface

Method for producing an advanced substrate for hybrid integration

3D semiconductor device and structure with bonding and DRAM memory...

Selective etching process for SiGe and doped epitaxial silicon

Fabrication method of metal-free SOI wafer

Methods for producing a 3D semiconductor device and structure with...

3D semiconductor devices and structures with metal layers

Engineered substrate structures for power and RF applications

System for fracturing a plurality of wafer assemblies

Selective etching process for SiGe and doped epitaxial silicon

3D semiconductor devices and structures with metal layers

Semiconductor on insulator structure comprising a plasma nitride la...

Strained semiconductor using elastic edge relaxation of a stressor...

Method for manufacturing a monocrystalline layer of GaAs material a...

Gallium oxide semiconductor structure and preparation method therefor

Patents Applicationslast 30 patents

3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH METAL LAYERS AND MEMORY...

3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH SINGLE-CRYSTAL LAYERS

COMPOSITE SUBSTRATE, MANUFACTURING METHOD THEREOF AND SEMICONDUCTOR...

3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH MEMORY CELLS AND MULTIPL...

STRUCTURE COMPRISING A SUPPORT AND HAVING A NON-FLAT SURFACE

COMPOSITE STRUCTURE COMPRISING A USEFUL MONOCRYSTALLINE SIC LAYER O...

METHODS FOR PRODUCING A 3D SEMICONDUCTOR MEMORY DEVICE AND STRUCTURE

METHOD FOR PRODUCING AN ADVANCED SUBSTRATE FOR HYBRID INTEGRATION

3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH METAL LAYERS AND MEMORY...

SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING APPARATUS

FABRICATION METHOD OF METAL-FREE SOI WAFER

METHOD FOR PRODUCING AN ELECTRONIC SEMICONDUCTOR COMPONENT

METHOD FOR PRODUCING A SEMICONDUCTOR STRUCTURE COMPRISING A USEFUL...

SUBSTRATE PROCESSING APPARATUS, SUBSTRATE PROCESSING METHOD, AND SU...

3D SEMICONDUCTOR DEVICES AND STRUCTURES WITH METAL LAYERS

METHOD FOR MAKING RADIO FREQUENCY SILICON-ON-INSULATOR (RFSOI) STRU...

SILICON-ON-INSULATOR SUBSTRATE INCLUDING TRAP-RICH LAYER AND METHOD...

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

SEMICONDUCTOR ON INSULATOR STRUCTURE COMPRISING A PLASMA NITRIDE LA...

STRAINED SEMICONDUCTOR USING ELASTIC EDGE RELAXATION OF A STRESSOR...

METHOD FOR FORMING SOI SUBSTRATE

3D SEMICONDUCTOR DEVICES AND STRUCTURES WITH METAL LAYERS

SYSTEM FOR FRACTURING A PLURALITY OF WAFER ASSEMBLIES

3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH BONDING AND DRAM MEMORY...

METHOD FOR PRODUCING 3D SEMICONDUCTOR DEVICES AND STRUCTURES WITH T...

METHODS FOR PRODUCING A 3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH...

METHOD FOR TRANSFERRING A LAYER OF A HETEROSTRUCTURE

NCFET TRANSISTOR COMPRISING A SEMICONDUCTOR-ON-INSULATOR SUBSTRATE

METHOD FOR PRODUCING A SILICON CARBIDE-BASED SEMICONDUCTOR STRUCTUR...

SEMICONDUCTOR DEVICE INCLUDING HYDROGEN INTRODUCTION LAYER PROVIDED...