3749987

Information

• Patent Grant
• 3749987

• References
• Source

• Patent Number

  3,749,987

• Date Filed

  Not available

• Date Issued

  Tuesday, July 31, 1973
  51 years ago

• CPC

  • H01L27/0688 - Integrated circuits having a three-dimensional layout
  • H01L27/0629 - in combination with diodes, or resistors, or capacitors
  • H01L29/00 - Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier
  • Y10S148/008 - Bi-level fabrication
  • Y10S148/043 - Dual dielectric
  • Y10S148/053 - Field effect transistors fets
  • Y10S148/122 - Polycrystalline
  • Y10S148/139 - Schottky barrier

• US Classifications

  • 257 - Active solid-state devices
  • 148 - Metal treatment
  • 438 - Semiconductor device manufacturing: process