Claims
- 1. A method for fabricating a semiconductor device structure, comprising:
providing a semiconductor substrate including at least one active device region; fabricating a capacitor structure on said semiconductor substrate; forming a diffusion barrier on at least a portion of a surface of said at least one active device region; depositing aluminum over said capacitor structure form an interconnect; and forming from said aluminum over said capacitor structure at least one conductive line in electrical communication with said interconnect.
- 2. The method of claim 1, further comprising:
forming a trench through a portion of said capacitor structure located over said at least one active device region.
- 3. The method of claim 2, wherein said depositing aluminum comprises depositing some of said aluminum into said trench.
- 4. The method of claim 2, wherein said forming said trench includes exposing said at least one active device region.
- 5. The method of claim 2, further comprising insulating said trench from said capacitor structure.
- 6. The method of claim 1, wherein said forming said diffusion barrier comprises forming a metal silicide layer of at least said portion of said surface of said at least one active device region.
- 7. The method of claim 6, wherein said forming said metal silicide layer includes selectively depositing said metal silicide layer.
- 8. The method of claim 6, wherein said forming said metal silicide layer includes:
depositing a metal or metal nitride; and annealing said metal or metal nitride to said at least one active device region.
- 9. The method of claim 6, wherein said forming said metal silicide layer comprises forming a buried metal diffusion layer adjacent said at least one active device region.
- 10. The method of claim 6, further comprising depositing a metal nitride layer over said metal silicide layer.
- 11. The method of claim 1, wherein said forming said at least one conductive line comprises patterning said aluminum over said capacitor structure.
- 12. The method of claim 1, further comprising removing said aluminum from locations over said capacitor structure.
- 13. The method of claim 12, wherein said removing comprises planarizing said aluminum.
- 14. The method of claim 12, wherein said removing comprises etching said aluminum.
- 15. The method of claim 1, wherein said forming said at least one conductive line comprises depositing a material layer over the semiconductor device structure and patterning said material layer.
- 16. A method for fabricating a semiconductor device structure, comprising:
forming a capacitor structure over at least a portion of an active surface of a semiconductor substrate; forming a buried metal diffusion layer on at least one active device region exposed through or adjacent to said capacitor structure; and disposing aluminum over at least a portion of said capacitor structure and said buried metal diffusion layer.
- 17. The method of claim 16, further comprising:
exposing said at least one active device region through said capacitor structure.
- 18. The method of claim 16, wherein said forming said buried metal diffusion layer includes forming a layer comprising metal silicide over said at least one active device region.
- 19. The method of claim 18, wherein said forming said layer comprising metal silicide includes selectively depositing said metal silicide over said at least one active device region.
- 20. The method of claim 18, wherein said forming said buried metal diffusion layer includes depositing a layer comprising metal or metal nitride over at least said at least one active device region and annealing said buried metal diffusion layer to said layer comprising metal or metal nitride.
- 21. The method of claim 18, wherein said forming said buried metal diffusion layer further includes forming a layer comprising metal nitride adjacent said layer comprising metal silicide.
- 22. The method of claim 16, further comprising forming at least one conductive line above said semiconductor substrate.
- 23. The method of claim 22, wherein said forming said at least one conductive line comprises forming said at least one conductive line from aluminum.
- 24. The method of claim 22, wherein said forming said at least one conductive line includes patterning said at least one conductive line from a layer comprising said aluminum.
- 25. The method of claim 22, wherein said forming said at least one conductive line includes planarizing a surface of the semiconductor device structure.
- 26. The method of claim 25, wherein said forming said at least one conductive line further includes depositing a layer of a material in electrical communication with said buried metal diffusion layer.
- 27. The method of claim 26, wherein said forming said at least one conductive line further includes patterning said layer of said material.
- 28. A method for fabricating an interconnect adjacent to a capacitor structure of a semiconductor device structure, comprising:
a diffusion barrier of at least an active device region adjacent to the capacitor structure; and disposing aluminum over said diffusion barrier.
- 29. The method of claim 28, further comprising:
forming a trench adjacent the capacitor structure.
- 30. The method of claim 29, wherein said forming said trench comprises etching said trench.
- 31. The method of claim 29, wherein said forming said trench includes exposing said active device region.
- 32. The method of claim 29, further comprising insulating said trench from the capacitor structure.
- 33. The method of claim 28, wherein said forming said diffusion barrier comprises forming a metal silicide layer on said active device region.
- 34. The method of claim 33, wherein said forming said metal silicide layer includes selectively depositing a metal suicide over said active device region.
- 35. The method of claim 33, wherein said forming said metal silicide layer includes:
depositing a layer comprising a metal or metal nitride over said active device region; and annealing said layer comprising said metal or metal nitride to said active device region.
- 36. The method of claim 28, further comprising forming a metal nitride layer over said active device region.
- 37. The method of claim 28, further comprising:
disposing aluminum over the semiconductor device structure.
- 38. The method of claim 37, further comprising:
patterning said aluminum.
- 39. The method of claim 37, further comprising:
planarizing a surface of the semiconductor device structure.
- 40. The method of claim 28, further comprising:
forming at least one conductive line over the stacked capacitor structure.
- 41. The method of claim 40, wherein said forming said at least one conductive line includes forming a layer comprising a conductive material over the semiconductor device structure.
- 42. The method of claim 41, wherein said forming said at least one conductive line further comprises patterning said layer comprising said conductive material.
- 43. The method of claim 42, wherein said at least one conductive line is in electrical communication with said aluminum over said diffusion barrier.
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application is a continuation of application Ser. No. 09/651,384, filed Aug. 29, 2000, pending, which is a continuation of application Ser. No. 09/102,331, filed Jun. 22, 1998, now U.S. Pat. No. 6,165,863, issued Dec. 26, 2000.
Continuations (2)
|
Number |
Date |
Country |
Parent |
09651384 |
Aug 2000 |
US |
Child |
10180846 |
Jun 2002 |
US |
Parent |
09102331 |
Jun 1998 |
US |
Child |
09651384 |
Aug 2000 |
US |