Claims
- 1. A semiconductor device comprising:
a substrate having an active semiconductor layer formed thereon; a plurality of substantially parallel buried conductive elements separated from the active semiconductor layer by and surrounded by an insulating material; and a deep trench capacitor formed through the active semiconductor layer, the insulative material, and between the conductive elements, the deep trench capacitor surrounded by a dielectric material.
- 2. The semiconductor device of claim 1, wherein the conductive elements include a material with a high melting point that prevents unwanted metallurgical changes.
- 3. The semiconductor device of claim 1, wherein the conductive elements are formed from a metal.
- 4. The semiconductor device of claim 3, wherein the metal comprises one of tungsten and a tungsten alloy.
- 5. The semiconductor device of claim 1, wherein the substrate comprises doped silicon.
- 6. The semiconductor device of claim 1, wherein the insulating material is formed from the group consisting of: oxide, oxy-nitride, and nitride.
- 7. The semiconductor device of claim 1, wherein the deep trench capacitor includes P+ silicon.
- 8. A semiconductor device comprising:
a substrate having an active semiconductor layer formed thereon; a first buried layer buried at a first depth within the substrate and including a plurality of substantially parallel first conductive elements oriented in a first direction; a second buried layer buried at a second depth within the substrate and including a plurality of substantially parallel second conductive elements oriented in a second direction, wherein the second depth is greater than the first depth; an insulating material arranged to separate the first and second buried layer and to separate the first and second conductive elements, and a deep trench capacitor formed through the active semiconductor layer, the insulative material, and between the plurality of substantially parallel first conductive elements.
- 9. The semiconductor device of claim 8, wherein the first buried layer and the second buried layer are substantially parallel to the active semiconductor layer;
- 10. The semiconductor device of claim 8, wherein the insulating material separates the first buried layer from the active semiconductor layer.
- 11. The semiconductor device of claim 8, wherein the first buried layer and the second buried layer include a material with a high melting point that prevents unwanted metallurgical changes when processing the active semiconductor layer.
- 12. The semiconductor device of claim 8, wherein the plurality of substantially parallel second conductive elements are connected to conductive parts that extend upwardly on opposite sides of the first buried layer beyond the first depth adjacent outer ones of the plurality of substantially parallel first conductive elements.
- 13. The semiconductor device of claim 8, wherein the deep trench capacitor includes a charge storage material and a dielectric material separating the charge storage material from the substrate.
- 14. The semiconductor device of claim 8, wherein the charge storage material includes P+ silicon.
- 15. A semiconductor device comprising:
a substrate having an active semiconductor layer formed thereon; a first buried layer buried at a first depth within the substrate and including a plurality of substantially parallel first conductive elements oriented in a first direction; a second buried layer buried at a second depth within the substrate and including a plurality of substantially parallel second conductive elements oriented in a second direction, wherein the second depth is greater than the first depth; an insulating material arranged to separate the first and second buried layer and to separate the first and second conductive elements; a deep trench capacitor formed through the active semiconductor layer, the insulative material, and between the plurality of substantially parallel first conductive elements; and wherein the plurality of substantially parallel second conductive elements are located either in front of or behind the deep trench capacitor.
- 16. The semiconductor device of claim 15, wherein the active device layer includes integrated circuits adapted for use with at least one of the group consisting of:
dynamic random-access memory (DRAM), static random-access-memory (SRAM), flash memory, synchronous dynamic random-access-memory (SDRAM), extended-data-out random-access-memory (EDO RAM), and burst-extended-data-out random-access-memory (BEDO RAM).
- 17. The semiconductor device of claim 15, wherein at least one of the first conductive elements and the second conductive elements is metal.
- 18. The semiconductor device of claim 17, wherein the metal comprises one of tungsten and a tungsten alloy.
- 19. The semiconductor device of claim 17, wherein the metal comprises one of a non-radioactive element selected from groups IVB, VB, VIB, VIIB, and VIIIB of the periodic table, and an alloy of the non-radioactive element.
- 20. The semiconductor device of claim 15, wherein the plurality of substantially parallel second conductive elements are connected to conductive parts that extend upwardly on opposite sides of the first buried layer beyond the first depth adjacent outer ones of the plurality of substantially parallel first conductive elements.
- 21. The semiconductor device of claim 15, wherein the second direction is orthogonal to the first direction.
RELATED APPLICATION
[0001] This application is a divisional of U.S. application Ser. No. 09/069,326 filed on Apr. 29, 1998 which is incorporated herein by reference.
[0002] This application is related to cofiled, copending and coassigned application entitled “Hi Q Inductive Elements” Attorney docket #303.381US1, U.S. application Ser. No. 09/069,346, now issued as U.S. Pat. No. 6,025,261.
Divisions (1)
|
Number |
Date |
Country |
Parent |
09069326 |
Apr 1998 |
US |
Child |
10705185 |
Nov 2003 |
US |