BRIEF DESCRIPTION OF THE DRAWINGS
The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.
FIG. 1 is a schematic cross-sectional view of a conventional chip package structure.
FIG. 2 is a schematic cross-sectional view of a chip package structure according to one preferred embodiment of the present invention.
FIG. 3 is a top view of the chip package structure shown in FIG. 2.
FIGS. 4 to 6 are schematic cross-sectional views showing the steps for forming the chip package structure shown in FIG. 2.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
Reference will now be made in detail to the present preferred embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers are used in the drawings and the description to refer to the same or like parts.
FIG. 2 is a schematic cross-sectional view of a chip package structure according to one preferred embodiment of the present invention. FIG. 3 is a top view of the chip package structure shown in FIG. 2. The chip package structure 300 as shown in FIGS. 2 and 3 comprises a chip 310, a package cover panel 320 and an adhesion layer 330. The chip 310 has an active surface 312. An image-sensing device 314 is disposed on the active surface 312 and a plurality of contact pads 316 is disposed around the image-sensing device 324. In one embodiment, the image-sensing device 314 includes a contact image sensor or a complementary metal-oxide-semiconductor (CMOS) image sensor for receiving an external light signal, for example. Through the chip 310, the light signal is converted into electric signal for further processing. The image-sensing device 314 is electrically connected to the surrounding contact pads 316 through metallic interconnecting wires (not shown), for example.
The package cover panel 320 is disposed above the active surface 312. Furthermore, the package cover panel 320 comprises a substrate 332 and a supporting part 324 disposed on the substrate 322. As shown in FIG. 2, the supporting part 324 defines a cavity S on the substrate 322 and the supporting part 324 is in contact with the active surface 312 so that the image-sensing device 314 on the active surface 312 is disposed within the cavity S. The adhesion layer 330 is disposed between the supporting part 324 and the active surface 312. Therefore, the image-sensing device 314 on the chip 310 will be covered by the package cover panel 320 and isolated from the outside world.
In particular, as shown in FIG. 2, the supporting part 324 of the package cover panel 320 in the present invention has a height H1 greater than the height H2 of the image-sensing device 314. Preferably, the height H1 of the supporting part 324 is set between 15 μm to 50 μm. In another preferred embodiment, the top end of the supporting part 324 has a groove 324a such that the adhesion layer 330 is disposed inside the groove 324a. In addition, the package cover panel 320 is fabricated using glass or polymethyl methacrylate (PMMA), for example. The adhesion layer 330 is fabricated using an ultra-violet adhesion material, for example.
It should be noted that the package cover panel 320 on the chip 310 is supported through the supporting part 324 of the package cover panel 320. Therefore, there is no particular limitation to the distance separating the package cover panel 320 from the chip 310. In other words, the height level of the supporting part 324 can be set to whatever level demanded. When the distance separating the package cover panel 320 and the chip 310 exceeds a certain limit, any micro-particle attached to the outer surface of the package cover panel 320 will not produce an image due to defocusing. Hence, the optical properties of the image-sensing device 314 on the chip 310 can hardly be affected by micro-particles.
Thereafter, a chip-on-board (COB) method or a chip-on-flex (COF) method is applied to connect electrically the contact pads 316 on the chip package structure 300 with the next stage of electronic device (not shown in FIG. 2).
In the following, a method of fabricating the chip package structure 300 is explained. FIGS. 4 to 6 are schematic cross-sectional views showing the steps for forming the chip package structure shown in FIG. 2. First, as shown in FIG. 3, a wafer W having an active surface 312 is provided. The active surface 312 has a plurality image-sensing devices 314 formed thereon. The image-sensing devices 314 are within a plurality of device zones Z of the wafer W. Furthermore, a plurality of contact pads 316 is disposed around various image-sensing devices 314.
Then, a package cover panel P is provided. The package cover panel P comprises a substrate 322 and a supporting part 324 disposed on the substrate 322. The supporting part 324 defines a plurality of cavities S on the substrate 322. More specifically, the location and number of cavities S on the substrate 322 defined by the supporting part 324 depends on the location and number of device zones Z on the wafer W. Hence, when the wafer W and the package cover panel P are joined together in a subsequent process, the cavities S on the package cover panel P will exactly cover all the image-sensing devices 314 on the wafer W.
If the package cover panel P is fabricated using glass, photolithographic and etching processes can be used to form the package cover panel P. In other words, the method of forming the package cover panel P includes coating a layer of photoresist material globally over the surface of a large piece of glass. Then, an exposure and development process is performed to form a patterned photoresist layer. Thereafter, using the patterned photoresist layer as an etching mask, the glass panel is etched to form the package cover panel P. However, if the package cover panel P is fabricated using polymethyl methacrylate (PMMA), either the photolithographic and etching process or a molding process can be used. In the molding process, a large PMMA panel is compressed using a molding tool to produce the package cover panel P shown in FIG. 4.
As shown in FIG. 4, the support part 324 of the package cover panel P formed using the aforementioned process has a height H1 greater than the height H2 of the image-sensing devices 314 on the wafer W, for example. Preferably, the height H1 of the supporting part 324 is set between 15 μm to 50 μm. In one embodiment, the foregoing process of fabricating the package cover panel P may includes forming at least an alignment mark M on the package cover panel P. It should be noted that the thickness of the substrate 322 in corresponding position above the contact pads 316 might be trimmed down a bit to facilitate subsequent cutting operation (see the description below).
As shown in FIGS. 4 and 5, an adhesion layer 330 is formed between the supporting part 324 and the active surface 312 of the wafer W so that the package cover panel P and the active surface 312 of the wafer W are joined together. Furthermore, each image-sensing device 314 on the wafer W is disposed inside one of the cavities S. In the present embodiment (shown in FIG. 4), the adhesion layer 330 is coated within the groove 324a. However, the adhesion layer 330 can be pre-formed on the active surface 312 in a position that corresponds to the groove 324a. Furthermore, the foregoing step of joining the package cover panel P with the active surface 312 of the wafer W may include aligning using the alignment mark M so that each image-sensing device 314 is accurately disposed inside each cavity S.
Finally, as shown in FIGS. 5 and 6, the package cover panel P and the wafer W are independently dissected to form a plurality of independent chip package structures 300. In the present embodiment, the cutting is applied at the locations and orientations indicated by the arrowhead A in FIG. 5. Furthermore, the package cover panel P is cut using a laser or a diamond-tooled cutter method while the wafer W is normally cut using a diamond-tooled cutter. In addition, the timing of the cutting operation is also quite flexible. The package cover panel P can be cut before or after the wafer W or both the package cover panel P and the wafer W can be cut simultaneously. Moreover, in the process of cutting the package cover panel P, a portion of the substrate above the contact pads 316 will also be removed to expose the contact pads 316.
In summary, the major advantages of the chip package structure in the present invention at least includes:
1. A package cover panel is directly used to package the chip before cutting up the wafer. Hence, outside micro-particles can hardly deposit on the chip so that the process yield of the chip package structure is increased. Moreover, the manufacturing cost of the chip package structure can be lowered.
2. Because both the support part of the package-cover panel and the substrate are fabricated using a transparent material, a chip package structure using the package cover panel can have a higher optical transmissivity than a conventional chip package structure.
3. The distance separating the chip and the package cover panel can be set according to the actual requirements by adjusting the height of the support part. Furthermore, when the height of the supporting part exceeds a definite level, micro-particles attached to the outer surface of the package cover panel will not be able to form an image due to the defocusing effect at a large distance. Hence, the optical properties of the image-sensing device will be unaffected by micro-particles.
It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention cover modifications and variations of this invention provided they fall within the scope of the following claims and their equivalents.
Patent Application
20080061425
