This application claims the priority benefit of Taiwan application serial no. 93110065, filed on Apr. 12, 2004. All disclosure of the Taiwan application is incorporated herein by reference.
1. Field of the Invention
The present invention relates to a chip package structure, and particularly to a chip package structure in which an outline of a juncture between a molding compound and a package substrate is a close curve with no sharp corner.
2. Brief Description of Related Art
Recently, along with the rapid technical development of electronic devices and the semiconductor industry, electronic products that are more user-friendly and with better performance are continuously placed in the market. Further, these products are designed to be lightweight and more compact than before. In the semiconductor industry, the production of integrated circuit (IC) includes three stages: IC design, IC production and IC package. In IC packaging, a bare chip is obtained via wafer production, circuit design, mask formation and wafer sawing. Each bare chip obtained by sawing the wafer is electrically connected to a substrate via bonding pads formed on the chip. A molding compound encapsulates the chip to protect the bare chip from being polluted by dusts and being adversely affected by external moisture, while an electric interconnect between the chip and an external device is maintained. A chip package is thus completed.
For a high-pin-count IC device, a ball grid array package may provide a great amount of contacts, an improved heat dissipation and good electric properties. The ball grid array package thus becomes popular in the chip package field. In a ball grid array package, a bare chip is electrically connected to a package substrate via wires or bumps by means of wire bonding or the flip chip bonding technology. The substrate is then electrically and physically connected to a large printed circuit board via solder balls so that signal transmission between interfaces, devices and terminals, respectively on the substrate and the printed circuit board can be achieved by the solder balls.
Furthermore, depending on the types of the substrate, the ball grid array can be divided into plastic-BGA package (PBGA package), ceramic-BGA package (CBGA package) and tape-BGA package (TBGA package) in which a tape with patterns thereon is directly attached to the chip.
In a conventional chip packaging, the molding compound is formed by providing a molding compound material, such as epoxy resin, which is a semi-solid at high temperature, molding and cooling the molding compound material to form the molding compound enclosing the chip. However, since the coefficients of thermal expansion (CTE) of the chip, the package substrate and the molding compound are different, thermal stress will generate during the packaging process or the subsequent reliability test or the actual operation due to temperature differences. Thermal stress is also generated at the junctures between the three different materials (chip, package substrate and molding compound), especially at the corners of the molding compound. Therefore, the patterned wirings located at the corners of the molding compound tend to be damaged, or delamination between the molding compound and the substrate occurs. Consequently, chip default and deterioration in yield are resulted.
Therefore, it is an object of the invention to provide a chip package structure in which an outline of a juncture between a molding compound and a package substrate is a smooth closed curve, so that thermal stress is uniformly distributed to prevent stress concentration. The reliability of the chip package structure is thereby improved.
In order to achieve the above and other objectives, the chip package structure of the invention includes a package substrate, a chip and a molding compound. The package substrate has a carrying surface and a back surface opposite to the carrying surface. The chip is mounted on the carrying surface and electrically connected to the package substrate. Furthermore, the molding compound is applied over the carrying surface to cover the chip and a part of the package substrate. The outline of the juncture between molding compound and the package substrate is a smooth closed curve so that thermal stress is uniformly distributed to prevent stress concentration, and thereby the reliability of the package structure is improved.
In one preferred embodiment of the invention, the outline of the juncture between the molding compound and the package substrate is a circle, an ellipse, a polygon with rounded corners, or other rounded shapes. The chip package structure further includes a plurality of solder balls mounted on the back surface of the package substrate and electrically connected to the chip via the package substrate to complete a ball grid array package.
In one preferred embodiment of the invention, the connection between the chip and the package substrate is achieved by a plurality of wires. The molding compound covers the wires. Alternatively, the electric and mechanic connection between the chip and the package substrate is achieved via a plurality of bumps by the flip chip interconnect technology. The molding compound can be, for example, polymer resin.
As described above, the molding compound of the chip package structure of the invention has rounded corners to prevent stress concentration. Since the outline of the juncture between the molding compound and the package substrate is a smooth closed curve, thermal stress can be uniformly distributed over the juncture to prevent any delamination or damage of the patterned wirings. The reliability of the chip package structure is thus improved.
Still referring
It is noted that the connection between the chip and the package substrate is achieved by a plurality of wires. The molding compound covers the wires. Alternatively, the electric and mechanic connection between the chip and the package substrate is achieved via a plurality of bumps by the flip chip interconnect technology. The features of the invention can be also applied to other packaging technologies.
The outline of the juncture between the molding compound and the package substrate is not limited to a circle.
In other words, the outline of the juncture between the molding compound and the package substrate is of various smooth closed curved profiles such as circle, ellipse or polygon with rounded corners. The molding compounds can be of pillar, conical, polygonal column or semi-spherical shapes. For example, the molding compound shown in
In view of foregoing, the chip package structure of the invention modifies the outline of the molding compound in a manner that the outline of the juncture between the molding compound and the package substrate is a smooth closed curve. The profile and the size of the molding compound vary according to the design demands and the actual applications.
The chip package structure according to the invention provides the following advantages.
1. The thermal stress is uniformly distributed to prevent any stress concentration at the outline of the juncture between the molding compound and the package substrate to protect the patterned wirings on the package substrate.
2. Any delamination due to a non-uniform distribution of thermal stress between the molding compound and the package substrate can be prevented.
3. The yield of the chip packaging and the reliability of the chip package structure are improved.
Realizations in accordance with the present invention therefore have been described in the context of particular embodiments. These embodiments are meant to be illustrative and not limiting. Many variations, modifications, additions, and improvements are possible. Accordingly, plural instances may be provided for components described herein as a single instance. Additionally, structures and functionality presented as discrete components in the exemplary configurations may be implemented as a combined structure or component. These and other variations, modifications, additions, and improvements may fall within the scope of the invention as defined in the claims that follow.
Number | Date | Country | Kind |
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93110065 | Apr 2004 | TW | national |