Patent Grant
10643873
The present disclosure relates to a cluster tool apparatus and a method of controlling the cluster tool apparatus, in particular but not limited to, the present disclosure is related to a cluster tool apparatus for processing semiconductor products and a method of controlling the cluster tool apparatus to minimize a cycle time of the cluster tool apparatus.
Semiconductors are ubiquitous in modern society and used in a wider range of uses. Some examples are modern electronic components such as diodes, transistors, etc. Semiconductors are also used commonly to create wafers or substrates that can be used in electronics for fabrication of integrated circuits or printed circuit boards or photovoltaic cells. Wafer fabrication processes are carefully controlled and managed processes.
Cluster tool systems or cluster tool apparatuses are a type of integrated equipment that is used in semiconductor processing methods, in particular cluster tools are used in wafer processing. Cluster tools are used in the wafer manufacturing process. Cluster tools provide a flexible reconfigurable, and efficient environment, resulting in higher productivity while resulting in shorter cycle times.
There is economic interest in optimising the wafer manufacturing process to maximize the production of wafers by reducing the manufacturing time. There exists a need to improve the control of the cluster tool apparatus to reduce inefficiencies and minimize waiting times within the wafer processing cycle.
It is an object of the present disclosure to provide a cluster tool apparatus and a method of controlling the cluster tool apparatus that will ameliorate one or more of the current problems associated with known cluster tool apparatuses or at least provide the public with a useful alternative or choice.
In accordance with a first aspect, the present disclosure provides a method of controlling a cluster tool apparatus, wherein the cluster tool includes one or more processing modules and a robot that is configured to move a semiconductor product to and from the one or more processing modules, the cluster tool configured for processing semiconductor products, the method of controlling the cluster tool apparatus to perform a processing cycle comprises the steps of:
In an embodiment the processing cycle includes one or more semiconductor processing steps being conducted by the processing module, a robot loading step where the robot loads the semiconductor product into the processing module, and a robot unloading step where the robot unloads the semiconductor product from the processing module, and;
In an embodiment the schedule outputs or sets a plurality of robot waiting times, wherein each robot waiting time relates to each processing step of the processing cycle, and;
In an embodiment the schedule is determined mainly by selecting and solving a program from a plurality of programs, wherein the program relates at least the semiconductor residency parameter and a processing cycle time, and each linear program outputting at least the robot waiting times.
In an embodiment the program selected for solving is based on a relationship between the processing cycle time and a robot cycle time, the program being selected from a total of three programs (one program and two linear programs), and wherein the method comprises the step of solving the selected program to obtain the robot waiting time.
In an embodiment the method comprises the step of determining a scheduling strategy for the cluster tool apparatus, wherein the scheduling strategy defines the order of steps in the processing cycle, and wherein solving the program results in defining an optimal schedule based on the robot waiting times.
In an embodiment an algorithm is applied if the robot cycle time equals the processing cycle time, a second linear program being selected if the robot cycle time is less than processing cycle time, and a third linear program being selected program if, for some processing steps, the processing cycle time is greater than the longest natural workload of these processing steps.
In an embodiment the scheduling strategy is determined based on a mathematical model of the cluster tool apparatus processing cycle, the mathematical model includes and utilizes a plurality of system parameters, wherein the system parameters are time values or parameters.
In an embodiment the mathematical model is a petri net that models the processing cycle and wherein the system is modelled as a transport bound cluster tool apparatus, the model further modelling each processing step,
In an embodiment the system parameters comprise at least one or more of:
In accordance with a second aspect, the present disclosure provides a cluster tool apparatus for processing a semiconductor product, the cluster tool apparatus comprising;
In an embodiment the processing cycle includes one or more semiconductor processing steps being conducted by the processing module, a robot loading step where the robot loads the semiconductor product into the processing module, and a robot unloading step where the robot unloads the semiconductor product from the processing module, and;
In an embodiment the schedule outputs a plurality of robot waiting times, wherein each robot waiting time relates to each processing step of the processing cycle,
In an embodiment the schedule is determined mainly by selecting and solving a program from a plurality of programs, wherein the program relates at least the semiconductor residency parameter and a processing cycle time, and each program outputs at least the robot waiting times.
In an embodiment the controller is configured to select a program from a plurality of programs based on a relationship between the processing cycle time and a robot cycle time, and wherein the controller is further configured to solve the selected program to output a robot waiting time.
In an embodiment the controller is configured to determine a scheduling strategy for the cluster tool apparatus, wherein the scheduling strategy defines the order of steps in the processing cycle, and wherein solving the program results in defining an optimal schedule based on the robot waiting times.
In an embodiment an algorithm is applied if the robot cycle time equals the processing cycle time, a second linear program being selected if the robot cycle time is less than processing cycle time, and a third linear program being selected program if, for some steps, the processing cycle time is greater than the longest natural workload of these processing steps.
In an embodiment the scheduling strategy is determined based on a mathematical model of the cluster tool apparatus processing cycle, the mathematical model includes and utilizes a plurality of system parameters, and wherein the system parameters comprise at least one or more of:
In an embodiment the mathematical model is a petri net that models the processing cycle, the system is modelled as a transport bound cluster tool apparatus, the model further modelling each processing step,
In an embodiment the controller comprises a processor, a memory unit and a robot interface, the processor being in communication with the memory unit and the robot interface,
Embodiments of the present invention will now be described, by way of example, with reference to the accompanying drawings in which:
The foregoing describes only a preferred embodiment of a cluster tool apparatus, a method of controlling a cluster tool apparatus, and modifications, obvious to those skilled in the art, can be made thereto without departing from the scope of the present disclosure.
Cluster tool apparatuses is a type of integrated equipment that implements semiconductor processing technology. In particular a cluster tool apparatus is an integrated equipment that implements single wafer processing technology. In this disclosure the semiconductor product is a wafer and the present disclosure will refer to a wafer. It should be understood that the cluster tool apparatus may be used to process any other suitable semiconductor product.
Cluster tool apparatuses can provide a flexible, reconfigurable, and efficient environment, resulting in higher productivity, shorter cycle times, better utilization of space and lower capital expenses. Therefore cluster tools are increasingly used in a semiconductor processing method, such as a wafer fabrication process.
The loadlocks 120, 122 or 220, 222 are used for loading and unloading raw wafers. Raw wafers are loaded or unloaded into a cluster tool in a cassette by a cassette way, and a cassette holds a plurality of wafers. The wafer is transported to an appropriate processing module by the robot 130, 230 for processing, and returned to the loadlock after processing has been completed. Once all the wafers in a cassette have been processed, the cassette is unloaded so that another cassette can be loaded. The order of transporting the wafer to the specific processing modules is dependent on a recipe. At each step the wafer is required to stay within the processing module for a specified time to be processed.
The advantage of using a pair of loadlocks 120, 122 or 220, 222 is advantageous because the cluster tool 100, 200 can operate continuously without interruption. A cluster tool generally operates under a steady state in one of two different regions: a process-bound or transport-bound regions. In the process-bound region or process-bound mode the wafer processing time at PMs decides the cycle time of the system. For a process-bound mode a backward strategy is an optimal strategy for scheduling the operation of a single-arm cluster tool, in particular to control operation of the robot 130.
In the transport-bound region or transport-bound mode the robot task time dominates the cycle time of the apparatus 100, 200. It is desirable to determine a cyclic schedule under a steady state to achieve higher predictability, improved wafer quality and cheaper wafer production. In certain manufacturing processes, such as low pressure chemical vapor deposition (LPCVD), a processed wafer needs to be removed from the processing module within a limited time, otherwise its surface would suffer from severe quality problems due to residual gases and high temperature in a processing module. Such a constraint is referred to as a wafer residency time. The wafer residency time complicates the scheduling of cluster tool operation. In prior art systems various models have been created to model the behavior of cluster tools. These prior art models do not take into account wafer residency time and generally model the cluster tool as a process-bound system. The present disclosure is directed to a method of controlling a cluster tool apparatus based on a model that accounts for wafer residency time and models the cluster tool apparatus as a transport-bound system. The present control method also accounts for the situation where multiple processing modules are required or used for a processing step.
The present disclosure will be described with respect to a single arm cluster tool apparatus 100. The present disclosure discloses a method of controlling a cluster tool apparatus wherein the method comprises the steps of: receiving a plurality of system parameters form a user interface, wherein the system parameters relate to one or more components of the processing cycle, determining a schedule for performing the processing cycle utilizing the one or more processing modules, wherein the schedule being determined based on a semiconductor product residency parameter i.e. a wafer residency time or any other suitable wafer residency parameter. The method of controlling the cluster tool apparatus is based on a model of the cluster tool apparatus and determines an optimal schedule to operate the robot. The schedule outputs at least the robot waiting times and the schedule is based on a number of system parameters. The optimal schedule is derived based on a relationship between the semiconductor residency parameter (i.e. a wafer residency time) and the cycle time of the system. The schedule is obtained by solving a program or a linear program.
In a further alternative embodiment the commercial solver 303 may be a hardware module that comprises a suitable processing unit. The commercial solver 303 may be controlled by the processor 302 to solve a program or a linear program to generate a schedule.
The controller 300 may further comprise a robot interface 306 that is in electronic communication with the processor 302. The robot interface 306 is also in communication with the robot 130. In particular the robot interface 306 is in communication with a motor or driver of the robot 130. The robot interface may be a wireless communication module that can wirelessly communicate with a suitable interface in the robot 130 to control operation of the robot. The controller 300 further includes one or more processing module interfaces 308. The processing module interface 308 is configured to communicate with the processing modules 111-115 and control the operation of the processing modules. The processor 302 is further in electronic communication with a user interface to receive inputs from the user. The processor 302 can also output information for display to the user via the user interface 140.
The memory unit 304 stores a mathematical model (described later) of the cluster tool apparatus. The processor 302 is configured to receive a plurality of system parameters such as time units for various actions of the processing cycle via the user interface 140. The processor 302 is further configured to determine a schedule for performing the processing cycle utilizing the one or more processing modules 111-115 and wherein the schedule is determined based on a semiconductor product residency parameter (i.e. a residency time). The processor 302 is configured to determine robot waiting times for processing cycle and uses the robot waiting times to control robot 130 appropriately. The robot waiting time relates to each processing step of the processing cycle.
In an alternative embodiment each processing module may include a processing module interface associated with it, and the processor 302 is configured to communicate with and control each processing module via each processing module interface.
The cluster tool apparatus (i.e. cluster tool system) 100 is modelled using a mathematical model.
At a high level in the Petri Net 400 nodes represent places as circles and transitions as bars. Places and transitions are connected by arcs (i.e. lines). As shown in
Further details of how the system model is constructed is provided below. The description below explains the assumptions used in the model and explains details of the cluster tool apparatus model. Assume that the loadlocks are numbered as Step 0. Then, there are n+1 steps for the system. For Step i, i∈Ωn={0, 1, . . . , n}, its PMs are modeled by timed place pi with K(pi)=mi, i∈Nn=Ωn\{0}, and K(p0)=∝ representing that there are always wafer to be processed in the loadlocks. Timed place qi with K(qi)=1 models robot's waiting before removing a wafer (token) from pi. Timed place xi, i∈Ωn, with K(xi)=1 models that the robot moves from Steps i−1 to i (or from Step n if i=0) with a wafer carried. Pictorially, these places are denoted by a circle. Timed transitions ti and ui model that the robot drops a wafer into pi and removes a wafer from pi, respectively. Timed transition yi models that the robot moves from Steps j to i, j, i∈Ωn, without carrying a wafer. Pictorially, transitions are denoted by a bar. Place r with K(r)=1 models the robot and it is denoted by an ellipse. If there is a token in r, the robot is available and can be used to unload a wafer. An arc (ti, r), i∈Ωn, is added to represent that, by firing ti (loading a wafer into pi), the robot arm is released. At last, by adding arcs (xi, t1), (ti, pi), (pi, ui), (qi, ui), and (ui, xi+1) (or (un, x0) if i=n), i∈Ωn, the PN model for the system is obtained as shown in
A basic activity sequence for the Petri Net model 400 is defined as Ai=<yi→ui→xi+1→ti+1 (i+1=0 if i=n)>, i∈Ωn. Note that if ti is followed by yi and yi represents that the robot moves from Step i to i, or it takes no action if mi=1. Otherwise, if mi>1, it also needs to take a time for moving from one module to another within Step i. Then, without taking the robot waiting into account, η=(Ai
It is assumed that a one-wafer cycle (i.e. a one processing cycle) is a sequence of activities with each basic activity Ai, i∈Ωn, appearing just once and during which one semiconductor product (e.g. a wafer) is dropped into and removed from the loadlocks 120, 122. The processing cycle time (i.e. system cycle time) is the minimal time needed to complete the one wafer cycle. The processing cycle time (i.e. a system cycle time) is a parameter that should be reduced or minimized in order to achieve optimal and cost effective semiconductor product (i.e. wafer) processing.
It is further assumed for the mathematical model in a scheduling strategy η, an activity chain is a sequence of activities whose indexes appear with a consecutively increasing order, but not necessary adjacently. An example scheduling strategy can be defined as η=(A0A4A5A1A2A3). Based on the above assumption, A0 and A1A2A3 form an activity chain although A0 and A1A2A3 are separated by A4A5. Also, A4A5 forms an activity chain. Hence, there are two activity chains in η=(A0A4A5A1A2A3).
It is further assumed for the mathematical model and control method of the present disclosure that only one wafer should be in processing during the whole cycle. If an optimal scheduling strategy is applied and it is schedulable, the maximum productivity can be achieved by using the model that works on the assumption that only one wafer is used in the processing cycle. Let D be the set of indexes of an activity chain in η and, given a D, let i=Min{D}. Then, the initial marking is set as follows. For each activity chain in η, find D and set M0(pi)=mi, i∈D\{0}, M0(pj)=mj−1, j∈D\{0, i}; M0(p0)=∝ indicating that there are always wafers to be processed in the loadlocks; M0(r)=0; M0(xi)=0, i∈Ωn; M0(qj)=0, j∈Nn; and M0(q0)=1, indicating that the robot is waiting at Step 0 for unloading a wafer there.
Take the scheduling strategy η=(A0A5A3A4A1A2) as an example, there are three activity chains: 1) A0A1A2; 2) A5; and 3) A3A4. For Chain 1, D={0, 1, 2}, the minimal one is 0. Thus, M0(p0)=∝, M0(p1)=m1−1, and M0(p2)=m2−1. For Chain 2, D={5} and set M0(p5)=m5. For Chain 3, D={3, 4} and Min{3, 4}=3. Thus, set M0(p3)=m3, and M0(p4)=m4−1. Then, set M0(r)=0, M0(xi)=0, i∈Ωn. Finally, set M0(qj)=0, j ∈n, and M0(q0)=1.
At M0, as M0(r)=0; M0(xi)=0, i∈Ωn; M0(qj)=0, j∈n, and M0(q0)=1; the only enabled transition is u0. After u0 fires, the robot performs task sequence: <x1→t1> to load a wafer into Step 1 such that M1 is reached, and at M1, M1(p1)=m1. Thereafter, the robot may execute the following task sequence: <y0→q0→u0→x1) to load a wafer into Step 1 again. As M1(p1)=m1, from the transition enabling and firing rules, a deadlock occurs. To avoid deadlock, the following control policy is proposed. For the Petri Net of the system, given a strategy η=(Ai
, is said to be control-enabled if t(i
Based on the above definition at M0, after u0 fires, the robot performs task sequence <x1→t1→yi
The various transitions and places represented in the Petri Net model 400 are associated with an amount of time units. In the model 400 if a transition t is associated with time , it means that firing t lasts for
time units. If place p is associated with time
, it implies that a token in p has to stay there for at least
time units before it can enable its output transition. Token p represents a semiconductor product i.e. a wafer. It is assumed that: 1) the time taken for the robot to unload/load a wafer from/into a PM and loadlocks is identical and denoted by λ, and 2) the time taken for the robot to move from Steps j to i, j≠i, is same no matter whether it carries a wafer or not and denoted by μ. The time required to process a wafer at Step i is αi, i∈Ωn, with α0=0. ωi, i∈Ωn, denotes the robot waiting time in qi, and τi, i∈
n, the wafer sojourn time at Step i. After being processed, a wafer needs to be removed from a PM at Step i within a limited time δi, i∈
n, we have τi∈[αi, αi+δi]. In the loadlocks, there are no wafer processing and thus there is no wafer residency time constraint.
If activity sequence Ai−1Ai/AnA0 is an item in η, after loading a wafer into pi/p0, the robot needs to wait there for at least αi time units if mi=1, i∈n, and then unloads a wafer from pi/p0. This implies that yi/y0 takes no time. However, if mi>1, after loading a wafer into Step i, the robot needs to move to a parallel module at Step i for unloading the earliest wafer. Hence, in this case, yi takes μ time units. Note that, for η=(A0 Ai
The time taken for different transitions and places are modelled and defined in table 500, as shown in n, by the PN model, a schedule is feasible if whenever ui, is enabled and fired, the following condition is true αi≤τi≤αi+δi.
Timeliness analysis of the system is performed by modelling the cycle time (of the processing cycle), robot cycle time and step cycle using the variables from Table 500 of
An optimal scheduling strategy is determined based on the mathematical definitions below. Given a scheduling strategy η=(Aiη and i∈
n}∪{0|(AnA0)
η} and ΛR={i|(Ai−1Ai)⊂η and i∈
n}∪{0|AnA0) ⊂η}. For η=(A0 Ai
n. If 0∈ΛR, after loading a wafer into the loadlocks, the robot can unload a wafer there immediately. However, in this case, if mi>1, i∈
n, after loading a wafer into Step i, the robot should move to a parallel module at Step i that is processing the earliest wafer that is loaded into this step for unloading it. To ease the presentation, basic cycles are defined as follows.
Definition 3.1: For a single arm cluster tool apparatus, a robot schedule whose activity indexes are in a decreasing order except those in ΛR forms a basic cycle.
For example, for a scheduling strategy, η=(A0A1A2A3A4) forms a basic cycle, since it is equivalent to A3A4A0A1A2 and ΛR={1, 2, 4} such that the condition described in Definition 3.1 is met. However, a scheduling strategy η=(A0A2A1A4A3) does not form a basic cycle. A basic cycle dominates all other one-wafer cycle in terms of having shorter cycle time.
Lemma 3.1: For the following three cases, we have
The above explanation of the model is created on the assumption that there is one processing module per processing step of the processing cycle. Now assume that there are parallel processing modules in each step, wherein Step i and i∈ΛR. After loading a wafer (i.e. a semiconductor product) into Step i, the robot 130 moves to an associated processing module 111-115 in Step i that is processing the earliest wafer loaded into this step for unloading this wafer, which takes μ time units. Further, if this wafer has not been completed yet, the robot should wait ωi time units. Hence, by treating Step i as a whole, i∈Ds. Then, with no wafer residency time constraint being taken into account, the controller 300 may or alternatively the optimal scheduling strategy is analyzed for a single-arm cluster tool with parallel modules as follows.
Case 1: There is no parallel PM. For such a case, an optimal scheduling strategy can be found, as disclosed above or based on a well known method such as disclosed in Dawande et al, 2002.
Case 2: There are parallel PMs and k∈{i|mi=1} with αk≥μ. In this case, |Ds|≥2, and from Lemma 3.1, for Steps i with parallel PMs, it must have i∈ΛP. Then, the optimal scheduling strategy is obtained for the whole system by a polynomial time algorithm. In one embodiment the polynomial time algorithm can be derived in Dawande et al, 2002.
Case 3: There are parallel PMs and for all k ∈{i|mi=1}, αk<μ. In this case, there are still two cases, i.e., Case 3.1: There are at least two steps where there are parallel PMs; and Case 3.2: there is only one step where there are parallel PMs. For Case 3.1, similar to Case 2, since |Ds|≥2, for Steps i with parallel PMs, i∈ΛP. Thus, an optimal scheduling strategy for the whole system can be determined based on the method in Dawande et al., 2002.
For Case 3.2, let q denote the step with mq parallel PMs and assume that there are mq−1 wafers being processed in PMs 1, 2, . . . , and mq−1, respectively. Under scheduling strategy (A0A1A2A3 . . . An), after loading a wafer into the mqth PM, the robot moves to the 1th PM, and wait ωq time units if necessary. Thereafter, it unloads this wafer, moves to Step q+1 or 0 if q=n, and loads the wafer into it. These activities take 2λ+μ+(ωq+μ) time units. After loading a wafer into Step q+1 (or 0), activity sequence <processing in Step q+1 (or 0)→unloading from it→moving to Step q+2 or 0 if q−1=n→loading the wafer into it> is followed and it takes 2λ+μ+αq+1 (or 2λ+μ+α0 if q=n) time units. Similarly, from the loading of a wafer into Step q+2 to the loading of a wafer into Step q+3, 2λ+μ+αq+2 (or 2λ+μ+α0 if q−1=n) time units are taken. In this way, after a cycle, when the robot loads a wafer into the 1th PM of Step q, it is true that such a cycle takes χ time units where
Let σ1 denote the time instant of loading a wafer into the mqth PM at Step q. From σ1, after mq−1 cycles, the robot loads a wafer into the (mq−1)th PM at Step q. Then, the robot moves to the mqth PM at Step q for unloading a wafer there and let σ2 denote this time instant. From above analysis, it can be seen that σ2−σ1=(mq−1)×χ+μ. If αq≤σ2−σ−1, before the robot comes to the mqth PM at Step q, the wafer in it has completed its processing, hence, ωq=0. However, if αq>σ2−σ1, the wafer in it has not been completed yet, and ωq=αq−[(mq−1)×χ+μ]. Such a result can be expressed as:
By 3.1 and 3.2 the wait time units are determined. Specifically, the first assumption is that ωq=αq−[(mq−1)×χ+μ]. Then, the value of ωq can be obtained. Next, check whether αq>(mq−1)×χ+μ holds or not with the obtained ωq. If not, reset ωq=0, or otherwise the obtained value is true. Then, similar to Lemma 3.1, the optimal scheduling strategy for Case 3.2 can be determined as follows. Let αk=max{αj, j∈n\{q}}. If (μ+ωq)+αk≤2μ, (A0A1A2A3 . . . An) is the optimal one-wafer scheduling strategy. If (μ+ωq)+αk≥2μ, there is an optimal basic one-wafer cycle in which q∈ΛP. Then, by following a known polynomial algorithm, an optimal scheduling strategy for the whole system can be determined. In one example the polynomial algorithm can be one as developed in Dawande et al 2002.
The above disclosure of the model and scheduling strategy development disclosure has worked on the assumption without a semiconductor product residency parameter (i.e. a wafer residency time). From the above analysis, for Cases 2 and 3.1, all the steps with parallel processing modules 111-115, belong to ΛP. For Case 3.2, if (μ+ωq)+αk≥2μ, we still have q∈ΛP. However, if (μ+ωq)+αk≤2μ, to check the feasibility, we only need to check whether σ2−σ1≤αq+δq holds or not. If yes, (A0A1A2A3 . . . An) is an optimal and feasible schedule, otherwise the wafer in Step q violates the semiconductor product residency parameter i.e. a wafer residency time constraint. In the following discussion, we assume that an optimal scheduling strategy is determined and for feasibility, Cases 1, 2 and 3.1 are analyzed, and the situation where (μ+ωq)+αk≥2μ for Case 3.2. For all cases, steps with parallel processing modules belong to ΛP.
Below is a discussion of the timeliness analysis that is performed of the system to develop a schedule. The timeliness analysis may be pre-performed and the result of the timeliness analysis may be stored in the memory unit 304. Alternatively the processor 302 may be configured to conduct the timeliness analysis in real time as part of determining the optimal scheduling strategy.
Given a scheduling strategy η=(Ai
IA(PSi) and IA(R) are used to denote the index sets of activities in the wafer processing cycle at processing Step i and robot cycle, respectively, i.e., IA(PSi)={i, j1, j2, . . . jm, i−1} and IA(R)={i0, i1, i2, . . . in}. |IA(PSi)| and |IA(R)| denote the cardinality of IA(PSi) and IA(R). Furthermore, for i∈Ωn, let ωi=ω*i+αi if i∈ΛR, and ωi=ω*i if i∈ΛP.
The time taken for a wafer at Step i is analyzed. To satisfy the wafer residency time constraint at Step i, τi∈[αi, αi+δi], i∈n, must hold. When τi=αi, the allowed shortest wafer processing cycle time at Step i is reached and we use θiS to denote it; while τi=αi+δi, the allowed longest time to complete a wafer at Step i is reached and we use θiL to denote it. We first discuss how to calculate θiS.
If |IA(PSi)|=2, we have IA(PSi)={i, i−1}, i∈Nn, or IA(PS0)={0, n}. In this case, to complete a wafer at Step i, i∈Nn, task sequence (firing ti (λ time units)→processing a wafer at Step i (αi)→firing ui (λ)→xi+1 (μ)→ti+1 (λ)→yi−1(μ)→waiting in qi−1 (ω*i−1)→ui−1(λ)→xi(μ)→firing ti again> is performed, which takes αi+4λ+3μ+ω*i−1 time units. Consider that there are mi parallel PMs at Step i and all the steps with parallel PMs belong to ΛP, we have θiS=(αi+4λ+3μ+ω*i−1)/mi, i∈Nn. Similarly, we have θ0S=(α0+4λ+3μ+ω*n)/m0, where m0=1 is set, since the loadlocks has no wafer processing function and there is no wafer residency time constraint. Thereafter, we always set m0=1. m is the number of parallel processing modules.
If |IA(PSi)|=3, we have IA(PSi)={i, m, i−1}, i∈Nn, or IA(PS0)={0, m, n}. For that case of IA(PSi)={i, m, i−1}, if m∈ΛR and (i−1)∈ΛP, let 1 denote the time instant when Ai, has just been performed, i.e., ti+1. (or tm) finishes its firing at
1. As m∈ΛR, ym takes no time and the robot waits for (αm+ω*m) time units at pm. Then, the robot unloads a wafer there by firing um, moves to Step m+1 and loads the wafer into the step by firing xm+1 and tm+i. Let
2 denote the time instant when tm+1 finishes its firing. Then, we have
2−
1=2λ+μ+(αm+ω*m). By starting from
2, activity sequence <firing yi−1 (μ) (since (i−1)∈ΛP)→waiting in qi−1 (ω*i−1)→ui−1(λ)→(μ)→ti (λ)→processing a wafer at Step i (αi)→ui(λ)→xi+1(μ)→ti+1(λ)> is performed such that a wafer processing cycle at PSi is completed. Let
3 denote the time instant when ti+1 finishes its firing again. Then,
3−
2=αi+4λ+3μ+ω*i−1. Thus, we have θiS=(
3−
1)/mi=(αi+4λ+3μ+ω*i−1+2λ+μ+αm+ω*m)/mi.
If m∈ΛP and (i−1)∈ΛR. Let 1 and
2 denote the time instant when ti+1 and tm+1 finish their firing. As m∈ΛP, ym takes μ time units and we have
2−
1=2λ+2μ+ω*m. Let
3 denote the time instant when ti+1 finish its firing again. As yi−1 takes no time for this case, from the above analysis, we have
3−
2=αi+4λ+2μ+αi−1+ω*i−1. Thus, we have θiS=(
3−
1)/mi=(αi+4λ+2μ+αi−1+ω*i−1+2λ+2μ+ω*m)/mi.
By the above analysis, if one basic activity Am is added, θiS increases (2λ+2μ+ωm)/mi time units, where ωi=ω*i+αi if i∈ΛR, and ωi=ω*i if i∈ΛP. Meanwhile, in IA(PSi)\{i}, if the number of indexes that belong to ΛR increases by one, θiS decreases μ/mi time units. Hence, we can calculate θiS for the cases of |IA(PSi)|∈{4, 5, 6, . . . , n+1}. To ease the presentation, let Q(PSi)={IA(PSi)\{i}}∩ΛR} and R(PSi)={IA(PSi)\{i}}∩ΛP}, and |Q(PSi)| and |R(PSi)| denote their cardinalities. Then, we have the allowed shortest cycle time at Step i is
θiS=(αi+4λ+3μ+2×(|IA(PSi)|−2)×(λ+μ)+(Σm∈Q(PS
The longest wafer processing cycle time is
θiL=(αi+δi+4λ+3μ+2×(|IA(PSi)|−2)×(λ+μ)+(Σm∈Q(PS
Expressions (3.3)-(3.4) present the feasible cycle time range or workload range for Step i, i∈n. By removing Σm∈Q(PS
ξiS=(αi+4λ=3μ+2×(|IA(PSi)|−2)×(λ+μ)+Σm∈Q(PS
ξiL=(αi+δi+4λ+3μ+2×(|IA(PSi)|−2)×(λ+μ)+Σm∈Q(PS
Natural workload plays an important role in schedulability analysis, since it provides the workload balance information among the processing steps of the processing cycle. To explain further mathematically let θi=(τi+4λ+3μ+2×(|IA(PSi)|−2)×(λ+μ)+Σm∈{IA(PS
The above expression shows that, by adjusting the robot waiting time, the system is scheduled to balance the workloads among the steps (i.e. processing steps) to some extent to make the wafer residency time constraint (i.e. semiconductor product residency parameter) is satisfied. The controller 300 may be configured to determine a robot cycle time that balances the workload by performing the steps disclosed herein. The mathematical expressions may be programmed as a computer executable method.
It is desirable to calculate the time to process at each processing module, τi that is dependent on the robot cycle time ψ. Determining robot cycle time is explained below. There must be at least one i∈ΛR. Let ψ* be the robot cycle time under the assumption that ω*m=0, m∈Ωn. Therefore ψ* is equal to ξiS, i∈ΛR, or alternatively;
ψ*=(αi+4λ+3μ+2×(|IA(PSi)|−2)×(λ+μ)−|Q(PSi)|×μ+Σm∈Q(PS
Let Π=max{ξ0s, ξ1S, ξ2S, . . . , ξnS, ψ*}. Then, Π must be the lower bound of cycle time for a transport-bound single-arm cluster tool. Since ψ*=ξiS, i∈ΛR, Π=max{ξ0S, ξ1S, ξ2S, . . . , ξnS} must hold. Using cycle time Π (i.e. a processing cycle time), any feasible schedule that is determined is an optimal schedule. The schedule can be determined by the controller 300 and the schedule is used to control the robot arm 130. Π denotes the cycle time of the system i.e. the time to complete a processing cycle.
With θi, i∈Ωn, being the cycle time of Step i, in the steady state, each step has the same cycle time that should be equal to the robot cycle time and the system cycle time. This is defined in the expression below.
Π=θ0=θ1= . . . =θn=ψ. (3.8)
Based upon (3.8), the robot cycle time can be determined as
ψ=Π=θi=(τi+4λ+3μ+2×(|IA(PSi)|−2)×(λ+μ)+Σm∈{IA(PS
By (3.9), in the steady-state, the wafer sojourn time τi in pi, i∈n, is
τi=mi×Π−[4λ+3μ+2×(|IA(PSi)|−2)×(λ+μ)+Σm∈{IA(PS
With (3.10), once ωi, i∈Ωn, is determined, τi, i∈n, can be calculated. Expression 3.8 is an important conclusion which indicates that the system cycle time (i.e. processing cycle time) should be equal to the robot cycle time results in an optimal schedule.
It follows that from expression 3.8, that to schedule the cluster tool apparatus 100 is to allocate the robot 130 waiting time such that the semiconductor residency parameter (wafer residency time) is satisfied. Three algorithms can be used by the processor 302 to set robot waiting times and generate a schedule to control the operation of the robot arm 130. The three algorithms are in the form of three programs (with one program and two linear programs) that can be solved to determine robot waiting times and obtain a schedule. In particular the algorithms (referred to as linear programs herein) are stored on the memory unit 304, and executed by the processor 302. The linear programs are stored as computer readable and executable instructions that are configured to be executed by the processor 302.
The algorithms are based on the proposition that the cluster tool apparatus, with a semiconductor residency parameter (i.e. a wafer residency time), is schedulable with an optimal scheduling strategy, if the robot cycle time ψ equals the system cycle time Π (as in Expression 3.8 holds true), and the schedule is feasible if whenever ui (the time for a robot arm 130 to drop a wafer into a processing module) is enabled, the wafer processing time (i.e. wafer soujourn time) is greater than or equal to a minimum value αi or less than or equal to the minimum value plus the longest time to remove the wafer αi+δi.. This relationship is explained as αi≤τi≤αi+δi.
One of the three programs, including a first algorithm or program 600, or linear programs, 700, 800 (which can exist as programmed methods or algorithms as stored in memory of a computing device) is selected to determine a schedule to control the cluster tool apparatus 100, 200. The program is selected based on the relationship between the processing cycle time and the robot cycle time.
The first algorithm 600 is shown in n. The first algorithm can be solved by the processor 302 utilizing the commercial solver 303 to determine a one wafer cyclic schedule by setting the robot waiting time. The first linear program can be solved due to its limited size.
The second program 700 (i.e. second algorithm), which is a linear program, is shown in
The third program 800 (a linear program), which is also a linear program, is shown in
Solving the programs is advantageous because the schedule generated by solving on the three programs results in an optimal schedule. This is because Π is the lower bound of the cycle time for the cluster tool apparatus without a wafer residency time (i.e. a semiconductor product residency time). Any decrease in Π will result in a non-feasible schedule for a processing cycle. Therefore the obtained schedule is an optimal schedule in the sense of cycle time.
Each program is implemented by the controller 300, and solved by the controller 300 based on a cluster tool apparatus 100, 200 with given activity times as shown in Table 500 of
At step 902 the controller 300 determines a scheduling strategy for the cluster tool apparatus 100. The scheduling strategy can be selected based on a mathematical model of the cluster tool apparatus 100 processing cycle and the received system parameters. Preferably the scheduling strategy is stored in the memory unit 304 and accessed by the processor 302.
At step 903 a processing cycle time is determined by the controller based on the system parameters and a mathematical model of the system. A robot cycle time is determined at 904 based on the system parameters and a mathematical model of the system. The processor 302 is configured to determine the processing cycle time and the robot cycle time. At step 905 the controller 300 is configured to determine a relationship between the processing cycle time and the robot cycle time. The scheduling strategy is also used at step 903 and step 904 to determine the processing cycle time and robot cycle time.
At step 906 the controller 300 is configured to select a program from a plurality of algorithms or linear programs that are stored in the memory unit 304. The memory unit 304 stored the three programs (algorithms or linear programs) 600, 700 and 800. The program is selected based on the relationship between the processing cycle time and the robot cycle time. The first, second or third program is selected based on one of the relationships described earlier. The processor 302 may alternatively calculate or determine the programs 600, 700, 800 based on the system parameters and a mathematical model of the cluster tool apparatus.
At step 907 a schedule is determined for performing the processing cycle utilizing the one or more processing modules 111-115. The schedule is determined by solving the selected program 600, 700, 800. The schedule is determined based on a semiconductor product residency time (i.e. a wafer residency time). At step 908 the schedule outputs a robot waiting time that minimizes the processing cycle time while maintaining the semiconductor product residency parameter (i.e. maintaining the wafer residency time). At step 909 the controller 300 is configured to control the operation of the robot 130, 230 based on the determined schedule.
The controller 300 and specifically the processor 302 is configured to execute the method steps of method 900 of controlling a cluster tool apparatus. The processor 302 is further configured to control the operation of the robot based on the determined method and determined schedule. The method 900 outputs robot waiting times as part of the schedule and the processor 302 is configured to control the operation of the robot arm 130, via the robot interface 306, based on the robot waiting times that are determined.
Below are examples of implementation of the method of controlling the cluster tool apparatus. The examples are practical examples of the method showing how a schedule and robot waiting times are determined based on selecting and solving an appropriate linear program.
There are three Steps 1, 2, and 3 with the number of processing modules for the steps being 1, 2, 1, respectively. In this example it takes 50, 116, and 6 time units for a processing module at Steps 1, 2, and 3 to process a wafer, respectively. It takes a further 3 time units for the robot to unload/load a wafer from/into a processing module or loadlock. It takes 10 time units for the robot to move between processing modules, or between the processing module and loadlocks. After being processed, a wafer can remain at Steps 1, 2, and 3 for at most 20 time units. In other words, we have α1=50, α2=116, α3=6, λ=3, μ=10, and δ1=δ2=δ3=20. The system is modelled as a transport-bound cluster tool apparatus. The optimal scheduling strategy is determined as (A0A2A3A1).
The shortest natural workload for each step, as per expression 3.5 earlier, is determined to be ξ0S=α3+6λ+4μ=6+18+40=64, ξ1S=α1+4λ+3μ=50+12+30=92, ξ2S=(α2+α3+6λ+4μ)/2=(116+6+18+40)/2=90, and ξ3S=α3+8λ+7μ=6+24+70=100. This is also equal to the robot cycle time ψ*. Hence the system cycle time is defined as Π=max{ξ0S, ξ1S, ξ2S, ξ3S, ψ*}=100. The shortest natural workload is based on the mathematical model of the cluster tool apparatus.
The longest natural workload is determined using the expression 3.6, which is based on the mathematical model. The longest natural workload for each processing step, in this example case is ξ1L=ξ1S+20=112, ξ2L=ξ2S+20/2=100, and ξ3l=ξ3S+20=120. Thus, this results in ψ*=Π=100≤ξiL, i∈3, which relates to the use of the first program. Based on the first program 600, the robot waiting times for each processing step are determined to be ω0=ω*0=0, ω1=ω*1=0, ω2=ω*2=0, and ω3=ω*3+α3=6. The controller 300 is configured to operate the robot based on the robot times determined by solving the first program.
In this example all the system parameters are maintained the same as example 1, except the wafer (i.e. semiconductor product) processing time at the second processing step is set at 140 time units, i.e. α2=140. In this example, the optimal scheduling strategy is still determined as (A0A2A3A1). With this scheduling strategy, a robot cycle time and processing cycle time are determined using the mathematical model of the cluster tool apparatus. Specifically the robot cycle time and the processing cycle time are determined based on the shortest natural workload at each processing step. This is defined as ξ0S=α3+6λ+4μ=64, ξ1S=α1+4λ+3μ=92, ξ2S=(α2+α3+6λ+4μ)/2=(140+6+18+40)/2=102, ξ3S=α3+8λ+7μ. 100=ψ*, and Π=max{ξ0S, ξ1S, ξ2S, ξ3S, ψ*}=102. A longest natural workload is determined using expression 3.6. The longest workload for each processing step is determined, based on the mathematical model. The longest workload is defined, in this example, as ξiL=ξ1S+20=112, ξ2L=ξ2S+20/2=112, and ξ3l=ξ3S+20=120. Hence, ψ*=100<Π=102≤ξiL, i∈N3 which relates to selecting and solving the second linear program 700. Solving the second linear program results in the following robot waiting times ω0=ω*0=0, ω1=ω*1=0, ω2=ω*2=2, and ω3=ω*3+α3=6. The controller controls the robot based on the determined robot waiting times that are determined by solving the second linear program.
In an alternative embodiment the user interface 140 may be remote from the cluster tool apparatus 100 and configured to communicate with the controller 300 of the cluster tool apparatus 100. The user interface 140 alternatively may be a key pad, a tablet, a smartphone or a laptop or another suitable mobile device that can wirelessly communicate with the controller 300 of the cluster tool apparatus 100. The remote user interface may include a suitable software program such as an application that allows a user to interface with the cluster tool apparatus and cluster tool apparatus controller 300.
It should be noted that in this disclosure the cluster tool may be referred to as a cluster tool apparatus or cluster tool system. The term apparatus and system are used interchangeably when describing the cluster tool and its operations.
It will be appreciated by persons skilled in the art that numerous variations and/or modifications may be made to the described cluster tool apparatus and method of controlling the cluster tool apparatus as shown in the specific embodiments without departing from the spirit or scope of the present disclosure. The present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive.
The term “comprising” (and its grammatical variations) as used herein are used in the inclusive sense of “having” or “including” and not in the sense of “consisting only of”
It is to be understood that, if any prior art information is referred to herein, such reference does not constitute an admission that the information forms a part of the common general knowledge in the art, in Australia or any other country.
Although not required, the embodiments described with reference to the figures may be implemented as an Application Programming Interface (API) or as a series of libraries for use by a developer or can be included within another software application, such as a terminal or personal computer operating system or a portable computing device operating system. Generally, as program modules include routines, programs, objects, components and data files assisting in the performance of particular functions, the skilled person will understand that the functionality of the software application may be distributed across a number of routines, objects or components to achieve the same functionality desired herein.
It will also be appreciated that where the methods and systems of the present disclosure are either wholly implemented by computing system or partly implemented by computing systems then any appropriate computing system architecture may be utilised. This will include stand alone computers, network computers and dedicated hardware devices. Where the terms “computing system” and “computing device” are used, these terms are intended to cover any appropriate arrangement of computer hardware capable of implementing the function described.
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| Number | Date | Country | |
|---|---|---|---|
| 20180076064 A1 | Mar 2018 | US |
