IBM Technical Disclosure Bulletin, vol. 18, No. 11, Apr. 1976, pp. 3711-3712, N.Y., US; T. J. Blazejewski et al.: "Secondary path requiring only one additional connection". |
IBM Technical Disclosure Bulletin, vol. 30, No. 3, Aug. 1987, pp. 1327-1330, Armonk, N.Y., US; "Reading L2 and gated B clock shift register latches using a bring-up tool to scan out the values while perserving machine state". |
Proceedings International Test Conference 1984, 1984, pp. 338-347, IEEE, N.Y., US; H. H. Butt et al.: "Impact of mixed-mode self-test on life cycle cost of VLSI based designs". |