Core testing machine

Information

  • Patent Grant
  • 10578670
  • Patent Number
    10,578,670
  • Date Filed
    Monday, October 2, 2017
    7 years ago
  • Date Issued
    Tuesday, March 3, 2020
    5 years ago
Abstract
A testing system includes a slot configured to receive a device-under-test (DUT), and a core testing processor configured to communicate with a user interface and with the slot, wherein the core testing processor is associated with communication that is independent of any other communications transmitted within the system, and wherein the core testing processor executes a set of tests associated with the DUT.
Description
TECHNICAL FIELD

The present invention is directed to a system for testing devices.





BRIEF DESCRIPTION OF THE DRAWINGS


FIG. 1 a high-level flow chart that illustrates some steps performed by a core testing executor/processor for testing devices, according to certain embodiments.



FIG. 2 is a high-level schematic that illustrates DUT probes through the use of virtualization containers, according to certain embodiments.





DETAILED DESCRIPTION

Methods, systems, user interfaces, and other aspects of the invention are described. Reference will be made to certain embodiments of the invention, examples of which are illustrated in the accompanying drawings. While the invention will be described in conjunction with the embodiments, it will be understood that it is not intended to limit the invention to these particular embodiments alone. On the contrary, the invention is intended to cover alternatives, modifications and equivalents that are within the spirit and scope of the invention. The specification and drawings are, accordingly, to be regarded in an illustrative rather than a restrictive sense.


Moreover, in the following description, numerous specific details are set forth to provide a thorough understanding of the present invention. However, it will be apparent to one of ordinary skill in the art that the invention may be practiced without these particular details. In other instances, methods, procedures, components, and networks that are well known to those of ordinary skill in the art are not described in detail to avoid obscuring aspects of the present invention.


According to certain embodiments, a core testing machine comprises multiple slots for installing a DUT in each slot. As a non-limiting example, each DUT in a respective slot is associated with its respective lightweight virtualization containers (probes abstraction) and core testing executor/processor. For example, the core testing machine may comprise N core testing servers and each of the N core testing servers may be associated with M core testing executors/processors. According to certain embodiments, the core testing machine need not have every slot installed with a DUT in order to begin running the tests. The slots are used as needed. Further, the testing of a given DUT can start and finish independently of the other DUTs installed in the test bench of the core testing machine.


Non-limiting examples of devices under test (DUTs) include set top boxes, cable modems, embedded multimedia terminal adapters, and wireless routers including broadband wireless routers for the home or for commercial networks.


According to certain embodiments, FIG. 1 a high-level flow chart that illustrates some steps performed by a core testing executor/processor for testing devices, according to certain embodiments. According to certain embodiments, the core testing executor/processor is associated with a server. According to certain other embodiments, the core testing executor is special processor. At block 100, a user installs one or more devices to be tested into test bench of the core testing machine for testing the devices. According to certain embodiments, at block 102, the user scans the barcode (or other identification) of each device to be tested. A device that is to be tested using the core testing executor/processor is also referred to as “DUT” herein. Each DUT is then submitted for testing at block 104. For purposes of convenience, FIG. 1 will be described with respect to a single DUT even though the core testing machine is capable of testing multiple DUTs simultaneously. For a given DUT, the respective core testing executor/processor receives a corresponding serial number information and validates the corresponding DUT at block 106. At block 108, the core testing executor/processor retrieves device information such as make, model, customer, etc. of a given DUT based on the serial number information from a database or web service, for example. At block 110, the core testing executor/processor loads the specific test configuration information corresponding to the given DUT. Each DUT type (based on make, model, etc) may be associated with different test configuration information. Each test configuration information includes a set of testing steps. At block 112, the core testing executor/processor begins to read a testing step of the test configuration information for a given DUT. At block 114, the core testing executor/processor executes the test step that was read at block 112. At block 116, the core testing executor/processor records the result of the executed test step. At block 118, the core testing executor/processor determines whether the DUT passed or failed the executed test step. If the DUT failed the executed test step at block 118, then the core testing executor/processor determines whether to abort the testing procedure (based on the test configuration) at block 120. If the core testing executor/processor determines to abort the testing procedure at block 120, then the DUT is deemed to have failed the test step at block 122. If the core testing executor/processor determines not to abort the testing procedure at block 120, or if the DUT passed the executed test step at block 118, then control passes to block 124 where the core testing executor/processor determines whether there is another test step to be executed from the set of testing steps for the given DUT. If it is determined that there is another test step to be executed, then control passes back to block 112. If it is determined that there are no more test steps in the set of test steps to be executed for the given DUT, then the DUT is deemed to have passed the test procedure, according to certain embodiments of the invention. Upon completion of each test step for a given DUT, a message of the completion and/or the results of the test step is sent to the user's browser via web-sockets in real-time, for example. Thus, the user interface can show test progress in addition to testing information such as port numbers, IP address for each DUT slot, DUT serial number, and testing preferences related to billing and pushing to the cloud, etc. The use can also provide input associated with a given test (e.g., password). The user (via user interface) can communicate with the core testing executor/processor using asynchronous feedback and interaction. As a non-limiting example, communication may be in the form of JSON messages using TCP/IP protocol, according to certain embodiments. JSON is Java script object notation for transmitting data between the server and web applications.


According to certain embodiments, the core testing machine can test a set of similar types of devices or disparate types of devices simultaneously using a separate set of interfaces for each device that is under test testing. As a non-limiting example, there may be N core testing servers. Each N core testing server may comprise M number of core testing executors/processors. Thus, a total of N multiplied by M number of DUTS can be tested simultaneously (one DUT is each of the N×M slots, for example). According to certain embodiments, the use of DUT testing interfaces (probes) through virtualization containers can avoid network conflicts while testing multiple DUTs simultaneously by the core testing machine. According to certain embodiments, the core testing servers and core testing executors/processors (and other components) in the testing system may be distributed over a plurality of computers.



FIG. 2 is a high-level schematic that illustrates DUT probes through the use of software containers (virtualization containers), according to certain embodiments. FIG. 2 shows core test executor/processor 202, slot 204, and DUTs 206 and 208. There may be more than two DUTs but only two of them are shown in FIG. 2 for convenience. Slot 204 includes as non-limiting examples, Ethernet wide area network (WAN) probes 210a, 216a, Ethernet local area network (LAN) probes 212a, 218a and a multimedia over coax alliance (MoCA) probes 214a, 220a (MoCA probes can be WAN or LAN, for example). Depending on the nature of the DUT and the DUT's corresponding test configuration, there may also be wireless probes via antenna (Wifi probes, for example). Slot 204 are connected to the interfaces of DUT 206 and DUT 208 respectively. For example, WAN probe 210a is connected to WAN port 210b of DUT 206. LAN probe 212a is connected to LAN port 212b of DUT 206. MoCA probe 214a is connected to MoCA port 214b of DUT 206. Similarly, WAN probe 216a is connected to WAN port 216b of DUT 208. LAN probe 218a is connected to LAN port 218b of DUT 208. MoCA probe 220a is connected to MoCA port 220b of DUT 208.


Probes test the following interfaces on the DUT (when such interfaces are available on the DUT):

    • Ethernet Local Area Network (LAN): assigned probe runs Ethernet-based connection and speed tests
    • Ethernet Wide Area Network (WAN): assigned probe runs Ethernet-based connection and speed tests
    • Multimedia over Coax Alliance (MoCA) LAN: assigned probe sets up MoCA connection, establishes connection, and runs MoCA-related connection and speed tests
    • MoCA WAN: assigned probe sets up MoCA connection, establishes connection, and runs MoCA-related connection and speed tests
    • Wireless 2.4 GHz: assigned probe sets up wireless connection, establishes connection, and runs WiFi-related connection tests on 2.4 GHz frequency
    • Wireless 5.0 GHz: assigned probe sets up wireless connection, establishes connection, and runs WiFi-related connection tests on 5.0 GHz frequency
    • Phone ports (FXS): assigned probe sets up phone service simulation, establishes connection, and runs phone-based connection tests
    • USB: assigned probe runs USB-functionality tests
    • Video: assigned probe runs video-related tests
    • Audio: assigned probe runs audio-related tests


According to certain embodiments, when executing a specific test for a given DUT, the core testing executor/processor loads and reads test configuration information (for example from an XML structure) and identifies the relevant test script that needs to be executed. Inputs that are needed for executing the relevant test script are retrieved and supplied as inputs to the relevant test script. The following is a non-limiting sample scripts.

  • Create DUT object & Environment Object
  • Verify Serial Number
  • Verify Warranty
  • Check Report Server
  • Check DUT Staging


Checks for DUT Serial number in Database or Webservice

  • Get DUT Readiness Information


Checks Webservice for test readiness status of DUT in the test process

  • Configure container Environment
  • Clear Environment Temp Files
  • Analyze DUT for Factory Reset


Checks ability to login to DUT


Asks operator to manually Factory Reset if unable to login


Confirm Factory Reset (if needed)


Waits for operator to confirm that DUT was factory reset and booted up properly


Check Ethernet LAN connections to DUT


Ping connections: Eth LAN 1, 2, 3, 4


Fails if any ping to these connections fail


Detect DUT


Checks connection to DUT through socket connection


Reset Password


Operator scans password which is stored temporarily for use in the remainder of test until finished


Login to GUI


Done through web-scraping


Get DUT Information and compare values


Information retrieved through web-scraping


Enable Telnet


Enables telnet on DUT through web-scraping


Factory Reset


Factory resets DUT through telnet command


Enable Telnet after Factory Reset


Enables telnet on DUT through web-scraping

  • Confirm Power, WAN Ethernet, and Internet LEDs
  • Confirm all LAN Ethernet LEDs
  • Confirm WiFi LED
  • Configure Wireless Network


Through telnet commands


Sets N Mode


Enables Privacy


Sets WPA (Wi-Fi Protected Access)


Removes WEP (Wired Equivalent Privacy)


Assigns WiFi Channel to DUT (channel different by slot)


[Channel 1: slots 1, 4, 7, 10, 13, 16]


[Channel 6: slots 2, 5, 8, 11, 14]


[Channel 11: slots 3, 6, 9, 12, 15]


Verifies changes through GUI


Disables WiFi once done through telnet


Check Firmware Version and Upgrade Firmware (if needed)


Firmware version: 40.21.18


Cage Closed Confirmation Check


Asks Operator to Close Door on Cage


Connect Wireless Card


Waits on shared Resource Server (located on TC) for Resource L2 (Layer 2) Lock

    • Lock waiting timeout: 600 sec
    • All L2 Locks are able to run in parallel but not when any L3 (Layer 3) Lock is running


Obtains Lock


Enables WiFi through telnet


Set WiFi Card

    • Total Retries allowed: 6 (2 sets of 3 retries)


Ping WiFi from DUT


L2 ARP Test on WiFi: must receive 10/10 ARP packets

    • Total Retries allowed: 6 (2 sets of 3 retries)


If either Set WiFi Card or L2 ARP Test Fail after its 3 retries, Ask Operator to Check Antennas


Performs one more retry in full (set of 3 retries each for Set WiFi Card and L2 ARP Wifi Test) after Check Antennas


Disables WiFi through telnet


Releases Lock


Wireless to LAN Ethernet Speed Test


Waits on shared Resource Server (located on TC) for Resource L3 Lock

    • Lock waiting timeout: 1800 sec
    • L3 Locks must be run one at a time and when no L2 Lock is running


Obtains Lock


Enables WiFi through telnet


Connects WiFi Card


Iperf3 Speed Test, 5 seconds for UDP Speed Test, 7 seconds for TCP Speed Test, Sending 200 Mbps Bandwidth


Bandwidth must be greater than 60 Mbps on TCP (Reverse) or 70 Mbps on UDP (Forward)

    • If Fail after 2 retries, ask operator to Check Antennas
    • Retries up to 2 times more if still Fail
    • Therefore, Total Retries allowed: 4 (2 sets of 2 retries)


Runs sudo iwlist wlan0 scan and returns all Wireless Signals seen

    • Results parsed to print all visible SSIDs and its matching Signal level


Disables WiFi through telnet


Releases Lock

  • Confirm WPS LED
  • Confirm LAN Coax LED
  • Confirm USB 1+2 LEDs
  • Configure WAN MoCA
  • Confirm WAN Coax LED
  • Ping WAN MoCA
  • L2 Test on LAN Ethernet


Arp Test from Eth LAN 1 to Eth LAN 2, 3, 4


Must receive 10/10 on all LAN connections


LAN Ethernet to LAN Ethernet Speed Test


From Eth LAN 1 to Eth LAN 2, 3, 4


Iperf3 Speed Test, 5 seconds Reverse and Forward, Sending 1200 Mbps Bandwidth


Bandwidth must be greater than 700 Mbps


Total Retries allowed: 2


Check WAN and LAN MoCA Data Rates


Rx and Tx Data rates for both WAN and LAN MoCA retrieved through telnet


All Rates must be greater than 180 Mbps


LAN Ethernet to WAN MoCA FTP Speed Test


From Eth LAN 1 to WAN MoCA


Iperf3 Speed Test, 5 seconds Reverse and Forward, Sending 1200 Mbps Bandwidth


Bandwidth must be greater than 60 Mbps


Total Retries allowed: 2


LAN MoCA to LAN Ethernet FTP Speed Test


From Eth LAN 1 to LAN MoCA


Iperf3 Speed Test, 5 seconds Reverse and Forward, Sending 240 Mbps Bandwidth


Bandwidth must be greater than 60 Mbps


Total Retries allowed: 2


LAN MoCA to WAN MoCA FTP Speed Test


From LAN MoCA to WAN MoCA


Iperf3 Speed Test, 5 seconds Reverse and Forward, Sending 240 Mbps Bandwidth


Bandwidth must be greater than 60 Mbps


Total Retries allowed: 2


Enable WAN Ethernet


Through telnet command


LAN Ethernet to WAN Ethernet FTP Speed Test


From Eth LAN 1 to Eth WAN


Iperf3 Speed Test, 5 seconds Reverse and Forward, Sending 1200 Mbps Bandwidth


Bandwidth must be greater than 700 Mbps


Total Retries allowed: 2

  • Clear Persistent Logs
  • Final Factory Restore


According to certain embodiments, the core testing executor/processor uses a reflection and command design pattern to invoke the relevant configured script(s) corresponding to each DUT being tested. For example, in the command design pattern one or more of the following are encapsulated in an object: an object, method name, arguments. According to certain embodiments, the core testing executor/processor uses the Python “reflection” capability to execute the relevant test scripts for a given DUT. The core testing executor/processor is agnostic of the inner workings of the relevant test scripts for a given DUT.


According to certain embodiments, lightweight software containers are used to abstract the connection of probes to the different DUT interfaces in order to avoid conflicts. Non-limiting examples of virtualization containers are Linux containers. As a non-limiting example, Linux container is an operating-system-level virtualization environment for running multiple isolated Linux systems (containers) on a single Linux control host. In other words, lightweight software containers are used to ensure isolation across servers. By using containers, resources can be isolated, services restricted, and processes provisioned to have an almost completely private view of the operating system with their own process ID space, file system structure, and network interfaces. Multiple containers share the same kernel, but each container can be constrained to only use a defined amount of resources such as CPU, memory, network resources and I/O. The relevant test script might need to connect to the DUT interfaces directly or through the virtualization containers to execute the tests. The core testing executor/processor receives the test results from running the relevant test scripts. The core testing executor/processor can further process and interpret such results and can also send the results to the user's browser via web sockets. According to certain embodiments, the respective core testing executors/processors are in communication (e.g., Telnet/SSH) with the virtualization containers (there may be multiple virtualization containers). The containers/probes are in communication with corresponding DUT interfaces using Telnet/SSH/TCP/UDP/HTTP/HTTPS etc, as non-limiting examples.


According to certain embodiments, a system for testing device comprises: a testing machine with a plurality of slots, wherein each slot of the plurality of slots is for installing a device-under-test (DUT) of a plurality of DUTs; a plurality of core testing processors, wherein each core testing processor of the plurality of core testing processors is associated with a respective slot of the plurality of slots; a plurality of lightweight virtualization containers, where a respective lightweight virtualization container of the plurality of lightweight virtualization containers is associated with one of the slots that might have DUT installed, wherein the plurality of lightweight virtualization containers enable isolation of respective testing processes and testing resources associated with each respective device-under-test.


According to certain embodiments, the plurality of lightweight virtualization containers comprise testing probes for testing a respective DUT of the plurality of DUTs. Virtualization containers can also be referred to as probes herein.


According to certain embodiments, the plurality of lightweight virtualization containers are used for testing one or more DUT interfaces at the DUT comprising: Ethernet Local Area Network (LAN) interface; Ethernet Wide Area Network (WAN) interface; Multimedia over Coax Alliance (MoCA) LAN interface; Multimedia over Coax Alliance (MoCA) WAN interface; Wireless 2.4 GHz interface; Wireless 5.0 GHz interface; Phone ports (FXS) interface; USB interface; video interface; and audio interface


According to certain embodiments, each core testing processor of at least a subset of the plurality of core testing processors is associated with a respective web socket for communication that is isolated and independent of communication associated with other core testing processors of the plurality of core testing processors.


According to certain embodiments, a respective core testing processor of the plurality of core testing processors communicates with a user interface.


According to certain embodiments, a respective core testing processor of the plurality of core testing processors communicates using asynchronous feedback and interaction.


According to certain embodiments, a respective core testing processor of the plurality of core testing processors communicates using JSON messages.


According to certain embodiments, the respective core testing processor of the plurality of core testing processors communicates using TCP/IP protocol.


According to certain embodiments, the respective core testing processor of the plurality of core testing processors: retrieves at run time a respective test configuration corresponding to the DUT installed in the respective slot associated with respective core testing processor; loads the set of tests associated with the DUT installed in the respective slot associated with respective core testing processor; and executes the loaded set of tests.


In the foregoing specification, embodiments of the invention have been described with reference to numerous specific details that may vary from implementation to implementation. The specification and drawings are, accordingly, to be regarded in an illustrative rather than a restrictive sense.

Claims
  • 1. A core testing processor configured to receive serial number information for a plurality of devices under test (DUTs);retrieve, from a source selected from a database and a web service, type information comprising a make or model of each DUT, retrieval of the type information based upon the serial number information;load test configuration information specific to each type of DUT;read a test step of the test configuration information loaded for each DUT;execute the test step read for each DUT;determine whether each DUT passed or failed the executed test step;responsive to a determination that a DUT passed the executed test step, determine whether, for each DUT that passed the executed test step, the loaded test configuration information contains a next test step to be executed;responsive to a determination that the loaded test configuration contains a next test step to be executed, perform repeated tasks for each DUT for which a next test step exists, the repeated tasks comprising reading the test step, executing the test step read for each DUT, determining whether each DUT passed the executed test step, and determining whether, for each DUT that passed the executed test step, the loaded test configuration information contains a next step to be executed; andresponsive to a determination that the loaded test configuration does not contain a next test step to be executed, terminate the repeating step for each DUT for which a next test step does not exist.
  • 2. The core testing processor of claim 1, further configured to responsive to a determination that a DUT failed the executed test step, determine whether to abort testing for each DUT that failed the executed test step; andresponsive to a determination to not abort testing, perform the repeated tasks until reaching the determination that the loaded test configuration does not contain a next test step to be executed.
  • 3. The core testing processor of claim 2, further configured to, responsive to a determination to abort testing, indicate testing failure for each DUT for which a determination to abort testing has been made.
  • 4. The core testing processor of claim 2, further configured to communicate, upon completion of each test step, results of the completed test step to a user.
  • 5. The core testing processor of claim 4, wherein communicating the results of the completed test step to the user comprises sending a message to a browser of the user via web-sockets.
  • 6. A system for testing devices, comprising: the core testing processor of claim 1; anda slot configured to receive a device-under-test (DUT), the slot communicating with the core testing processor and with a lightweight virtualization container configured for association with an interface of a DUT receivable in the slot, the lightweight virtualization container enabling isolation of testing processes and testing resources associated with the DUT receivable in the slot.
  • 7. The system for testing devises of claim 6, where in the core testing processor is configured to communicate with a user interface and with the slot, wherein the core testing processor is associated with communication that is independent of other communications transmitted within the system.
  • 8. The system for testing devices of claim 7, wherein the core testing processor is associated with a web socket for communication that is independent of other communications transmitted within the system.
CROSS REFERENCE TO RELATED APPLICATIONS

This application is a continuation of U.S. patent application Ser. No. 14/866,720, filed Sep. 25, 2015, now U.S. Pat. No. 9,810,735, and entitled “Core Testing Machine,” the disclosure of which is hereby incorporated by reference herein in its entirety. This application is also related to U.S. patent application Ser. No. 14/866,630, filed Sep. 25, 2015, now U.S. Pat. No. 9,960,989, and entitled “Universal Device Testing System,” and to U.S. patent application Ser. No. 14/866,752, filed Sep. 25, 2015, now U.S. Pat. No. 10,122,611, and entitled “Universal Device Testing Interface,” and to U.S. patent application Ser. No. 14/866,780, filed Sep. 25, 2015, now U.S. Pat. No. 9,491,454 and entitled, “Set Top Boxes Under Test,” each of which is hereby incorporated by reference in its entirety. This application is also related to U.S. patent application Ser. No. 14/948,143, filed Nov. 20, 2015 , now U.S. Pat. No. 9,992,084, and entitled, “Cable Modems/eMTAs Under Test,” and to U.S. patent application Ser. No. 14/948,925, filed Nov. 23, 2015, now U.S. Pat. No. 9,838,295, and entitled, “Wireless Routers Under Test,” and to U.S. patent application Ser. No. 14/929,180, filed Oct. 30, 2015, published on May. 4, 2017 as U.S. Patent Publication No. 2017/0126536, and entitled, “Hardware Architecture for Universal Testing System: Cable Modem Test,” and to U.S. patent application Ser. No. 14/929,220, filed Oct. 30, 2015, published on May 4, 2017 as U.S. Patent Publication No. 2017/0126537, and entitled, “Hardware Architecture for Universal Testing System: Wireless Router Test,” and to U.S. patent application Ser. No. 14/987,538, filed Jan. 4, 2016, now U.S. Pat. No. 9,900,116, and entitled, “Test Sequences Using Universal Testing System.”

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Related Publications (1)
Number Date Country
20180024193 A1 Jan 2018 US
Continuations (1)
Number Date Country
Parent 14866720 Sep 2015 US
Child 15722235 US