1. Field of the Invention
This application relates to methods of cyclical oxidation for integrated circuit components.
2. Description of the Related Art
Semiconductor device fabrication is a complex process. Devices are typically formed on a semiconductor substrate, and often include conductive elements separated by insulating elements. Conductive elements may serve as electrodes and interconnecting conductors, and may be formed from materials such as polysilicon, metal or metallic compounds.
Various transistor devices exist in the modern day fabrication of integrated circuits, including metal-oxide-semiconductor field-effect transistors, or MOSFETs. A MOSFET generally comprises a conductive gate electrode formed over a gate dielectric, which in turn overlies a semiconductor substrate. For reliable MOSFET performance, it is important to maintain the conductivity of the gate electrode stack, which may include silicon or metallic materials, such as tungsten or titanium, to set the transistor work function and strapping layers for high speed lateral signal transmission.
Common transistor devices which may incorporate MOSFETs include memory devices used for data storage. These memory devices may be categorized, in general, as being either volatile or non-volatile. Volatile memory devices include dynamic random access memory devices (DRAM) and static random access memory devices (SRAM), and lose their stored data when power supplies are interrupted. In contrast, non-volatile memory devices include electrically erasable programmable read only memory (EEPROM) devices and flash memory devices, and retain their stored data even when power supplies are interrupted, and are thus commonly used in memory cards and mobile telecommunication systems.
An example of a non-volatile memory device is a floating gate memory a field effect device which allows electric charges to be stored on an isolated conductive material referred to as a “floating gate.” A typical floating gate memory device includes a floating gate, often comprising polysilicon, and a control gate, typically comprising a metal such as titanium or tungsten, above the floating gate in a gate stack. The gate stack may further include a “tunnel” dielectric layer (composed of, for example, silicon oxide) beneath the floating gate, which serves to electrically isolate and control charge injection to the floating gate from a silicon substrate. The floating gate may also be electrically isolated from the control gate by an intergate dielectric layer, such as an oxide-nitride-oxide (ONO) layer.
To achieve a transistor device with desirable characteristics, oxidation must often be performed on certain components in a semiconductor device. For example, an oxidation process is often used to repair damaged areas caused during etching to pattern the gate stack. Such oxidation, however, can undesirably change the properties of the transistor device.
Accordingly, there is a need for oxidation processes that do not significantly alter the properties of the electronic devices that are oxidized.
The present application provides methods for cyclical oxidation of integrated circuit components. In some embodiments, a method of selective oxidation comprises providing a transistor structure having exposed silicon and metal, wherein the transistor structure comprises a patterned gate stack having a gate electrode and a dielectric layer. A pulse of an oxidizing agent is introduced to the transistor structure, such that the silicon is oxidized relative to the metal. The oxidizing agent is then purged. The steps of introducing a pulse of an oxidizing agent and purging are repeated.
In some embodiments, a method of performing oxidation comprises providing a patterned transistor gate stack. A pulse of an oxidizing agent is introduced to the patterned transistor gate stack. The oxidizing agent is purged for a duration between three and fifteen times the duration of the pulse of the oxidizing agent. The steps of introducing a pulse of an oxidizing agent and purging are repeated.
In some embodiments, a method of performing oxidation comprises providing a transistor gate stack on a substrate in a processing chamber. In the chamber, a plurality of oxidation cycles are performed, each cycle comprising introducing an oxidizing agent into the processing chamber to oxidize at least some portion of the gate stack, providing an oxygen scavenger in the processing chamber and removing the oxidizing agent from the processing chamber.
These and other features, aspects and advantages of the various devices, systems and methods presented herein are described with reference to drawings of certain embodiments, which are intended to illustrate, but not to limit, such devices, systems, and methods. The drawings include six figures. It is to be understood that the attached drawings are for the purpose of illustrating concepts of the embodiments discussed herein and may not be to scale.
It has been found that conditions during an oxidation of a transistor structure may result in undesired oxidation of certain areas of the structure. For example, undesired oxidation may occur on exposed metal-containing surfaces, which may result in increased resistance of a metal beyond useable levels. Diffusion of oxygen atoms or molecules, or water molecules (such as in the form of steam or moisture) across layers may also result in oxidation at unexposed interfacial regions within transistor devices, such as at the interface of a floating gate layer and ONO layer of a non-volatile memory device, which may also cause excessive thickening of the dielectric layers. If the dielectric is a high-k material, oxidation of the adjacent conductor can lower the effective k-value of the dielectric, and even silicon oxide layer performance is changed by thickening of the dielectric. It is difficult to reliably design for this thickening, due to differential diffusion from device-to-device and wafer-to-wafer, as well as the inherently differential effect of diffusion across the width of a gate stack.
The preferred embodiments provide methods of oxidation that prevent or limit undesired oxidation of parts of a structure, such as a transistor gate stack. The methods described herein relate generally to oxidation of transistor structures or other similar structures containing regions of different materials. In particular the methods relate to a cyclic oxidation process in which a cycle of a pulse of an oxidizing agent followed by a pulse of a purging agent is repeated to allow for desired oxidation of the exposed outer surface of the structures, while preventing or causing negligible oxidation at the interfaces between different regions within the structure. Without being limited by theory, the pulsed flow is believed to minimize undesired oxidation by interrupting oxidation before excessive oxidant diffusion into other areas of a transistor, such as interfacial regions, occurs. As a result, undesired oxidation of interfacial regions is prevented or limited, thereby preventing or limiting the changes in the properties of an electronic device caused by changes in the interfacial regions. In addition to being principally localized at the exposed outer surface of a structure, in some embodiments, the oxidation can be selective for some exposed materials relative to other exposed materials, which has advantages for preventing or limiting changes to the properties of those exposed materials.
In some embodiments, an oxygen scavenger may be provided in the processing chamber during the oxidation. The oxygen scavenger can assist with preventing undesired oxidation by reducing the number of oxidant atoms in the process chamber.
Advantageously, embodiments of the invention protect against oxidation in unexposed interfacial regions. In addition, some embodiments selectively oxidize some exposed material and limit oxidation on other exposed surfaces (e.g., metal-containing surfaces). An oxidation process that protects against undesired oxidation of a device helps to ensure the integrity of the devices.
Reference will now be made to the figures, in which like numerals refer to like parts throughout.
The gate dielectric 110 formed over the substrate 102 can be an oxide, a high k material, or multi-layer combinations of different dielectric materials. In the embodiment illustrated in
Such areas may need to be repaired by an oxidation process in order to preserve the integrity of the device. The oxidation process, often known as a “source/drain reoxidation,” may occur in a processing chamber. Such an oxidation process may take place after an etching process which has damaged one or more portions of the transistor gate structure.
As shown in
The gate electrode 115 is formed over the gate dielectric layer 110, and may be comprised of polysilicon, poly-SiGe, a metal, metal alloys, or metal compounds such as metal nitrides, metal carbides, or metal silicides. While traditional MOSFETs actually use silicon or silicon germanium as the “metal” gate electrode, more recently metallic materials have regained popularity due to higher conductivity, lower temperature processing availability, and the ability to finely tune composition to set work function. In some embodiments, the gate electrode 115 may comprise a metal such as titanium, tungsten, tantalum or other metal suitable as a conductive gate. In other embodiments, the gate electrode 115 may comprise a metal alloy or a metallic compound, wherein a portion of the layer may be comprised of one or more metals in combination with silicon, nitrogen, and/or carbon.
A metallic strapping layer 165 is formed over the gate electrode 115. The metallic strapping layer 165 helps to improve lateral signal speed across transmission lines. In some embodiments, the metallic strapping layer 165 comprises a metal such as Ta, W or Ti or a metal silicide. In other embodiments, the metallic strapping layer 165 may be comprised of a metallic alloy or compound, including but not limited to, TiNx, TaNx or WNx.
An insulating cap layer 118 (e.g., silicon oxide or nitride) is formed over the metal gate 115 and metallic strapping layer 165 to insulate the gate, and can serve as a hard mask to protect the gate stack during the etching process. Although only a single cap layer 118 is shown in
As will be appreciated by the skilled artisan, MOSFET devices can be established having gate, channel, source and drain regions, by diffusing or injecting appropriate dopants to selected regions. Other embodiments may include layers besides those shown in
In addition to the layers of the patterned gate stack 106,
Like the exposed metal gate sidewall 117, unexposed areas of a transistor device may be subject to oxidation, including interfacial regions, due to diffusion during the oxidation process.
In one embodiment, a method of cyclic oxidation is provided to reduce undesired oxidation at interfacial regions caused by diffusion. This cyclic oxidation process may benefit many different transistor structures, including the transistor structure shown in
The cyclic oxidation processes described herein may be applicable to many transistor structures, including those having one or more patterned gate stacks of various designs. In some embodiments, a cyclic oxidation process that is selective may be used after providing 300 a transistor device whenever metal on the substrate should be protected from oxidation, whether or not the metal is in the same gate stack, although typically some layer in the gate stack includes exposed metal during the selective oxidation.
After providing 300 a transistor structure, in accordance with
The oxidation may take place in a chamber having a temperature between about 550 and about 900° C., and more preferably between about 650 and about 850° C. In one embodiment, the oxidation takes place at about 750° C. Moreover, oxidation may take place in a chamber having a pressure of between about 1 and about 1000 Torr, more preferably between about 720 and about 780 Torr.
According to one embodiment in accordance with
In some embodiments, after providing 300 a transistor structure and prior to introducing 310 a pulse of an oxidizing agent, a passivation layer may be created over metal-containing layers of the transistor structure to protect the layers from excess oxidation growth that may affect the conductive properties of the layers. In one embodiment, a passivation layer may be created by performing a nitridation process using a passivation agent such as nitrogen gas (N2), ammonia gas (NH3) or a mixture of pure nitrogen gas and ammonia gas, as described in U.S. Provisional Application 60/990,869, entitled “Protection of Titanium From Selective Oxidation of Silicon,” filed on Nov. 28, 2007, hereby incorporated by reference in its entirety. In embodiments wherein the oxidation process is selective, providing such a passivation layer can enhance selectivity by allowing oxidation on certain components of a transistor structure relative to passivated components (e.g., exposed metal-containing layers). Thus, in some embodiments, a passivation layer may be created prior to repeating a cycle of introducing 310 a pulse of an oxidizing agent and purging 330 for enhanced selectivity. In other embodiments, creation of a passivation layer may occur multiple times during the entirety repeated cycles of the cyclical oxidation process.
In another embodiment, the oxidizing agent is provided by adding O2 gas to H2, at a concentration below the explosion limit, which ratio the skilled artisan can calculate based on the desired temperature and pressure. In embodiments that use O2 gas as an oxidizing agent, the O2 gas concentration may be between about 0.00025% and about 4% by volume, as diluted in hydrogen, while in a preferred embodiment, the concentration will be between about 0.025% and about 2.5% by volume. The O2 gas may be introduced into a chamber at a flow rate between about 2 sccm and about 800 sccm.
In accordance with
In accordance with
In some embodiments, the purging agent will be introduced in a single wafer processing chamber. In other embodiments, the purging will occur in a batch processing chamber, having a capacity greater than 50 wafers, such as an ADVANCE® 412 vertical batch furnace, commercially available from ASM International, N.V. of Bilthoven, The Netherlands. In embodiments in which the purging occurs in a batch furnace, the purging agent will flow at a rate between about 1 and about 20 slm, while in a preferred embodiment, between about 5 and about 15 slm. In embodiments that use one or more purging agents, such as N2 gas and H2 gas in combination, the flow rate of each gas may vary from one another. There is generally no need to change temperature between the oxidation 310 and the purging 340 processes.
In some embodiments, purging 330 occurs long enough to remove most or all of the oxidant from the chamber or from the gate stack. In some embodiments, the purging 330 may last for a duration between two and twenty times the duration of a pulse of an oxidizing agent, such that the ratio of the purging period to the oxidation period in a single cycle of the cyclical oxidation process is between about 2:1 and about 20:1. In a preferred embodiment, purging 330 will occur for a duration between three and fifteen times the duration of a pulse of an oxidizing agent. Accordingly, a purging agent may be introduced as a pulse after an oxidation period for between about 6 seconds and about 6000 seconds.
In some embodiments, N2 and/or Ar gas may be introduced into the chamber prior to a period of oxidation, such as during purging 330 from a prior cycle. The N2 and/or Ar gas may be allowed to diffuse to surface interfaces, which may slow down the diffusion of oxygen atoms or molecules, or water molecules, to the interfaces during subsequent oxidation steps. The N2 and/or Ar gas may be introduced concurrently with or separately from a different purging gas (e.g., H2 vapor), or may serve as the purging gas, for a time between about 1 and about 10 minutes, to allow for the diffusion of atoms to the interface prior to oxidation. Each of the N2 gas and the Ar gas may be introduced at a flow rate between about 1 and about 20 slm. In one embodiment, the N2 and/or Ar gas is introduced before the first pulse of oxidation 310 (e.g., before the first selective oxidation cycle) is introduced.
In accordance with
The cycle of introducing 310 an oxidizing agent and purging 330 may be repeated 340 a specific number of times until desired oxidation (for example, a certain thickness of silicon sidewall oxidation) is achieved. The number of times a cycle is repeated may be programmed in advance, or it may be determined by way of in situ metrology and closed loop control as the cyclical oxidation process proceeds. In some embodiments, the cycle of introducing 310 an oxidizing agent and purging 330 will occur between 1 and 10 times, more preferably between 3 and 6 times.
Throughout multiple cycles, the duration of each oxidation period and purging period may remain constant. For example, in one embodiment using H2O water vapor as an oxidizing agent, the duration of each oxidation period (e.g., one pulse) may be about 20 seconds, with the purging period being a constant duration as well. In other embodiments, the duration of the oxidation, purging period, or both, may fluctuate over the course of multiple cycles. For example, in one embodiment using H2O water vapor as an oxidizing agent, a first cycle may have a pulse of an oxidizing agent of about 20 seconds and a purging period of about 200 seconds, followed by a second cycle having a pulse of an oxidation for about 25 seconds and a purging period for about 250 seconds. Allowing the oxidation and purging periods to fluctuate per cycle, rather than remain constant, may allow for greater controllability of the oxidation process in some embodiments.
Regardless of the number of cycles used, a total oxidation time, which refers to the total time in which an oxidizing agent is introduced and excludes the purging periods, may be between about 1 and about 300 minutes. In a preferred embodiment, the total oxidation process will be between about 2 and about 240 minutes. The total time of oxidation may depend on multiple factors, including the type of oxidizing agent used and processing chamber conditions. The total time of oxidation may also depend on whether desired oxidation has been achieved on a specific surface, such as for repair of a dielectric at the gate corners. In some embodiments, an oxidation process will result in oxide thickness growth on silicon sidewall surfaces between about 10 and about 100 Å, while in a preferred embodiment, between about 20 and about 40 Å. In another embodiment, in which oxidation takes place for a total oxidation time of about 30 minutes in a chamber at about 750° C., an oxide layer may grow on an exposed silicon surface layer that is between about 20 and about 30 Å. In other embodiments wherein a transistor device stack includes at least one silicon containing layer, a cyclical oxidation process may result in a ratio of oxide growth at one interface of the silicon-containing layer to oxide growth at exposed silicon sidewalls of less than 0.1:1, such as between 0.001:1 and 0.1:1, or between 0.0001:1 and 0.1:1.
In some embodiments in which the cyclic oxidation process is selective, e.g., selective against metal-containing materials such as titanium nitride, a nitrogen source is flowed into the processing chamber during the selective oxidation process to enhance the overall selectivity of the oxidation process. In some embodiments, the nitrogen source is added during step 310, 320 and/or 330. In a preferred embodiment, the nitrogen source is introduced during step 310. Without being limited by theory, it is believed that enhanced selectivity results because the nitrogen source causes nitriding of the metal-containing material, which competes with oxidation on some components of the transistor device to guard against oxidation of that material.
The nitrogen source may be N2, NH3, N2H4 or combinations thereof. In some embodiments, the nitrogen source can form between about 10% and about 90% by volume, and more preferably, between about 40% and about 60% by volume of the gas flowing into the processing chamber. The nitrogen source may be introduced to a reactor environment separately or mixed with other sources. For example, in one embodiment in which a patterned transistor structure is provided having a TiN layer, N2 gas may be introduced with H2 gas, with the N2 gas at about 50% by volume and H2 gas at about 50% by volume, to enhance the selective oxidation process such that silicon is oxidized relative to the TiN layer during oxidation.
With continued reference to
The oxygen scavenger assists in preventing undesired oxidation by reacting with O2 atoms to reduce the number of atoms available to oxidize exposed surfaces, such as exposed metal surfaces. The oxygen scavenger may react with any oxygen atom, regardless of whether the oxygen derives from an oxidation process or is naturally found in a chamber environment. For example, in one embodiment in which O2 gas is provided as a combustible oxidizing agent in an H2 environment to form H2O water vapor, some O2 gas may not combust, but rather, may oxidize exposed surfaces of a transistor structure. By providing an oxygen scavenger, the scavenger will react with the O2 gas before the oxygen has an opportunity to react with the transistor structure.
Examples of suitable oxygen scavenging agents include, without limitation, hydrazine (N2H4), methylhydrazine (N2H4-n(CH3)n n−1-4), ethyl hydrazine (N2H4-n(C2H5)n n=1-4), other organic hydrazines having carbon chains of 1 to 4 carbon atoms, saturated with hydrogen or one or more of the hydrogen atoms substituted by a halide and not containing oxygen, ammonia (NH3) and any combination thereof. In some embodiments, the scavenging agent may be present in the processing chamber at a concentration of about 1% or more by volume. In other embodiments, the concentration is between about 0.1% and about 10% by volume. In one embodiment in which a transistor is provided having a TiN passivation layer, an oxygen scavenger (hydrazine) is present in the processing chamber at a concentration of about 1% by volume.
It will be appreciated that while the H2 reacts with oxygen to form oxidizing H2O water vapor, the oxygen scavenger, e.g., hydrazine, can react with the remaining O2 particles to form N2 and water, in some embodiments, thereby resulting in additional benefits. First, the number of oxygen atoms available to oxidize exposed surfaces and/or to diffuse to interfacial regions of the transistor structure is reduced by the hydrazine scavenger. Second, the formation of N2 may react with the passivation layer, e.g., the TiN layer, and thereby improve the properties of the passivation layer, e.g., increasing the oxidation resistance of the passiviation layer.
The embodiment in
The floating gate 136 rests above the tunnel oxide 130, which may be formed over a semiconductor layer (not shown). Tunnel oxides are generally about 50 to 100 Å thick. In non-volatile memory devices, programming and erasing functions occur due to charge transfer processes across the tunnel oxide layer. It is thus important to control properties of the tunnel to ensure the ability to read and write by tunneling, and the cyclic oxidation processes of the present application may help to repair damaged tunnel areas at the corners, to prevent data loss caused by charge trapping areas and leakage, while minimizing thickness increases in the middle of the tunnel dielectric 130.
The cyclic oxidation process of the present application may be particularly beneficial to prevent the growth of areas of undesired oxide formation or oxide thickness increase 196 within the transistor gate stack 106.
In one embodiment of a cyclic oxidation process, a pulse of an oxidizing agent is introduced comprising H2O water vapor diluted in an H2 environment, wherein the H2O water vapor is 15% by volume. The oxidation takes place at a temperature of 750° C. in a batch furnace. A pulse of the H2O water vapor is introduced at a flow rate of 3 slm for 120 seconds before being stopped. After or simultaneously with stopping the flow of the oxidizing agent, a pulse of a purging agent comprising 100% by volume H2 gas is introduced to remove any remaining oxidizing agent. The H2 gas is introduced at a flow rate of 17 slm. The purging will have a duration ten times the duration of the pulse of the oxidizing agent, or 1200 seconds. The cycle of introducing an oxidizing agent followed by a purging agent may be repeated 15 times, such that the total oxidation period is 1800 seconds, resulting in an oxide growth on an exposed silicon surface of 25 Å.
In another embodiment of a cyclic oxidation process, a pulse of an oxidizing agent is introduced comprising 8% by volume H2O water vapor in an H2 environment. The oxidation takes place at a temperature of 850° C. in a batch furnace. A pulse of the H2O water vapor is introduced at a flow rate of 1.5 slm for 20 seconds before being stopped. After stopping the flow of the oxidizing agent, a pulse of a purging agent comprising 100% by volume H2 gas is introduced to remove any remaining oxidizing agent. The H2 gas is introduced at a flow rate of 8.5 slm. The purging will have a duration ten times the duration of the pulse of the oxidizing agent, or 200 seconds. The cycle of introducing an oxidizing agent followed by a purging agent may be repeated 15 times, such that the total oxidation period is 300 seconds, resulting in an oxide growth on a silicon sidewall surface of 20 Å.
In another embodiment of a cyclic oxidation process, a pulse of an oxidizing agent is introduced comprising 4% by volume O2 gas in an H2 environment. The oxidation takes place at a temperature of 850° C. in a batch furnace. A pulse of the O2 gas is introduced at a flow rate of 0.8 slm for 20 seconds before being stopped. After stopping the flow of the oxidizing agent, a pulse of a purging agent comprising 100% by volume H2 gas is introduced to remove any remaining oxidizing agent. The H2 gas is introduced at a flow rate of 19.2 slm. The purging will have a duration ten times the duration of the pulse of the oxidizing agent, or 200 seconds. The cycle of introducing an oxidizing agent followed by a purging agent may be repeated 15 times, such that the total oxidation period is 300 seconds, resulting in an oxide growth on a silicon sidewall surface of 20 Å.
In another embodiment of a cyclic oxidation process, a pulse of an oxidizing agent is introduced comprising H2O water vapor diluted in an H2 environment, wherein the H2O water vapor is 15% by volume. The oxidation takes place at a temperature of 750° C. in a batch furnace. A pulse of the H2O water vapor is introduced at a flow rate of 3 slm for 120 seconds before being stopped. After stopping the flow of the oxidizing agent, a pulse of a purging agent comprising H2 gas is simultaneously introduced with N2 gas. The H2 gas with Ar and/or N2 gas are introduced at flow rates of about 18 slm and 2 slm, respectively. Initially, the H2 gas comprises a large volume percentage early in the purging (e.g., greater than 80% by volume), while the Ar and/or N2 gas comprises a small volume percentage (e.g., less than 20% by volume), during the first 60 seconds of purging. After 60 seconds, the flow rate of the of the H2 gas is ramped down to 1 slm while the flow rate of the Ar and/or N2 gas is ramped up to 19 slm, such that the H2 gas is largely replaced by the Ar and/or N2 gas. The purging with H2 gas will have a duration ten times the duration of the pulse of the oxidizing agent, or 1200 seconds. In the last 60 seconds of the purge period, the H2 gas flow is ramped back up, while the Ar and/or N2 is ramped back down, so that the purge gases return to their values at the beginning of the purge period, thereby ensuring a selective regime when H2O is present in the processing chamber. The cycle of introducing an oxidizing agent followed by a purging agent may be repeated 15 times, such that the total oxidation period is 1800 seconds, resulting in an oxide growth on an exposed silicon surface of 25 Å.
It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the scope or spirit of the invention. Thus, it is intended that the present invention cover the modifications and variations of this invention provided that they come within the scope of the appended claims or their equivalents.
The present application claims priority under 35 U.S.C. §119(e) to U.S. Provisional Patent Application Ser. No. 61/048,101, entitled “Cyclical Oxidation Process,” filed Apr. 25, 2008. The entire disclosure of the priority application is hereby incorporated by reference in its entirety.
Number | Date | Country | |
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61048101 | Apr 2008 | US |