Detecting defects on a wafer using template image matching

Information

  • Patent Grant
  • 9311698
  • Patent Number
    9,311,698
  • Date Filed
    Wednesday, January 9, 2013
    11 years ago
  • Date Issued
    Tuesday, April 12, 2016
    8 years ago
Abstract
Various embodiments for detecting defects on a wafer are provided. Some embodiments include matching a template image, in which at least some pixels are associated with regions in the device having different characteristics, to output of an electron beam inspection system and applying defect detection parameters to pixels in the output based on the regions that the pixels in the output are located within to thereby detect defects on the wafer.
Description
BACKGROUND OF THE INVENTION

1. Field of the Invention


The present invention generally relates to detecting defects on a wafer using template image matching.


2. Description of the Related Art


The following description and examples are not admitted to be prior art by virtue of their inclusion in this section.


Inspection processes are used at various steps during a semiconductor manufacturing process to detect defects on wafers to promote higher yield in the manufacturing process and thus higher profits. Inspection has always been an important part of fabricating semiconductor devices. However, as the dimensions of semiconductor devices decrease, inspection becomes even more important to the successful manufacture of acceptable semiconductor devices because smaller defects can cause the devices to fail.


Inspection generally involves applying some defect detection parameters to output generated by scanning and/or imaging a wafer. The defect detection parameters may include a threshold that is applied to the output or to a difference between the output and some reference output. Different detection thresholds can be set depending on varying characteristics of the output such as brightness and/or noise due to roughness of different regions of a device, but typically not depending on the locations of the regions within the inspected area. There is no easy way to treat different regions in the output separately according to the device context resolved in the output.


Information beyond simple defect detection is often generated during inspection processes. For example, the detected defects are often classified into different groups. In one such example, after finding defects, they may be classified into different groups based on the defect characteristics such as size, magnitude, and location. Defects can also be classified based on the information contained within a patch image, a relatively small subsection of the full image. Sometimes, the context in which a defect was found cannot be determined from a patch image alone, requiring a larger section of the image surrounding the defect.


Accordingly, it would be advantageous to develop methods and systems for detecting defects on a wafer that do not have one or more of the disadvantages described above.


SUMMARY OF THE INVENTION

The following description of various embodiments is not to be construed in any way as limiting the subject matter of the appended claims.


One embodiment relates to a computer-implemented method for detecting defects on a wafer. The method includes generating a template image using information about a device being formed on the wafer. At least some pixels in the template image are associated with regions in the device having different characteristics. The method also includes acquiring output of an electron beam inspection system for the wafer and matching the template image to the output based on patterns in the template image and the output. In addition, the method includes identifying the regions that pixels in the output are located within based on the regions that are associated with the pixels of the template image that match the pixels in the output. The method further includes applying defect detection parameters to the pixels in the output based on the regions that the pixels are located within to thereby detect defects on the wafer. The steps described above are performed by a computer system.


Each of the steps of the method described above may be further performed as described herein. In addition, the method described above may include any other step(s) of any other method(s) described herein. Furthermore, the method described above may be performed by any of the systems described herein.


Another embodiment relates to a non-transitory computer-readable medium containing program instructions stored therein for causing a computer system to perform a computer-implemented method for detecting defects on a wafer. The computer-implemented method includes the steps of the method described above. The computer-readable medium may be further configured as described herein. The steps of the method may be performed as described further herein. In addition, the method may include any other step(s) of any other method(s) described herein.


An additional embodiment relates to a system configured to detect defects on a wafer. The system includes an electron beam inspection subsystem configured to acquire output for a wafer. The system also includes a computer subsystem configured to generate a template image using information about a device being formed on the wafer. At least some pixels in the template image are associated with regions in the device having different characteristics. The computer subsystem is also configured to match the template image to the output based on patterns in the template image and the output and to identify the regions that pixels in the output are located within based on the regions that are associated with the pixels of the template image that match the pixels in the output. The computer subsystem is further configured to apply defect detection parameters to the pixels in the output based on the regions that the pixels are located within to thereby detect defects on the wafer. The system may be further configured according to any embodiment(s) described herein.





BRIEF DESCRIPTION OF THE DRAWINGS

Further advantages of the present invention will become apparent to those skilled in the art with the benefit of the following detailed description of the preferred embodiments and upon reference to the accompanying drawings in which:



FIG. 1 is a schematic diagram illustrating a plan view of one embodiment of a template image that may be generated according to embodiments described herein;



FIG. 2 is a schematic diagram illustrating one embodiment of matching a template image to output generated by an electron beam inspection system;



FIG. 3 is a block diagram illustrating one embodiment of a non-transitory computer-readable medium; and



FIG. 4 is a block diagram illustrating one embodiment of a system configured to detect defects on a wafer.





While the invention is susceptible to various modifications and alternative forms, specific embodiments thereof are shown by way of example in the drawings and are herein described in detail. The drawings may not be to scale. It should be understood, however, that the drawings and detailed description thereto are not intended to limit the invention to the particular form disclosed, but on the contrary, the intention is to cover all modifications, equivalents and alternatives falling within the spirit and scope of the present invention as defined by the appended claims.


DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Turning now to the drawings, it is noted that the figures are not drawn to scale. In particular, the scale of some of the elements of the figures is greatly exaggerated to emphasize characteristics of the elements. It is also noted that the figures are not drawn to the same scale. Elements shown in more than one figure that may be similarly configured have been indicated using the same reference numerals.


One embodiment relates to a computer-implemented method for detecting defects on a wafer. The method includes generating a template image using information about a device being formed on a wafer. At least some pixels in the template image are associated with regions in the device having different characteristics. The method, therefore, partitions a semiconductor device to be inspected into different regions of interest (ROIs) according to the device context. The device context (or a section of it) may then be rendered into a template image appropriate for inspection.


The different characteristics of the regions in the device may include different electrical characteristics that the regions will have in the final manufactured device. For example, as described further herein, different contacts within an array area of a device may have different electrical functions in the completed device and therefore may have different electrical characteristics. Each of the contacts having the same electrical functions may be grouped into one region while the electrical functions of contacts in different regions may be different. Other disparate device elements may be similarly grouped. For example, each contact, regardless of its region, may be in a region different than the dielectric material that electrically insulates the contacts from each other.


In one embodiment, the information includes design data for the device. For example, device context can be obtained in the form of a device layout design database (e.g., GDSII files) and may include any design information known in the art. In another embodiment, the information includes a high resolution image of the device being formed on the wafer. For example, device context information can be obtained in the form of relatively high resolution images of the device to be inspected. A “high resolution image,” as used herein, generally refers to any image in which the patterns on the wafer are resolved, and are preferably relatively well resolved, such that information about patterns in the device formed on the wafer can be determined from the image with relatively high accuracy. High resolution images of patterns of a device formed on a wafer can be acquired using, for example, an electron beam inspection system. In this manner, the context can be derived empirically from a relatively good quality image.


In one embodiment, the method includes determining the regions that the pixels in the template image are associated with prior to acquiring the output as described further herein. For example, the method may partition the semiconductor device into different ROIs prior to the inspection of the wafer. The template image with the information for the different regions may then be stored into some file or data structure that can be accessed by the inspection system that will be performing the inspection of the wafer. In to addition, the template image and the associated information may be used for the inspection of more than one wafer.


In another embodiment, the method includes determining the regions that the pixels in the template image are associated with based on properties of the device, defects of interest (DOI), known nuisance defects, or some combination thereof. For example, segmentation schemes can be formed to partition the device context into multiple regions based on the device physics, DOI at the moment, and/or the presence of dominating nuisances. In many cases, the locations of DOI within a cell or a device are known as is the location of noise and/or nuisance. Such information can be used to separate the regions in the template image into those that correspond to DOI and those that do not. The device context-based segmentation scheme can be formulated with the assistance of design-based hot spot analysis software. In addition, from an abstracted unit cell context, the user can mark out the areas of interest, and these may be the only areas to be inspected for defects during the inspection. However, the determination of the regions may be completely automated.


In one embodiment, at least one of the regions corresponds to only a single contact within a repeating memory cell structure of the device. For example, regions can be as small as individual contacts within a repeating memory cell structure. In addition, one or more of the regions may be as small a contact or as any other feature or structure in the device while other regions may include more than one feature, a layer, etc.


In another embodiment, at least some of the regions correspond to different types of contacts within a repeating memory cell structure of the device. For example, FIG. 1 shows one embodiment of a template image that can be used for an inspection of a memory cell structure. As described further herein, the device context for a unit cell can be identified from a design database or from a high resolution image. The segmentation scheme shown in FIG. 1 may partition the structures in this portion of the device into the background dielectric, different groups of contacts, and particular locations within the context to be different regions. For example, as shown in FIG. 1, one group of contacts to having one type may be identified as first regions 10 that are ROI or DOI areas. Another group of contacts having a second type different than the first group may be identified as second regions 12 that are also ROI or DOI areas. An additional group of contacts having a third type different than the first and second groups may be identified as third regions 14 that are not ROI. For example, this group of contacts may be contacts in or near which no DOIs are located. Fourth regions 16 may be identified as locations near some of the contacts that are of interest as perhaps containing DOI. The dielectric background may be identified as fifth region 18 that is not a region of interest. The device context may then be rendered into a template image appropriate for matching with images from the upcoming inspection, which can be performed as described further herein.


In some embodiments, at least one of the regions corresponds to an oxide area between contacts in a repeating memory cell structure of the device, and applying defect detection parameters as described further herein is not performed for the oxide area. For example, some regions can be excluded from the inspection such as the oxide area between contacts. In the example shown in FIG. 1, fifth region 18 that includes the dielectric background between contacts in a repeating memory cell structure may be indicated as a non-ROI and defect detection may not be performed for pixels located in that region.


As described herein, the regions may be defined based on electrical characteristics of features in the device, known DOI, and known nuisances. Therefore, regions that may produce output in the inspection system having similar characteristics (e.g., noise, signal, signal-to-noise ratio, brightness, contrast, and any other image, signal, or data characteristics) may be separated into different regions. In other words, unlike other methods that may separate pixels based on image characteristics, the embodiments described herein may separate at least some of the inspection area into regions without regard to how the regions affect the inspection system output.


In an additional embodiment, the method includes generating multiple template images using the information about the device, and each of the multiple template images is generated for one of multiple pixel sizes and optical conditions for the electron beam inspection system described further herein. For example, the template image (i.e., the abstracted unit cell context) may be rendered to the pixel size of the inspection system (i.e., the correct pixel size). In addition, a relatively high resolution template unit cell can be rendered to be used in multiple pixel sizes and/or optics conditions. In this manner, the template image may be rendered to simulate how the portion of the device corresponding to the template image will appear to the inspection system thereby increasing the ability of the method to correctly match the template image to the output of the inspection system. In addition, when there are more than one template image, each of which corresponds to different pixel sizes and/or other optical conditions of the inspection system, the correct template image may be selected at the beginning of the inspection based on the parameters of the inspection system in the inspection recipe that will be used for inspection of the wafer.


The method also includes acquiring output of an electron beam inspection system for the wafer. Acquiring the output may include actually performing an inspection of the wafer (e.g., by scanning the wafer using the electron beam inspection system). However, acquiring the output may not include performing an inspection on the wafer. For example, acquiring the output may include acquiring the output from a storage medium in which the output has been stored by another method or the electron beam inspection system. The inspection may include any suitable inspection including any of those described further herein. The output may include any and all output that may be generated by an inspection process or system.


The method further includes matching the template image to the output based on patterns in the template image and the output. For example, during the inspection process, the device context template image is matched to the acquired output (e.g., an inspection image or images) to determine the location of the context (e.g., each unit cell context) within the inspection image. In particular, pattern matching may be used to locate the unit cell or portion of the device corresponding to the template image within the array region or another region of the device. In one such embodiment, as shown in FIG. 2, template image 20 may be moved to various positions 22 and 24 within inspection image 26 until a match is found. For example, template image 20 may be overlaid with the inspection image at position 22 and since a match of the patterns in the template image and that portion of the inspection image is not found, the template image may be overlaid with the inspection image at the other position, position 24, where a match between the patterns is found.


As shown in FIG. 2, the template image may be smaller than the inspection image such that the inspection image contains enough pixels such that a match between the template image and the inspection image can be found. In addition, as shown in FIG. 2, multiple portions of the inspection image may match the template image. As such, multiple matches between different portions of the inspection image and the template image may be searched for and found or one instance of a match between the inspection image and the template image may be found and then the matching may be propagated through the inspection image as described further herein.


As further shown in FIG. 2, the template image may include information about the different regions within the template image (i.e., the different regions that various contacts are assigned to). However, the template image and the information about the different regions may be stored in different data structures (e.g., if the information about the different regions will make the matching step more difficult).


A match between the template image and the output of the electron beam inspection system may be declared in situations in which a “perfect” match cannot be found. For example, “matching” may include searching for “perfect matches” and also matches within some range of uncertainty or error. In this manner, the matching may be performed while taking into account the fact that the output of the electron beam inspection system may vary due to variations in the wafer itself, which may be caused by, for example, variations in the parameters of the process used to form the patterns on the wafer.


In one embodiment, the template image corresponds to a unit cell within an array region of the device, and matching the template image to the output includes matching the template image to the pixels in the output corresponding to one unit cell in the array region based on the patterns and propagating the matching throughout the array region based on information about the unit cell and the array region. For example, the unit cell may be propagated throughout the array region utilizing the array cell size and a small search range. In other words, if the template image corresponds to one unit cell, since the array region is made up of multiple unit cells, once a match between the template image and some portion of the output has been found, the template image will be matched to one unit cell in the output. Information about the dimensions and arrangement of the unit cells in the array region may then be used to identify other unit cells in the output without performing the matching. Propagating the matching in this manner may be advantageous because it may speed up the inspection process overall and, in instances in which the wafer properties vary across unit cells in the same array region, propagating the matching in this manner can increase the accuracy in which the locations of the unit cells in the output can be identified.


In another embodiment, the template image corresponds to a unit cell within an array region of the device, and matching the template image to the output is performed for an entire row and column of unit cells within a care area in the array region. For example, in “smart” array inspection, pattern matching of the template image to the inspection pixels may be performed for a complete row and column of cells within the array care area. The array care area may be determined in any suitable manner by the embodiments described herein or another method or system.


In some embodiments, the template image corresponds to a unit cell within an array region of the device, and the matching is performed for every unit cell within the array region. For example, for array real time alignment (RTA), pattern matching may be to performed for every unit cell inside the array region. In addition, the alignment can be performed in both the x and y directions, similar to multi-segmented alignment (MS).


The method also includes identifying the regions that pixels in the output are located within based on the regions that are associated with the pixels in the template image that match the pixels in the output. In this manner, during the inspection, the locations of the different regions are identified according to the details of the device context resolved in the image. Each pixel in the image can then be allocated to one of the predetermined regions. In this manner, rendering and matching of the device context is performed for the purpose of identifying the location of the context within the inspection image. In addition, the device context-based segmentation of the inspection image can be performed prior to defect detection. As such, the embodiments described herein can be used to “bin” pixels in the inspection image before inspection is performed using those pixels.


In one embodiment, identifying the regions includes overlaying a region segmentation scheme onto the pixels in the output that match the template image. For example, once the location of the context within the inspection image is obtained, the region segmentation scheme may be overlaid on the inspection image to partition all pixels in the inspection image into different regions. In addition, once the location of each unit cell context is obtained, the region segmentation scheme may be applied in any other manner and all pixels in the inspection image may be partitioned into appropriate regions.


The method also includes applying defect detection parameters to the pixels in the output based on the regions that the pixels are located within to thereby detect defects on the wafer. In this manner, the embodiments described herein are configured for context sensitive electron beam wafer inspection. For example, pixels in the different regions can be processed separately using different defect detection methods that are appropriate for each individual region. In one such example, pixels in each region can be processed to with different detection methods or ignored altogether if desired. For example, there could be multiple groups of areas of interest, and each group could have its own threshold, defect detection method, or defect detection parameters. In another example, during inspection of the context regions, since the exact location of each feature within a cell is known due to the matching described herein, each of the regions may be histogrammed and inspected separately with their individual threshold method and parameters. In addition, some areas can be marked as background and will not be inspected.


In this manner, context sensitive inspection (CSI) may utilize the design knowledge of a unit cell within an array region or of any other region within a device to perform targeted inspections of specific ROIs at sensitive locations where the DOI are expected to occur. In addition, the embodiments described herein can be used to determine the location of each unit cell within a swath image and the location of the ROIs within the cell such that only the part of the cell that is of potential interest needs to be inspected while leaving out uninteresting background areas. In this manner, only the pixels within the user-defined areas of interest can be inspected for defects. Therefore, nuisances outside these areas do not decrease the signal-to-noise ratio for DOI and do not need binning to filter out. As such, the embodiments described herein provide a sensible way for a user to perform targeted inspection based on the design knowledge of the device context. In addition, segmentation of the inspection image gives the user the flexibility to customize the inspection for each region thereby making possible new ways to suppress nuisance defects and improve inspection sensitivity for DOIs. Furthermore, optics selection could utilize the reduction in nuisance detection due to the methods described herein to increase the signal-to-noise ratio for DOI only, with no need to suppress irrelevant nuisances. In one such example, the embodiments described herein can be used with optics selector, which may be configured and/or performed as described in U.S. Pat. No. 8,073,240 issued on Dec. 6, 2011 to Fischer et al., which is incorporated by reference as if fully set forth herein, and even image optimization, where the gain of the inspection system is adjusted to maximize contrast of the ROI.


In one embodiment, the defect detection parameters include whether or not to perform defect detection in one or more of the regions and, for the regions in which the defect detection is to be performed, a threshold that depends on the regions in which the pixels are located, and the threshold is to be applied to a difference between the pixels in the output and reference pixels. For example, after the region segmentation scheme has been applied to pixels in the inspection image, defect detection can be performed on the predetermined DOI regions (each with its own detection threshold) only, while ignoring all information from the background dielectric and non-DOI regions. The detection threshold of each region can be set individually. In one such example, knowing the layout of a cell, each contact could be assigned its own region with its own threshold. Regions where a relatively small DOI is expected can be inspected with relatively high sensitivity while other regions that may contain lots of leakage nuisance defects can be detuned. In addition, regions that contain significant noise can be excluded before they overwhelm a defect detection algorithm. Therefore, thresholds can be significantly lowered in other regions, which could make possible or optimize the detection of DOI.


In one such example, a memory structure that is relatively well-resolved with electron beam inspection system optics can be partitioned into individual contact types such as PMOS/NMOS/Bitline or Wordline contacts, etc. The threshold for each of these contacts can be set individually. For example, if one contact type is prone to leakage-induced gray level variation that is considered a nuisance, its detection threshold can be detuned so as to not overwhelm the inspection result with nuisances. The segmentation of these leakage-proven contacts also prevents the leakage signal from impacting the detection sensitivity of defects from other regions, which can greatly improve the overall inspection sensitivity to the defect types that the customer is interested in.


In another embodiment, applying the defect detection parameters includes averaging multiple pixels in the output corresponding to multiple unit cells in an array region of the device to generate a reference image, subtracting the reference image from a test image in the output that corresponds to one of the multiple unit cells to generate a difference image, and applying the defect detection parameters to the difference image based on the regions that pixels in the difference image are located within. For example, for cell averaging, neighboring cells can be averaged for a relatively low noise reference image, without the restriction of alignment. Cells from above and below can be used in the averaging as well.


In one embodiment, the method includes automatically associating the detected defects with the regions in which they are located. In other words, defects that are detected as described herein can be automatically associated with the region in which they are detected. For example, all defects detected in inspections described herein can be associated with a particular region and relative location within the unit cell context.


The above-described information can then be used for further classification of the defects. For example, in another embodiment, the method includes classifying the detected defects based on the regions in which they are located. In this manner, any defect that is detected during an inspection can be automatically classified by the region it was found in. As such, the information about the region in which the defects are detected can be used for further classification of the defects. In addition, classifying the detected defects may include using the region and location-within-context information for each defect (automatically obtained from the device context-based segmentation) for the purpose of defect classification. In this manner, defects detected during the inspection may be classified according to the device context-based region and/or location thereby giving the user useful information relevant to the design faster.


In some embodiments, each contact type in the device is associated with a different one of the regions, and the method includes displaying density of the detected defects in each contact type. For example, detected defects can be automatically binned by region based on the region in the template image that they are located within. Therefore, wafer maps of each defect type would be trivial to generate. In addition, every contact type can be set as its own ROI. After the inspection, the defect density of each contact type can be displayed in any suitable manner. In one such example, defect density can be displayed for PMOS contact defects, Bitline contact mis-shaped defects, Bitline contact open defects, Wordline contact open defects, and/or NMOS S/D contact open defects.


Generating the template image, acquiring the output, matching the template image to the output, identifying the regions, and applying the defect detection parameters are performed using a computer system, which may be configured as described further herein.


Although some of the steps of the method are described herein with respect to memory cell portions of a device, similar operations can be performed for non-memory cell parts of the wafer if the relevant design database is available.


All of the methods described herein may include storing results of one or more steps of the method embodiments in a non-transitory, computer-readable storage medium. The results may include any of the results described herein and may be stored in any manner known in the art. The storage medium may include any storage medium described herein or any other suitable storage medium known in the art. After the results have been stored, the results can be accessed in the storage medium and used by any of the method or system embodiments described herein, formatted for display to a user, used by another software module, method, or system, etc.


Each of the embodiments of the method described above may include any other step(s) of any other method(s) described herein. In addition, each of the embodiments of the method described above may be performed by any of the systems described herein.


Another embodiment relates to a non-transitory computer-readable medium containing program instructions stored therein for causing a computer system to perform a computer-implemented method for detecting defects on a wafer. One embodiment of such a computer-readable medium is shown in FIG. 3. In particular, computer-readable medium 28 contains program instructions 30 stored therein for causing computer system 32 to perform a computer-implemented method for detecting defects on a wafer.


The computer-implemented method includes the steps of the method described herein. The computer-implemented method may also include any other step(s) of any other method(s) described herein. In addition, the computer-readable medium may be further configured as described herein.


Program instructions 30 implementing methods such as those described herein may be stored on computer-readable medium 28. The computer-readable medium may be a non-transitory computer-readable storage medium such as a magnetic or optical disk, a magnetic tape, or any other suitable non-transitory computer-readable medium known in the art.


The program instructions may be implemented in any of various ways, including procedure-based techniques, component-based techniques, and/or object-oriented techniques, among others. For example, the program instructions may be implemented using ActiveX controls, C++ objects, JavaBeans, Microsoft Foundation Classes (“MFC”), or other technologies or methodologies, as desired.


Computer system 32 may take various forms, including a personal computer system, mainframe computer system, workstation, image computer, parallel processor, or any other device known in the art. In general, the term “computer system” may be broadly defined to encompass any device having one or more processors, which executes instructions from a memory medium.



FIG. 4 illustrates one embodiment of a system configured to detect defects on a wafer. The system includes electron beam inspection subsystem 34 configured to acquire output for a wafer. The electron beam inspection subsystem may include an existing inspection subsystem (e.g., by adding functionality described herein to an existing inspection system) such as any of the inspection tools that are commercially available from KLA-Tencor. For some such systems, the methods described herein may be provided as optional functionality of the system (e.g., in addition to other functionality of the system). Alternatively, the system described herein may be designed “from scratch” to provide a completely new system.


The system also includes computer subsystem 36 configured to generate a template image using information about a device being formed on the wafer, according to any of the embodiments described herein. As described further herein, at least some pixels in the template image are associated with regions in the device having different characteristics. The computer subsystem is also configured to match the template image to the output based on patterns in the template image and the output, which may be performed according to any of the embodiments described further herein. In addition, the computer subsystem is configured to identify the regions that pixels in the output are located within based on the regions that are associated with the pixels of the template image that match the pixels in the output, which may be performed according to any of the embodiments described further herein. The computer subsystem is further configured to apply defect detection parameters to the pixels in the output based on the regions that the pixels are located within to thereby detect defects on the wafer, which may be performed according to any of the embodiments described further herein. The computer subsystem and the system may be further configured to perform any other step(s) of any method(s) described herein.


Further modifications and alternative embodiments of various aspects of the invention will be apparent to those skilled in the art in view of this description. For example, methods and systems for detecting defects on a wafer are provided. Accordingly, this description is to be construed as illustrative only and is for the purpose of teaching those skilled in the art the general manner of carrying out the invention. It is to be understood that the forms of the invention shown and described herein are to be taken as the presently preferred embodiments. Elements and materials may be substituted for those illustrated and described herein, parts and processes may be reversed, and certain features of the invention may be utilized independently, all as would be apparent to one skilled in the art after having the benefit of this description of the invention. Changes may be made in the elements described herein without departing from the spirit and scope of the invention as described in the following claims.

Claims
  • 1. A computer-implemented method for detecting defects on a wafer, comprising: generating a template image using information about a device being formed on a wafer, wherein at least some pixels in the template image are associated with regions in the device having different characteristics;acquiring output of an electron beam inspection system for the wafer;separating the template image into different regions that correspond to different regions in the device prior to acquiring the output;determining which of the different regions in the device that the pixels in the template image are located in based on results of said separating prior to acquiring the output;matching the template image to the output based on patterns in the template image and the output;identifying the regions in the device that pixels in the output are located within based on the pixels of the template image that match the pixels in the output and the different regions in the device in which the pixels of the template image are located, wherein said generating, said acquiring, said separating, said determining, said matching, and said identifying are performed prior to defect detection performed for the wafer; andapplying defect detection parameters to the pixels in the output based on the regions in the device that the pixels in the output are located within to thereby detect defects on the wafer, wherein said generating, said acquiring, said separating, said determining, said matching, said identifying, and said applying are performed using a computer system.
  • 2. The method of claim 1, wherein the information comprises design data for the device.
  • 3. The method of claim 1, wherein the information comprises a high resolution image of the device being formed on the wafer.
  • 4. The method of claim 1, wherein determining which of the different regions in the device that the pixels in the template image are located in is performed based on properties of the device, defects of interest, known nuisance defects, or some combination thereof.
  • 5. The method of claim 1, wherein at least one of the regions in the device corresponds to only a single contact within a repeating memory cell structure of the device.
  • 6. The method of claim 1, wherein at least some of the regions in the device correspond to different types of contacts within a repeating memory cell structure of the device.
  • 7. The method of claim 1, wherein at least one of the regions in the device corresponds to an oxide area between contacts in a repeating memory cell structure of the device, and wherein said applying is not performed for the oxide area.
  • 8. The method of claim 1, further comprising generating multiple template images using the information about the device, wherein each of the multiple template images is generated for one of multiple pixel sizes and optical conditions for the electron beam inspection system.
  • 9. The method of claim 1, wherein the template image corresponds to a unit cell within an array region of the device, and wherein said matching comprises matching the template image to the pixels in the output corresponding to one unit cell in the array region based on the patterns and propagating the matching throughout the array region based on information about the unit cell and the array region.
  • 10. The method of claim 1, wherein the template image corresponds to a unit cell within an array region of the device, and wherein said matching is performed for an entire row and column of unit cells within a care area in the array region.
  • 11. The method of claim 1, wherein the template image corresponds to a unit cell within an array region of the device, and wherein said matching is performed for every unit cell within the array region.
  • 12. The method of claim 1, wherein said identifying comprises overlaying a region segmentation scheme onto the pixels in the output that match the template image.
  • 13. The method of claim 1, wherein the defect detection parameters comprise whether or not to perform defect detection in one or more of the regions in the device and for the regions in the device in which the defect detection is to be performed, a threshold that depends on the regions in the device in which the pixels in the output are located, and wherein the threshold is to be applied to a difference between the pixels in the output and reference pixels.
  • 14. The method of claim 1, wherein said applying comprises averaging multiple pixels in the output corresponding to multiple unit cells in an array region of the device to generate a reference image, subtracting the reference image from a test image in the output that corresponds to one of the multiple unit cells to generate a difference image, and applying the defect detection parameters to the difference image based on the regions in the device that pixels in the difference image are located within.
  • 15. The method of claim 1, further comprising automatically associating the detected defects with the regions in the device in which they are located.
  • 16. The method of claim 1, further comprising classifying the detected defects based on the regions in the device in which they are located.
  • 17. The method of claim 1, wherein each contact type in the device is associated with a different one of the regions in the device, the method further comprising displaying density of the detected detects in said each contact type.
  • 18. A non-transitory computer-readable medium containing program instructions stored therein for causing a computer system to perform a computer-implemented method for detecting defects on a wafer, wherein the computer-implemented method comprises: generating a template image using information about a device being formed on a wafer, wherein at least some pixels in the template image are associated with regions in the device having different characteristics;acquiring output of an electron beam inspection system for the wafer;separating the template image into different regions that correspond to different regions in the device prior to acquiring the output;determining which of the different regions in the device that the pixels in the template image are located in based on results of said separating prior to acquiring the output;matching the template image to the output based on patterns in the template image and the output;identifying the regions, in the device that pixels in the output are located within based on the pixels of the template image that match the pixels in the output and the different regions in the device in which the pixels of the template image are located, wherein said generating, said acquiring, said separating, said determining, said matching, and said identifying are performed prior to defect detection performed for the wafer; andapplying defect detection parameters to the pixels in the output based on the regions in the device that the pixels in the output are located within to thereby detect defects on the wafer.
  • 19. A system configured to detect defects on a wafer, comprising: an electron beam inspection subsystem configured to acquire output for a wafer; anda computer subsystem configured to: generate a template image using information about a device being formed on the wafer, wherein at least some pixels in the template image are associated with regions in the device having different characteristics;separate the template image into different regions that correspond to different regions in the device prior to acquisition of the output by the electron beam inspection subsystem;determine which of the different regions in the device that the pixels in the template image are located in based on results of separating the template image into the different regions prior to acquisition of the output by the electron beam inspection subsystem;match the template image to the output based on patterns in the template image and the output;identify the regions in the device that pixels in the output are located within based on the pixels of the template image that match the pixels in the output and the different regions in the device in which the pixels of the template image are located, wherein the computer subsystem is further configured to generate the template image, separate the template image, determine which of the different regions, match the template image, and identify the regions prior to defect detection performed for the wafer; andapply defect detection parameters to the pixels in the output based on the regions in the device that the pixels in the output are located within to thereby detect defects on the wafer.
  • 20. The system of claim 19, wherein the information comprises design data for the device.
  • 21. The system of claim 19, wherein the information comprises a high resolution image of the device being formed on the wafer.
  • 22. The system of claim 19, wherein the computer subsystem is further configured to determine which of the different regions in the device that the pixels in the template image are located in based on properties of the device, defects of interest, known nuisance defects, or some combination thereof.
  • 23. The system of claim 19, wherein at least one of the regions in the device corresponds to only a single contact within a repeating memory cell structure of the device.
  • 24. The system of claim 19, wherein at least some of the regions in the device correspond to different types of contacts within a repeating memory cell structure of the device.
  • 25. The system of claim 19, wherein at least one of the regions in the device corresponds to an oxide area between contacts in a repeating memory cell structure of the device, and wherein the defect detection parameters are not applied to the pixels within the oxide area.
  • 26. The system of claim 19, wherein the computer subsystem is further configured to generate multiple template images using the information about the device, and wherein each of the multiple template images is generated for one of multiple pixel sizes and optical conditions for the electron beam inspection subsystem.
  • 27. The system of claim 19, wherein the template image corresponds to a unit cell within an array region of the device, and wherein the computer subsystem is further configured to match the template image to the output by matching the template image to the pixels in the output corresponding to one unit cell in the array region based on the patterns and propagating the matching throughout the array region based on information about the unit cell and the array region.
  • 28. The system of claim 19, wherein the template image corresponds to a unit cell within an array region of the device, and wherein the computer subsystem is further configured to match the template image to the output for an entire row and column of unit cells within a care area in the array region.
  • 29. The system of claim 19, wherein the template image corresponds to a unit cell within an array region of the device, and wherein the computer subsystem is further configured to match the template image to the output for every unit cell within the array region.
  • 30. The system of claim 19, wherein the computer subsystem is further configured to identify the regions that the pixels in the output are located within by overlaying a region segmentation scheme onto the pixels in the output that match the template image.
  • 31. The system of claim 19, wherein the defect detection parameters comprise whether or not to perform defect detection in one or more of the regions in the device and for the regions in the device in which the defect detection is to be performed, a threshold that depends on the regions in the device in which the pixels in the output are located, and wherein the threshold is to be applied to a difference between the pixels in the output and reference pixels.
  • 32. The system of claim 19, wherein the computer subsystem is further configured to apply the defect detection parameters by averaging multiple pixels in the output corresponding to multiple unit cells in an array region of the device to generate a reference image, subtracting the reference image from a test image in the output that corresponds to one of the multiple unit cells to generate a difference image, and applying the defect detection parameters to the difference image based on the regions in the device that pixels in the difference image are located within.
  • 33. The system of claim 19, wherein the computer subsystem is further configured to automatically associate the detected defects with the regions in the device in which they are located.
  • 34. The system of claim 19, wherein the computer subsystem is further configured to classify the detected defects based on the regions in the device in which they are located.
  • 35. The system of claim 19, wherein each contact type in the device is associated with a different one of the regions in the device, and wherein the computer subsystem is further configured to display density of the detected defects in said each contact type.
US Referenced Citations (448)
Number Name Date Kind
3495269 Mutschler et al. Feb 1970 A
3496352 Jugle Feb 1970 A
3909602 Micka Sep 1975 A
4015203 Verkuil Mar 1977 A
4247203 Levy et al. Jan 1981 A
4347001 Levy et al. Aug 1982 A
4378159 Galbraith Mar 1983 A
4448532 Joseph et al. May 1984 A
4475122 Green Oct 1984 A
4532650 Wihl et al. Jul 1985 A
4555798 Broadbent, Jr. et al. Nov 1985 A
4578810 MacFarlane et al. Mar 1986 A
4579455 Levy et al. Apr 1986 A
4595289 Feldman et al. Jun 1986 A
4599558 Castellano, Jr. et al. Jul 1986 A
4633504 Wihl Dec 1986 A
4641353 Kobayashi Feb 1987 A
4641967 Pecen Feb 1987 A
4734721 Boyer et al. Mar 1988 A
4748327 Shinozaki et al. May 1988 A
4758094 Wihl et al. Jul 1988 A
4766324 Saadat et al. Aug 1988 A
4799175 Sano et al. Jan 1989 A
4805123 Specht et al. Feb 1989 A
4812756 Curtis et al. Mar 1989 A
4814829 Kosugi et al. Mar 1989 A
4817123 Sones et al. Mar 1989 A
4845558 Tsai et al. Jul 1989 A
4877326 Chadwick et al. Oct 1989 A
4926489 Danielson et al. May 1990 A
4928313 Leonard et al. May 1990 A
5046109 Fujimori et al. Sep 1991 A
5124927 Hopewell et al. Jun 1992 A
5189481 Jann et al. Feb 1993 A
5355212 Wells et al. Oct 1994 A
5444480 Sumita Aug 1995 A
5453844 George et al. Sep 1995 A
5481624 Kamon Jan 1996 A
5485091 Verkuil Jan 1996 A
5497381 O'Donoghue et al. Mar 1996 A
5528153 Taylor et al. Jun 1996 A
5544256 Brecher et al. Aug 1996 A
5563702 Emery et al. Oct 1996 A
5572598 Wihl et al. Nov 1996 A
5578821 Meisberger et al. Nov 1996 A
5594247 Verkuil et al. Jan 1997 A
5608538 Edgar et al. Mar 1997 A
5619548 Koppel Apr 1997 A
5621519 Frost et al. Apr 1997 A
5644223 Verkuil Jul 1997 A
5650731 Fung et al. Jul 1997 A
5661408 Kamieniecki et al. Aug 1997 A
5689614 Gronet et al. Nov 1997 A
5694478 Braier et al. Dec 1997 A
5696835 Hennessey et al. Dec 1997 A
5703969 Hennessey et al. Dec 1997 A
5716889 Tsuji et al. Feb 1998 A
5737072 Emery et al. Apr 1998 A
5742658 Tiffin et al. Apr 1998 A
5754678 Hawthorne et al. May 1998 A
5767691 Verkuil Jun 1998 A
5767693 Verkuil Jun 1998 A
5771317 Edgar Jun 1998 A
5773989 Edelman et al. Jun 1998 A
5774179 Chevrette et al. Jun 1998 A
5795685 Liebmann et al. Aug 1998 A
5822218 Moosa et al. Oct 1998 A
5831865 Berezin et al. Nov 1998 A
5834941 Verkuil Nov 1998 A
5852232 Samsavar et al. Dec 1998 A
5866806 Samsavar et al. Feb 1999 A
5874733 Silver et al. Feb 1999 A
5884242 Meier et al. Mar 1999 A
5889593 Bareket Mar 1999 A
5917332 Chen et al. Jun 1999 A
5932377 Ferguson et al. Aug 1999 A
5940458 Suk Aug 1999 A
5948972 Samsavar et al. Sep 1999 A
5955661 Samsavar et al. Sep 1999 A
5965306 Mansfield et al. Oct 1999 A
5978501 Badger et al. Nov 1999 A
5980187 Verhovsky Nov 1999 A
5986263 Hiroi et al. Nov 1999 A
5991699 Kulkarni et al. Nov 1999 A
5999003 Steffan et al. Dec 1999 A
6011404 Ma et al. Jan 2000 A
6014461 Hennessey et al. Jan 2000 A
6040911 Nozaki et al. Mar 2000 A
6040912 Zika et al. Mar 2000 A
6052478 Wihl et al. Apr 2000 A
6060709 Verkuil et al. May 2000 A
6072320 Verkuil Jun 2000 A
6076465 Vacca et al. Jun 2000 A
6078738 Garza et al. Jun 2000 A
6091257 Verkuil et al. Jul 2000 A
6091846 Lin et al. Jul 2000 A
6097196 Verkuil et al. Aug 2000 A
6097887 Hardikar et al. Aug 2000 A
6104206 Verkuil Aug 2000 A
6104835 Han Aug 2000 A
6117598 Imai Sep 2000 A
6121783 Horner et al. Sep 2000 A
6122017 Taubman Sep 2000 A
6122046 Almogy Sep 2000 A
6137570 Chuang et al. Oct 2000 A
6141038 Young et al. Oct 2000 A
6146627 Muller et al. Nov 2000 A
6171737 Phan et al. Jan 2001 B1
6175645 Elyasaf et al. Jan 2001 B1
6184929 Noda et al. Feb 2001 B1
6184976 Park et al. Feb 2001 B1
6191605 Miller et al. Feb 2001 B1
6201999 Jevtic Mar 2001 B1
6202029 Verkuil et al. Mar 2001 B1
6205239 Lin et al. Mar 2001 B1
6215551 Nikoonahad et al. Apr 2001 B1
6224638 Jevtic et al. May 2001 B1
6233719 Hardikar et al. May 2001 B1
6246787 Hennessey et al. Jun 2001 B1
6248485 Cuthbert Jun 2001 B1
6248486 Dirksen et al. Jun 2001 B1
6259960 Inokuchi Jul 2001 B1
6266437 Eichel et al. Jul 2001 B1
6267005 Samsavar et al. Jul 2001 B1
6268093 Kenan et al. Jul 2001 B1
6272236 Pierrat et al. Aug 2001 B1
6282309 Emery Aug 2001 B1
6292582 Lin et al. Sep 2001 B1
6295374 Robinson et al. Sep 2001 B1
6324298 O'Dell et al. Nov 2001 B1
6336082 Nguyen et al. Jan 2002 B1
6344640 Rhoads Feb 2002 B1
6363166 Wihl et al. Mar 2002 B1
6366687 Aloni et al. Apr 2002 B1
6373975 Bula et al. Apr 2002 B1
6388747 Nara et al. May 2002 B2
6393602 Atchison et al. May 2002 B1
6407373 Dotan Jun 2002 B1
6415421 Anderson et al. Jul 2002 B2
6445199 Satya et al. Sep 2002 B1
6451690 Matsumoto et al. Sep 2002 B1
6459520 Takayama Oct 2002 B1
6466314 Lehman Oct 2002 B1
6466315 Karpol et al. Oct 2002 B1
6470489 Chang et al. Oct 2002 B1
6483938 Hennessey et al. Nov 2002 B1
6513151 Erhardt et al. Jan 2003 B1
6526164 Mansfield et al. Feb 2003 B1
6529621 Glasser et al. Mar 2003 B1
6535628 Smargiassi et al. Mar 2003 B2
6539106 Gallarda et al. Mar 2003 B1
6569691 Jastrzebski et al. May 2003 B1
6581193 McGhee et al. Jun 2003 B1
6593748 Halliyal et al. Jul 2003 B1
6597193 Lagowski et al. Jul 2003 B2
6602728 Liebmann et al. Aug 2003 B1
6608681 Tanaka et al. Aug 2003 B2
6614520 Bareket et al. Sep 2003 B1
6631511 Haffner et al. Oct 2003 B2
6636301 Kvamme et al. Oct 2003 B1
6642066 Halliyal et al. Nov 2003 B1
6658640 Weed Dec 2003 B2
6665065 Phan et al. Dec 2003 B1
6670082 Liu et al. Dec 2003 B2
6680621 Savtchouk Jan 2004 B2
6691052 Maurer Feb 2004 B1
6701004 Shykind et al. Mar 2004 B1
6718526 Eldredge et al. Apr 2004 B1
6721695 Chen et al. Apr 2004 B1
6734696 Horner et al. May 2004 B2
6738954 Allen et al. May 2004 B1
6748103 Glasser et al. Jun 2004 B2
6751519 Satya et al. Jun 2004 B1
6753954 Chen Jun 2004 B2
6757645 Chang et al. Jun 2004 B2
6759655 Nara et al. Jul 2004 B2
6771806 Satya et al. Aug 2004 B1
6775818 Taravade et al. Aug 2004 B2
6777147 Fonseca et al. Aug 2004 B1
6777676 Wang et al. Aug 2004 B1
6778695 Schellenberg et al. Aug 2004 B1
6779159 Yokoyama et al. Aug 2004 B2
6784446 Phan et al. Aug 2004 B1
6788400 Chen Sep 2004 B2
6789032 Barbour et al. Sep 2004 B2
6803554 Ye et al. Oct 2004 B2
6806456 Ye et al. Oct 2004 B1
6807503 Ye et al. Oct 2004 B2
6813572 Satya et al. Nov 2004 B2
6820028 Ye et al. Nov 2004 B2
6828542 Ye et al. Dec 2004 B2
6842225 Irie et al. Jan 2005 B1
6859746 Stirton Feb 2005 B1
6879403 Freifeld Apr 2005 B2
6879924 Ye et al. Apr 2005 B2
6882745 Brankner et al. Apr 2005 B2
6884984 Ye et al. Apr 2005 B2
6886153 Bevis Apr 2005 B1
6892156 Ye et al. May 2005 B2
6902855 Peterson et al. Jun 2005 B2
6906305 Pease et al. Jun 2005 B2
6918101 Satya et al. Jul 2005 B1
6919957 Nikoonahad et al. Jul 2005 B2
6937753 O'Dell et al. Aug 2005 B1
6948141 Satya et al. Sep 2005 B1
6959255 Ye et al. Oct 2005 B2
6966047 Glasser Nov 2005 B1
6969837 Ye et al. Nov 2005 B2
6969864 Ye et al. Nov 2005 B2
6983060 Martinent-Catalot et al. Jan 2006 B1
6988045 Purdy Jan 2006 B2
6990385 Smith et al. Jan 2006 B1
7003755 Pang et al. Feb 2006 B2
7003758 Ye et al. Feb 2006 B2
7012438 Miller et al. Mar 2006 B1
7026615 Takane et al. Apr 2006 B2
7027143 Stokowski et al. Apr 2006 B1
7030966 Hansen Apr 2006 B2
7030997 Neureuther et al. Apr 2006 B2
7053355 Ye et al. May 2006 B2
7061625 Hwang et al. Jun 2006 B1
7071833 Nagano et al. Jul 2006 B2
7103484 Shi et al. Sep 2006 B1
7106895 Goldberg et al. Sep 2006 B1
7107517 Suzuki et al. Sep 2006 B1
7107571 Chang et al. Sep 2006 B2
7111277 Ye et al. Sep 2006 B2
7114143 Hanson et al. Sep 2006 B2
7114145 Ye et al. Sep 2006 B2
7117477 Ye et al. Oct 2006 B2
7117478 Ye et al. Oct 2006 B2
7120285 Spence Oct 2006 B1
7120895 Ye et al. Oct 2006 B2
7123356 Stokowski et al. Oct 2006 B1
7124386 Smith et al. Oct 2006 B2
7133548 Kenan et al. Nov 2006 B2
7135344 Nehmadi et al. Nov 2006 B2
7136143 Smith Nov 2006 B2
7152215 Smith et al. Dec 2006 B2
7162071 Hung et al. Jan 2007 B2
7170593 Honda et al. Jan 2007 B2
7171334 Gassner Jan 2007 B2
7174520 White et al. Feb 2007 B2
7194709 Brankner Mar 2007 B2
7207017 Tabery et al. Apr 2007 B1
7231628 Pack et al. Jun 2007 B2
7236847 Marella Jun 2007 B2
7271891 Xiong et al. Sep 2007 B1
7379175 Stokowski et al. May 2008 B1
7383156 Matsusita et al. Jun 2008 B2
7386839 Golender et al. Jun 2008 B1
7388979 Sakai et al. Jun 2008 B2
7418124 Peterson et al. Aug 2008 B2
7424145 Horie et al. Sep 2008 B2
7440093 Xiong et al. Oct 2008 B1
7570796 Zafar et al. Aug 2009 B2
7676077 Kulkarni et al. Mar 2010 B2
7683319 Makino et al. Mar 2010 B2
7738093 Alles et al. Jun 2010 B2
7739064 Ryker et al. Jun 2010 B1
7752584 Yang Jul 2010 B2
7760929 Orbon et al. Jul 2010 B2
7769225 Kekare et al. Aug 2010 B2
7774153 Smith Aug 2010 B1
7877722 Duffy et al. Jan 2011 B2
7890917 Young et al. Feb 2011 B1
7904845 Fouquet et al. Mar 2011 B2
7968859 Young et al. Jun 2011 B2
8041103 Kulkarni et al. Oct 2011 B2
8073240 Fischer et al. Dec 2011 B2
8112241 Xiong Feb 2012 B2
8126255 Bhaskar et al. Feb 2012 B2
8204297 Xiong et al. Jun 2012 B1
20010017694 Oomori et al. Aug 2001 A1
20010019625 Kenan et al. Sep 2001 A1
20010022858 Komiya et al. Sep 2001 A1
20010043735 Smargiassi et al. Nov 2001 A1
20020010560 Balachandran Jan 2002 A1
20020019729 Chang et al. Feb 2002 A1
20020026626 Randall et al. Feb 2002 A1
20020033449 Nakasuji et al. Mar 2002 A1
20020035461 Chang et al. Mar 2002 A1
20020035641 Kurose et al. Mar 2002 A1
20020035717 Matsuoka Mar 2002 A1
20020054291 Tsai et al. May 2002 A1
20020088951 Chen Jul 2002 A1
20020090746 Xu et al. Jul 2002 A1
20020134936 Matsui et al. Sep 2002 A1
20020144230 Rittman Oct 2002 A1
20020145734 Watkins et al. Oct 2002 A1
20020164065 Cai et al. Nov 2002 A1
20020168099 Noy Nov 2002 A1
20020176096 Sentoku et al. Nov 2002 A1
20020181756 Shibuya et al. Dec 2002 A1
20020186878 Hoon et al. Dec 2002 A1
20020192578 Tanaka et al. Dec 2002 A1
20030004699 Choi et al. Jan 2003 A1
20030014146 Fujii et al. Jan 2003 A1
20030017664 Pnueli et al. Jan 2003 A1
20030022401 Hamamatsu et al. Jan 2003 A1
20030033046 Yoshitake et al. Feb 2003 A1
20030048458 Mieher et al. Mar 2003 A1
20030048939 Lehman Mar 2003 A1
20030057971 Nishiyama et al. Mar 2003 A1
20030076989 Maayah et al. Apr 2003 A1
20030086081 Lehman May 2003 A1
20030094572 Matsui et al. May 2003 A1
20030098805 Bizjak et al. May 2003 A1
20030128870 Pease et al. Jul 2003 A1
20030138138 Vacca et al. Jul 2003 A1
20030138978 Tanaka et al. Jul 2003 A1
20030169916 Hayashi et al. Sep 2003 A1
20030173516 Takane et al. Sep 2003 A1
20030192015 Liu Oct 2003 A1
20030207475 Nakasuji et al. Nov 2003 A1
20030223639 Shlain et al. Dec 2003 A1
20030226951 Ye et al. Dec 2003 A1
20030227620 Yokoyama et al. Dec 2003 A1
20030228714 Smith et al. Dec 2003 A1
20030229410 Smith et al. Dec 2003 A1
20030229412 White et al. Dec 2003 A1
20030229868 White et al. Dec 2003 A1
20030229875 Smith et al. Dec 2003 A1
20030229880 White et al. Dec 2003 A1
20030229881 White et al. Dec 2003 A1
20030237064 White et al. Dec 2003 A1
20040030430 Matsuoka Feb 2004 A1
20040032908 Hagai et al. Feb 2004 A1
20040049722 Matsushita Mar 2004 A1
20040052411 Qian et al. Mar 2004 A1
20040057611 Lee et al. Mar 2004 A1
20040066506 Elichai et al. Apr 2004 A1
20040091142 Peterson et al. May 2004 A1
20040094762 Hess et al. May 2004 A1
20040098216 Ye et al. May 2004 A1
20040102934 Chang May 2004 A1
20040107412 Pack et al. Jun 2004 A1
20040119036 Ye et al. Jun 2004 A1
20040120569 Hung et al. Jun 2004 A1
20040133369 Pack et al. Jul 2004 A1
20040147121 Nakagaki et al. Jul 2004 A1
20040174506 Smith Sep 2004 A1
20040179738 Dai et al. Sep 2004 A1
20040199885 Lu et al. Oct 2004 A1
20040223639 Sato et al. Nov 2004 A1
20040228515 Okabe et al. Nov 2004 A1
20040234120 Honda et al. Nov 2004 A1
20040243320 Chang et al. Dec 2004 A1
20040246476 Bevis et al. Dec 2004 A1
20040254752 Wisniewski et al. Dec 2004 A1
20050004774 Volk et al. Jan 2005 A1
20050008218 O'Dell et al. Jan 2005 A1
20050010890 Nehmadi et al. Jan 2005 A1
20050013474 Sim Jan 2005 A1
20050062962 Fairley et al. Mar 2005 A1
20050069217 Mukherjee Mar 2005 A1
20050117796 Matsui et al. Jun 2005 A1
20050132306 Smith et al. Jun 2005 A1
20050141764 Tohyama et al. Jun 2005 A1
20050166174 Ye et al. Jul 2005 A1
20050184252 Ogawa et al. Aug 2005 A1
20050190957 Cai et al. Sep 2005 A1
20050198602 Brankner et al. Sep 2005 A1
20060000964 Ye et al. Jan 2006 A1
20060036979 Zurbrick et al. Feb 2006 A1
20060038986 Honda et al. Feb 2006 A1
20060048089 Schwarzband Mar 2006 A1
20060051682 Hess et al. Mar 2006 A1
20060062445 Verma et al. Mar 2006 A1
20060066339 Rajski et al. Mar 2006 A1
20060078192 Oh Apr 2006 A1
20060082763 Teh et al. Apr 2006 A1
20060159333 Ishikawa Jul 2006 A1
20060161452 Hess Jul 2006 A1
20060193506 Dorphan et al. Aug 2006 A1
20060193507 Sali et al. Aug 2006 A1
20060236294 Saidin et al. Oct 2006 A1
20060236297 Melvin, III et al. Oct 2006 A1
20060239536 Shibuya et al. Oct 2006 A1
20060265145 Huet et al. Nov 2006 A1
20060266243 Percin et al. Nov 2006 A1
20060269120 Nehmadi et al. Nov 2006 A1
20060273242 Hunsche et al. Dec 2006 A1
20060273266 Preil et al. Dec 2006 A1
20060277520 Gennari Dec 2006 A1
20060291714 Wu et al. Dec 2006 A1
20060292463 Best et al. Dec 2006 A1
20070002322 Borodovsky et al. Jan 2007 A1
20070011628 Ouali et al. Jan 2007 A1
20070013901 Kim et al. Jan 2007 A1
20070019171 Smith Jan 2007 A1
20070019856 Furman et al. Jan 2007 A1
20070031745 Ye et al. Feb 2007 A1
20070032896 Ye et al. Feb 2007 A1
20070035322 Kang et al. Feb 2007 A1
20070035712 Gassner et al. Feb 2007 A1
20070035728 Kekare et al. Feb 2007 A1
20070052963 Orbon et al. Mar 2007 A1
20070064995 Oaki et al. Mar 2007 A1
20070133860 Lin et al. Jun 2007 A1
20070156379 Kulkarni et al. Jul 2007 A1
20070230770 Kulkarni et al. Oct 2007 A1
20070248257 Bruce et al. Oct 2007 A1
20070280527 Almogy et al. Dec 2007 A1
20070288219 Zafar et al. Dec 2007 A1
20080013083 Kirk et al. Jan 2008 A1
20080015802 Urano et al. Jan 2008 A1
20080016481 Matsuoka et al. Jan 2008 A1
20080018887 Chen et al. Jan 2008 A1
20080049994 Rognin et al. Feb 2008 A1
20080058977 Honda Mar 2008 A1
20080072207 Verma et al. Mar 2008 A1
20080081385 Marella et al. Apr 2008 A1
20080163140 Fouquet et al. Jul 2008 A1
20080167829 Park et al. Jul 2008 A1
20080250384 Duffy et al. Oct 2008 A1
20080295047 Nehmadi et al. Nov 2008 A1
20080295048 Nehmadi et al. Nov 2008 A1
20080304056 Alles et al. Dec 2008 A1
20090024967 Su et al. Jan 2009 A1
20090037134 Kulkarni et al. Feb 2009 A1
20090041332 Bhaskar et al. Feb 2009 A1
20090043527 Park et al. Feb 2009 A1
20090055783 Florence et al. Feb 2009 A1
20090067703 Lin et al. Mar 2009 A1
20090080759 Bhaskar et al. Mar 2009 A1
20090210183 Rajski et al. Aug 2009 A1
20090257645 Chen et al. Oct 2009 A1
20090284733 Wallingford et al. Nov 2009 A1
20090290782 Regensburger Nov 2009 A1
20090299681 Chen et al. Dec 2009 A1
20090323052 Silberstein et al. Dec 2009 A1
20100142800 Pak et al. Jun 2010 A1
20100146338 Schalick et al. Jun 2010 A1
20100150429 Jau et al. Jun 2010 A1
20100188657 Chen et al. Jul 2010 A1
20100226562 Wu et al. Sep 2010 A1
20110013825 Shibuya et al. Jan 2011 A1
20110052040 Kuan Mar 2011 A1
20110184662 Badger et al. Jul 2011 A1
20110251713 Teshima et al. Oct 2011 A1
20110276935 Fouquet et al. Nov 2011 A1
20110311126 Sakai et al. Dec 2011 A1
20120308112 Hu et al. Dec 2012 A1
20120319246 Tan et al. Dec 2012 A1
20130009989 Chen et al. Jan 2013 A1
20130027196 Yankun et al. Jan 2013 A1
20130336575 Dalla-Torre et al. Dec 2013 A1
Foreign Referenced Citations (55)
Number Date Country
1339140 Mar 2002 CN
1398348 Feb 2003 CN
1646896 Jul 2005 CN
0032197 Jul 1981 EP
0370322 May 1990 EP
1061358 Dec 2000 EP
1061571 Dec 2000 EP
1065567 Jan 2001 EP
1066925 Jan 2001 EP
1069609 Jan 2001 EP
1093017 Apr 2001 EP
1329771 Jul 2003 EP
1480034 Nov 2004 EP
1696270 Aug 2006 EP
7-159337 Jun 1995 JP
2002-071575 Mar 2002 JP
2002-365235 Dec 2002 JP
2003-215060 Jul 2003 JP
2004-045066 Feb 2004 JP
2005-283326 Oct 2005 JP
2007-234798 Sep 2007 JP
2009-122046 Jun 2009 JP
2010-256242 Nov 2010 JP
2012-225768 Nov 2012 JP
10-2001-0007394 Jan 2001 KR
10-2001-0037026 May 2001 KR
10-2001-0101697 Nov 2001 KR
10-2003-0055848 Jul 2003 KR
10-2006-0075691 Jul 2005 KR
10-2005-0092053 Sep 2005 KR
10-2006-0124514 Dec 2006 KR
10-0696276 Mar 2007 KR
10-2010-0061018 Jun 2010 KR
10-2012-0068128 Jun 2012 KR
9857358 Dec 1998 WO
9922310 May 1999 WO
9925004 May 1999 WO
9959200 May 1999 WO
9938002 Jul 1999 WO
9941434 Aug 1999 WO
0003234 Jan 2000 WO
0036525 Jun 2000 WO
0055799 Sep 2000 WO
0068884 Nov 2000 WO
0070332 Nov 2000 WO
0109566 Feb 2001 WO
0140145 Jun 2001 WO
03104921 Dec 2003 WO
2004027684 Apr 2004 WO
2004097903 Nov 2004 WO
2006012388 Feb 2006 WO
2006063268 Jun 2006 WO
2009018337 Feb 2009 WO
2009152046 Sep 2009 WO
2010093733 Aug 2010 WO
Non-Patent Literature Citations (53)
Entry
U.S. Appl. No. 60/681,095, filed May 13, 2005 by Nehmadi et al.
U.S. Appl. No. 60/684,360, filed May 24, 2005 by Nehmadi et al.
U.S. Appl. No. 13/652,377, filed Oct. 15, 2012 by Wu et al.
Allan et al., “Critical Area Extraction for Soft Fault Estimation,” IEEE Transactions on Semiconductor Manufacturing, vol. 11, No. 1, Feb. 1998.
Barty et al., “Aerial Image Microscopes for the inspection of defects in EUV masks,” Proceedings of SPIE, vol. 4889, 2002, pp. 1073-1084.
Budd et al., “A New Mask Evaluation Tool, the Microlithography Simulation Microscope Aerial Image Measurement System,” SPIE vol. 2197, 1994, pp. 530-540.
Cai et al., “Enhanced Dispositioning of Reticle Defects Using the Virtual Stepper With Automoated Defect Severity Scoring,” Proceedings of the SPIE, vol. 4409, Jan. 2001, pp. 467-478.
Comizzoli, “Uses of Corona Discharges in the Semiconductor Industry,” J. Electrochem. Soc., 1987, pp. 424-429.
Contactless Electrical Equivalent Oxide Thickness Measurement, IBM Technical Disclosure Bulletin, vol. 29, No. 10, 1987, pp. 4622-4623.
Contactless Photovoltage vs. Bias Method for Determining Flat-Band Voltage, IBM Technical Disclosure Bulletin, vol. 32, vol. 9A, 1990, pp. 14-17.
Cosway et al., “Manufacturing Implementation of Corona Oxide Silicon (COS) Systems for Diffusion Furnace Contamination Monitoring,” 1997 IEEE/SEMI Advanced Semiconductor Manufacturing Conference, pp. 98-102.
Diebold et al., “Characterization and produiction metrology of thin transistor gate oxide films,” Materials Science in Semiconductor Processing 2, 1999, pp. 103-147.
Dirksen et al., “Impact of high order aberrations on the performance of the aberration monitor,” Proc. of SPIE vol. 4000, Mar. 2000, pp. 9-17.
Dirksen et al., “Novel aberration monitor for optical lithography,” Proc. of SPIE vol. 3679, Jul. 1999, pp. 77-86.
Garcia et al., “New Die to Database Inspection Algorithm for Inspection of 90-nm Node Reticles,” Proceedings of SPIE, vol. 5130, 2003, pp. 364-374.
Granik et al., “Sub-resolution process windows and yield estimation technique based on detailed full-chip CD simulation,” Mentor Graphics, Sep. 2000, 5 pages.
Hess et al., “A Novel Approach: High Resolution Inspection with Wafer Plane Defect Detection,” Proceedings of SPIE—International Society for Optical Engineering; Photomask and Next-Generation Lithography Mask Technology 2008, vol. 7028, 2008.
Huang et al., “Process Window Impact of Progressive Mask Defects, Its Inspection and Disposition Techniques (go/no-go criteria) Via a Lithographic Detector,” Proceedings of SPIE—The International Society for Optical Engineering; 25th Annual Bacus Symposium on Photomask Technology 2005, vol. 5992, No. 1, 2005, p. 6.
Huang et al., “Using Design Based Binning to Improve Defect Excursion Control for 45nm Production,” IEEE, International Symposium on Semiconductor Manufacturing, Oct. 2007, pp. 1-3.
Hung et al., Metrology Study of Sub 20 Angstrom oxynitride by Corona-Oxide—Silicon (COS) and Conventional C-V Approaches, 2002, Mat. Res. Soc. Symp. Proc., vol. 716, pp. 119-124.
Karklin et al., “Automatic Defect Severity Scoring for 193 nm Reticle Defect Inspection,” Proceedings of SPIE—The International Society for Optical Engineering, 2001, vol. 4346, No. 2, pp. 898-906.
Lo et al., “Identifying Process Window Marginalities of Reticle Designs for 0.15/0.13 μm Technologies,” Proceedings of SPIE vol. 5130, 2003, pp. 829-837.
Lorusso et al. “Advanced DFM Applns. Using design-based metrology on CDSEM,” SPIE vol. 6152, Mar. 27, 2006.
Lu et al., “Application of Simulation Based Defect Printability Analysis for Mask Qualification Control,” Proceedings of SPIE, vol. 5038, 2003, pp. 33-40.
Mack, “Lithographic Simulation: A Review,” Proceedings of SPIE vol. 4440, 2001, pp. 59-72.
Martino et al., “Application of the Aerial Image Measurement System (AIMS(TM)) to the Analysis of Binary Mask Imaging and Resolution Enhancement Techniques,” SPIE vol. 2197, 1994, pp. 573-584.
Miller, “A New Approach for Measuring Oxide Thickness,” Semiconductor International, Jul. 1995, pp. 147-148.
Nagpal et al., “Wafer Plane Inspection for Advanced Reticle Defects,” Proceedings of SPIE—The International Society for Optical Engineering; Photomask and Next-Generation Lithography Mask Technology. vol. 7028, 2008.
Numerical Recipes in C. The Art of Scientific Computing, 2nd Ed., © Cambridge University Press 1988, 1992, p. 683.
O'Gorman et al., “Subpixel Registration Using a Concentric Ring Fiducial,” Proceedings of the International Conference on Pattern Recognition, vol. ii, Jun. 16, 1990, pp. 249-253.
Otsu, “A Threshold Selection Method from Gray-Level Histograms,” IEEE Transactions on Systems, Man, and Cybernetics, vol. SMC-9, No. 1, Jan. 1979, pp. 62-66.
Pang et al., “Simulation-based Defect Printability Analysis on Alternating Phase Shifting Masks for 193 nm Lithography,” Proceedings of SPIE, vol. 4889, 2002, pp. 947-954.
Pettibone et al., “Wafer Printability Simulation Accuracy Based on UV Optical Inspection Images of Reticle Defects,” Proceedings of SPIE—The International Society for Optical Engineering 1999 Society of Photo-Optical Instrumentation Engineers, vol. 3677, No. II, 1999, pp. 711-720.
Phan et al., “Comparison of Binary Mask Defect Printability Analysis Using Virtual Stepper System and Aerial Image Microscope System,” Proceedings of SPIE—The International Society for Optical Engineering 1999 Society of Photo-Optical Instrumentation Engineers, vol. 3873, 1999, pp. 681-692.
Sahouria et al., “Full-chip Process Simulation for Silicon DRC,” Mentor Graphics, Mar. 2000, 6 pages.
Sato et al., “Defect Criticality Index (DCI): A new methodology to significantly improve DOI sampling rate in a 45nm production environment,” Metrology, Inspection, and Process Control for Microlithography XXII, Proc. of SPIE vol. 6922, 692213 (2008), pp. 1-9.
Schroder et al., Corona-Oxide-Semiconductor Device Characterization, 1998, Solid-State Electronics, vol. 42, No. 4, pp. 505-512.
Schroder, “Surface voltage and surface photovoltage: history, theory and applications,” Measurement Science and Technology, vol. 12, 2001, pp. R16-31.
Schroder, Contactless Surface Charge Semiconductor Characterization, Apr. 2002, Materials Science and Engineering B, vol. 91-92, pp. 196-228.
Schurz et al., “Simulation Study of Reticle Enhancement Technology Applications for 157 nm Lithography,” SPIE vol. 4562, 2002, pp. 902-913.
Svidenko et al. “Dynamic Defect-Limited Yield Prediction by Criticality Factor,” ISSM Paper: YE-O-157, 2007.
Tang et al., “Analyzing Volume Diagnosis Results with Statistical Learning for Yield Improvement” 12th IEEE European Test Symposium, Freiburg 2007, IEEE European, May 20-24, 2007, pp. 145-150.
Verkuil et al., “A Contactless Alternative to MOS Charge Measurements by Means of a Corona-Oxide-Semiconductor (COS) Technique,” Electrochem. Soc. Extended Abstracts, 1988, vol. 88-1, No. 169, pp. 261-262.
Verkuil, “Rapid Contactless Method for Measuring Fixed Oxide Charge Associated with Silicon Processing,” IBM Technical Disclosure Bulletin, vol. 24, No. 6, 1981, pp. 3048-3053.
Volk et al. “Investigation of Reticle Defect Formation at DUV Lithography,” 2002, BACUS Symposium on Photomask Technology.
Volk et al. “Investigation of Reticle Defect Formation at DUV Lithography,” 2003, IEEE/SEMI Advanced Manufacturing Conference, pp. 29-35.
Volk et al., “Investigation of Smart Inspection of Critical Layer Reticles using Additional Designer Data to Determine Defect Significance,” Proceedings of SPIE vol. 5256, 2003, pp. 489-499.
Weinberg, “Tunneling of Electrons from Si into Thermally Grown SiO2,” Solid-State Electronics, 1977, vol. 20, pp. 11-18.
Weinzierl et al., “Non-Contact Corona-Based Process Control Measurements: Where We've Been, Where We're Headed,” Electrochemical Society Proceedings, Oct. 1999, vol. 99-16, pp. 342-350.
Yan et al., “Printability of Pellicle Defects in DUV 0.5 um Lithography,” SPIE vol. 1604, 1991, pp. 106-117.
Guo et al., “License Plate Localization and Character Segmentation with Feedback Self-Learning and Hybrid Binarization Techniques,” IEEE Transactions on Vehicular Technology, vol. 57, No. 3, May 2008, pp. 1417-1424.
Liu, “Robust Image Segmentation Using Local Median,” Proceedings of the 3rd Canadian Conference on Computer and Robot Vision (CRV'06) 0-7695-2542-3/06, 2006 IEEE, 7 pages total.
International Search Report and Written Opinion for PCT/US2014/010743 mailed Jun. 20, 2014.
Related Publications (1)
Number Date Country
20140193065 A1 Jul 2014 US