Claims
- 1. A device for inserting at least one semiconductor component into a receiving portion, particularly into a test socket for testing the electric function of the semiconductor component, said device comprising:(i) at least one receiving space (46) for the semiconductor component (12), said receiving space (46) comprising a receiving opening (56), and (ii) at least one pushing element (34) for pushing the semiconductor component (12) in a pushing direction (58) through said receiving opening (56) into said receiving space (46), (iii) said pushing element (34) comprising a gas cushion generating means (62) for generating a gas cushion (60) for centering the semiconductor component (12) within said receiving opening (56) prior to pushing the semiconductor component (12) into said receiving space (46).
- 2. The device according to claim 1, wherein said pushing element (34) comprises a front face (38), oriented towards the pushing direction (58) and arranged to confront the semiconductor components (12) during the movement of said pushing element, and wherein said gas cushion generating means (62) comprises at least one gas discharge orifice (40) formed in said front face (38) of said pushing element (34).
- 3. The device according to claim 2, wherein said gas discharge orifice (40) is formed as a diffusor (66) or comprises a diffusor (66).
- 4. The device according to claim 3, wherein said diffusor (66) comprises a spiral (64).
- 5. The device according to claim 2, wherein said gas cushion generating means (62) comprises at least one gas feed conduit (32, 36) leading to said gas discharge orifice (40), said at least one gas feed conduit (32, 36) being arranged in or at said pushing element (34) and originating at an air-flow generating means (42).
- 6. The device according to claim 1, wherein a plurality of pushing elements (34) are provided, which are arranged on a common support (30).
- 7. The device according to claim 5, wherein said gas feed conduits (32, 36) of said pushing elements (34) are connected to each other.
- 8. The device according to claim 1, wherein a heating/cooling means (68) is provided for tempering said gas.
- 9. The device according to claim 1, wherein said gas cushion generating means (62) comprises a closed gas circuit.
- 10. The device according to claim 1, wherein said device is arranged in a housing sealed against the environment.
- 11. The device according to claim 10, wherein said housing is provided with means for thermal insulation (71).
- 12. The device according to claim 10, wherein said housing is provided with at least one heating and/or cooling means.
- 13. A method of protecting a semiconductor component during a test which comprises inserting at least one semiconductor component into a receiving portion of a device, particularly into a test socket for testing the electric function of the semiconductor component, said device comprising:(i) at least one receiving space (46) for the semiconductor component (12), said receiving space (46) comprising a receiving opening (56), (ii) at least one pushing element (34); (b) pushing the semiconductor component (12) in a pushing direction (58) through said receiving opening (56) into said receiving space (46), wherein said pushing element (34) further comprises a gas cushion generating means (62); and (iii) generating a gas cushion (60) for centering the semiconductor component (12) within said receiving opening (56) and subsequently pushing the semiconductor component (12) into said receiving space (46), whereby said semiconductor component is safely positioned for testing without undue wear or damage to said component.
Priority Claims (1)
Number |
Date |
Country |
Kind |
196 15 674 |
Apr 1996 |
DE |
|
Parent Case Info
This application is the national phase under 35 U.S.C. §371 of prior PCT International Application No. PCT/EP97/01948 which has an International filing date of Apr. 18, 1997 which designated the United States of America, the entire contents of which are hereby incorporated by reference.
PCT Information
Filing Document |
Filing Date |
Country |
Kind |
102e Date |
371c Date |
PCT/EP97/01948 |
|
WO |
00 |
10/14/1998 |
10/14/1998 |
Publishing Document |
Publishing Date |
Country |
Kind |
WO97/40393 |
10/30/1997 |
WO |
A |
US Referenced Citations (9)
Non-Patent Literature Citations (1)
Entry |
IBM Technical Disclosure Bulletin, vol. 18, Mar. 1976 (3 pages). |