1. Technical Field
The present disclosure relates to an LED having a die-bonded structure.
2. Related Art
The technology of adhering an LED chip to a lead frame has been developed for many years. Die-bonding materials are approximately divided into two categories: one is high molecular conductive glue materials, and the other is metal welding materials.
The first category can be seen in ROC Patent No. 463394 entitled “CHIP-TYPE LED AND MANUFACTURING METHOD THEREOF”. The method mainly includes: plating silver paste on a surface of a metal substrate, forming a plurality of lead frames after etching, die-bonding one end of the lead frame and connecting it to the opposite end by wire bonding, performing glue sealing and dicing so as to form a chip-type LED, in which lead frames exposed at the bottom form electrical contacts. In such practice, if glue is not spread uniformly in the bonding process, the die will not be fixed at the preset position, thereby influencing the luminous efficiency. Next, in such die-bonding method, since the high molecular material has extremely low heat resistance, the silver paste bonding layer is easily deteriorated in operation at a high temperature. Further, since the high molecular material has low heat conductivity, the LED die cannot obtain a desirable heat dissipation effect due to the low heat conductivity (the heat conductivity coefficient of the silver paste is only 1 W/M-K). The life and photoelectric conversion efficiency of the LED die are reduced as well.
The second category can be seen in ROC Patent Application Publication No. 200840079 entitled “DIE-BONDING MATERIAL AND METHOD OF LED PACKAGE”. The die-bonding method used in the patent application mainly adopts eutectic bonding based on the metal material of a substrate. First, a layer of eutectic bonding material in an appropriate range is coated on an upper surface of the metal substrate of the package structure. Then, an LED die is disposed on the eutectic bonding material of the substrate. The finished product passes through a hot plate, an oven, or a tunnel furnace to have an appropriate temperature, so as to accomplish the eutectic bonding. This technology employs the eutectic bonding material, and forms a bonding layer of a metal material, and thus achieves better heat dissipation and heat resistance than the silver paste. A part of the eutectic bonding material employed in this patent technology has a high melting point, so that thermal stress easily remains on the LED die in bonding, which damages the die. Although the other part of the eutectic bonding material is a low melting point alloy, after bonding of such bonding material is completed, if the LED is used in an environment of 70-80° C., the bonding layer will be softened, and the contact reliability is greatly impaired.
In addition to the above technologies, US Patent Application Publication No. 2007/0141749 has disclosed introducing ultrasonic waves in the die-bonding process and ionizing the bonding surface by the ultrasonic waves, so as to lower the heating temperature and reduce the thermal stress. This method requires the addition of ultrasonic equipment, which increases the manufacturing cost. Meanwhile, if the ultrasonic waves are operated improperly, the LED die may be vibrated directly to be cracked.
According to an embodiment, an LED comprises a first intermetallic layer, a first metal thin film layer, an LED chip, a substrate, a second metal thin film layer, and a second intermetallic layer. The first metal thin film layer is located on the first intermetallic layer. The LED chip is located on the first metal thin film layer. The second metal thin film layer is located on the substrate. The second intermetallic layer is located on the second metal thin film layer, and the first intermetallic layer is located on the second intermetallic layer. A material of the first metal thin film layer and a material of the second metal thin film layer are selected from a group consisting of Au, Ag, Cu, and Ni. Materials of the intermetallic layers are selected from a group consisting of a Cu—In—Sn intermetallics, an Ni—In—Sn intermetallics, an Ni—Bi intermetallics, an Au—In intermetallics, an Ag—In intermetallics, an Ag—Sn intermetallics, and an Au—Bi intermetallics.
The present disclosure will become more fully understood from the detailed description given herein below for illustration only, and thus are not limitative of the present disclosure, and wherein:
Referring to
The spectrum of light emitted by the LED chip 10 may be any visible light spectrum (380 nm to 760 nm) or other spectrums. The LED chip 10 may be formed as a horizontal structure (Sapphire base), a vertical structure (Thin-GaN LED), or a Flip-Chip.
The LED chip 10 has a first metal thin film layer 12. A material of the first metal thin film layer 12 may be Au, Ag, Cu, or Ni. The first metal thin film layer 12 may be plated on a surface of the LED chip 10 by electroplating, sputtering, or evaporation. A thickness of the first metal thin film layer 12 may be, but not limited to, 0.2 μm to 2.0 μm. For example, the thickness is 0.5 μm to 1.0 μm.
In the LED chip 10 having the first metal thin film layer 12, the first metal thin film layer 12 is usually not directly plated on the diced chip; instead, the first metal thin film layer 12 is plated on a back side of an LED wafer by electroplating or other methods, and then the wafer is diced and split.
The substrate 20 may be a lead frame, a printed circuit board (PCB), a substrate having a plastic reflective cup, or a ceramic substrate. A material of the substrate 20 may be a pure element such as Cu, Al, Fe, or Ni or an alloy added with a small amount of other elements. The material of the substrate 20 may also be Si, AN, or low-temperature cofired ceramics (LTCC).
Reference is made to
In Step S50, a second metal thin film layer 22 is formed on a surface of the substrate 20 (as shown in
In Step S52, a die-bonding material layer 30 is formed on the second metal thin film layer 22, in which a melting point of the die-bonding material layer 30 is lower than 100° C. (as shown in
In Step S54, the LED chip 10 is placed on the die-bonding material layer 30 with the first metal thin film layer 12 contacting the die-bonding material layer 30 (as shown in
In Step S56, the die-bonding material layer 30 is heated at a liquid-solid reaction temperature for a pre-curing time, so as to respectively form a first intermetallic layer 32 and a second intermetallic layer 34 between the first metal thin film layer 12, the die-bonding material layer 30, and the second metal thin film layer 22 (as shown in
In Step S58, the die-bonding material layer 30 is heated at a solid-solid reaction temperature for a curing time, so as to perform a solid-solid reaction, in which a melting point of the first intermetallic layer 32′ and the second intermetallic layer 34′ after the solid-solid reaction is higher than 200° C. (as shown in
Reference is made to
Referring to
Referring to
Then, Step S56 is performed in which the die-bonding material layer 30 is heated at a liquid-solid reaction temperature for a pre-curing time, so as to respectively form a first intermetallic layer 32 and a second intermetallic layer 34 between the first metal thin film layer 12, the die-bonding material layer 30, and the second metal thin film layer 22 (as shown in
The ambient temperature may be directly raised to the liquid-solid reaction temperature, or the die-bonding material layer 30 may be directly heated, or the substrate 20 may be directly heated and then heat may transfer to the die-bonding material layer 30. Heating is performed at, for example, but not limited to, the bottom of the substrate 20 directly by laser (i.e., heating is performed below the substrate 20 as shown in
The heating time (the pre-curing time) may be, but is not limited to, 0.1 second to 2 seconds, for example, 0.2 second to 1 second. The heating time may be appropriately adjusted depending on the condition of the liquid-solid reaction. The heating time may be the time taken for forming the first intermetallic layer 32 and the second intermetallic layer 34 respectively between the first metal thin film layer 12, the die-bonding material layer 30, and the second metal thin film layer 22. Step S56 can be construed as completed even if the formed first intermetallic layer 32 and second intermetallic layer 34 are very thin. That is to say, as long as the first intermetallic layer 32 and the second intermetallic layer 34 are formed between the first metal thin film layer 12, the die-bonding material layer 30, and the second metal thin film layer 22, i.e., the bonding effect is produced, Step S56 can be stopped to proceed to the next step (S58). Definitely, increasing the pre-curing time to form more first intermetallic layers 32 and second intermetallic layers 34 in the process is also implementable.
The heating operation in Step S56 may also be referred to as a pre-curing procedure, which aims to pre-fix the LED chip 10 and the substrate 20 according to the current alignment, so as to facilitate the subsequent process. Since the temperature of the pre-curing procedure may be equal to slightly higher than the melting point of the die-bonding material layer 30, and the pre-curing time is quite short, the alignment can be effectively maintained without exerting any influence such as a thermal stress on the LED chip 10.
Materials of the formed first intermetallic layer 32 and second intermetallic layer 34 are related to the first metal thin film layer 12 and the second metal thin film layer 22, which will be described in detail later.
Finally, Step S58 is performed in which the die-bonding material layer 30 is heated at a solid-solid reaction temperature for a curing time, so as to perform a solid-solid reaction. The solid-solid reaction temperature may be lower than the melting point of the die-bonding material layer 30, and may be, but not limited to, 40 to 80° C. The curing time may be adjusted according to the solid-solid reaction temperature. For example, when the solid-solid reaction temperature is high, the curing time may be short. When the solid-solid reaction temperature is low, the curing time may be long. The curing time may be 30 minutes to 3 hours.
The solid-solid reaction aims to diffuse alloy elements of the die-bonding material layer 30 and elements of the first metal thin film layer 12 and the second metal thin film layer 22. The time of the solid-solid reaction may be determined as the time required for diffusing most of alloy elements in the die-bonding material layer 30.
Step S58 may be performed by batch operation in the actual application. That is to say, multiple semi-finished products obtained after Step S56 are gathered, and Step S58 is performed by hot air heating, oven heating, infrared heating, or hot plate heating unitedly.
Since the solid-solid reaction temperature in Step S58 is lower than the melting point of the die-bonding material layer 30, the alignment achieved in Step S56 is not influenced.
The LED formed after Step S58 has several possible structures. The first structure of the LED can be seen in
Next, it should be noted that, the materials of the first intermetallic layer 32 and the second intermetallic layer 34 formed in the pre-curing procedure (i.e., shown in
Three examples are listed below to show the materials of the second metal thin film layer 22, the second intermetallic layer 34′, the first intermetallic layer 32′, and the first metal thin film layer 12 of the LED shown in
Melting points of the first intermetallic layer 32′ and the second intermetallic layer 34′ in the first embodiment of the LED structure in
Another structure of the LED formed after Step S58 can be seen in
Since a melting point of Sn is about 230° C. which is also higher than 200° C., the above purpose of not softening the LED in use can be achieved. That is to say, the die-bonding material layer 30 may disappear by reaction after the solid-solid reaction or remain to form the intermediate layer 36.
The bonding state of Bi—In—Sn and Ag can be seen in
It can be known from the embodiments of the die-bonding method and the LED structure after die-bonding that, the LED chip 10 can be pre-cured on the substrate 20 using a low temperature and a short time in the die-bonding process without the problem of misalignment. Afterwards, a solid-solid reaction is performed at a lower temperature. The first intermetallic layer 32′ and the second intermetallic layer 34′ after the reaction have high melting points (higher than 200° C.). Therefore, even if the LED after die-bonding is operated at a temperature higher than 80° C. for a long time, the first intermetallic layer 32′ and the second intermetallic layer 34′ will not be softened, and the alignment precision is not influenced. Further, since the temperatures used in the process are all far lower than 100° C., the problem that a thermal stress remains or is concentrated on the LED chip 10 and other components (such as the substrate 20 and the plastic reflective cup) will not occur in the die-bonding process. An LED having high reliability is obtained. Finally, since the pre-curing procedure can be performed by laser heating, the pre-curing time is shortened a lot. Moreover, since batch operation can be employed in the solid-solid reaction, the present die-bonding method can obtain a much higher throughput than the conventional art.
Number | Date | Country | Kind |
---|---|---|---|
98140702 A | Nov 2009 | TW | national |
This application is a divisional patent application U.S. application Ser. No. 12/854,278 filed on Aug. 11, 2010, for “Die-bonding method of LED chip and LED manufactured by the same”. This application is also claims priority under 35 U.S.C. §119(a) on Patent Application No(s). 098140702 filed in Taiwan, R.O.C. on Nov. 27, 2009. Each of theses application is incorporated herein by reference in its entirety.
Number | Name | Date | Kind |
---|---|---|---|
8110437 | Waitl et al. | Feb 2012 | B2 |
8236687 | Lin et al. | Aug 2012 | B2 |
20030010975 | Gibb et al. | Jan 2003 | A1 |
20040211060 | Suga et al. | Oct 2004 | A1 |
20050161813 | Pammer et al. | Jul 2005 | A1 |
20060105478 | Camras et al. | May 2006 | A1 |
20060138532 | Okamoto et al. | Jun 2006 | A1 |
20080003777 | Slater et al. | Jan 2008 | A1 |
20080093620 | Lee et al. | Apr 2008 | A1 |
20090134501 | Ganitzer et al. | May 2009 | A1 |
20090261377 | Tu | Oct 2009 | A1 |
20100012955 | Sorg et al. | Jan 2010 | A1 |
Number | Date | Country |
---|---|---|
101501872 | Aug 2009 | CN |
1717854 | Nov 2006 | EP |
1748480 | Jan 2007 | EP |
2004202581 | Jul 2004 | JP |
2006237215 | Sep 2006 | JP |
2007109829 | Apr 2007 | JP |
2007300489 | Nov 2007 | JP |
2009111080 | May 2009 | JP |
2009188176 | Aug 2009 | JP |
200835766 | Sep 2008 | TW |
200939526 | Sep 2009 | TW |
Entry |
---|
Japan Patent Office, “Office Action”, Japan. |
Ervina Efzan Mhd Noor et al., Characteristic of Low Temperature of Bi-In-Sn Solder alloy, 33rd International Electronics Manufacturing Technology Conference, 2008, p. 1-4. |
Intellectual Property Office, Ministry of Economic Affairs, R.O.C., “Office Action”, Nov. 27, 2012, Taiwan. |
European Patent Office, “Office Action”, Mar. 7, 2013. |
Number | Date | Country | |
---|---|---|---|
20120256228 A1 | Oct 2012 | US |
Number | Date | Country | |
---|---|---|---|
Parent | 12854278 | Aug 2010 | US |
Child | 13530396 | US |