Patent Application
20080089042
The invention relates to the field of electronic circuit engineering and in particular to electronic circuit arrangements for controlling a process device. It also relates to apparatuses according to the opening clause of the claims. Such electronic circuit arrangements find application, e.g., in high or medium voltage switching technology, drive technology and power conversion technology.
Electronic control circuits for controlling a process device are known from the art. They receive process signals from the process device, which are converted into converted signals and/or digital data, which converted signals and/or digital data are then processed in the electronic control circuit. Processed signals and/or digital data, which result from the processing, are then converted into control signals, which control signals are then transmitted to the process device.
It is known from the art to arrange such electronic control circuits using electronic components on a printed circuit board (PCB). Such a (single) PCB with components fitted is also called a printed circuit board assembly (PCBA). During the envisaged lifetime of such an electronic control circuit, a failure of a component of the electronic control circuit may occur, whereupon that component should be replaced. Particularly in the case of long envisaged lifetimes (of the order of 10 to 30 years), a suitable component for replacement may not be available anymore, which unfortunately can make it necessary to replace the whole PCBA and therefore the whole control circuit.
Therefore, the goal of the invention is to create an electronic circuit arrangement for controlling a process device that does not have the disadvantages mentioned above. An electronic circuit arrangement shall be provided, which can be used for a long time without the necessity to replace the full circuit because of lacking replacement components.
The problem is solved by apparatuses and a method with the characteristics of the claims.
According to the invention an electronic circuit arrangement for controlling a process device comprises
It is characterized in that
None of the first PCBAs is identical with any of the second PCBAs.
Through this, it is possible to have the processing circuitry physically separated from the process interface circuitry, so that it is possible to replace the processing circuitry (or parts of it), while leaving the process interface circuitry untouched. Such processing circuitries usually comprise components with a fast innovation cycle, so that, after a number of years, they are outdated and hard to procure. Possible replacement components that would be available after many years mostly would have different specifications and/or footprints. By means of the invention it is possible to design a new printed circuit board assembly (or new printed circuit board assemblies) for the processing circuitry only, using such replacement components with different specifications. The printed circuit board assembly (or printed circuit board assemblies) comprising the process interface circuitry may, on the other hand, remain unchanged.
Usually, the process interface circuitry can be designed such that it only or mainly comprises components that have a slow innovation cycle (discrete components like resistors, capacitors and the like, or analog-to-digital converters). Upon failure of one of such components, it will usually be possible to find a 1:1 replacement component even after decades, so that no so redesign of the process interface circuitry would be required.
In a preferred embodiment the electronic circuit arrangement comprises at least one digital signal processing chip (DSP chip), and all DSP chips of the electronic circuit arrangement are arranged in the processing circuitry. DSP chips have a rather fast innovation cycle, so that it is advantageous to design the electronic circuit arrangement such that all the DSP chips, which it comprises, are foreseen in the processing circuitry, so that all the DSP chips are located in second PCBAs, whereas the first PCBA or PCBAs are free from DSP chips.
Preferably, all the DSP chips are arranged to be programmed with programming information initially received from or via the process interface circuitry. I.e., the DSP chips (which are part of the processing circuitry) are to be programmed by means of the process interface circuitry or by means of data provided to the processing circuitry via the process interface circuitry or by data initially transferred to the processing circuitry on a first system start and then kept in a non-volatile memory of the processing circuit. For example, the process interface circuitry may comprise a controller, which contains the data required to program the DSP. For programming the DSP chip (upon any start/restart of the electronic circuit arrangement), the appropriate programming information is then extracted from the controller and sent to the processing circuitry. This allows for a very versatile use of the processing circuitry. The same processing circuitry may be used for various purposes, depending on the process interface circuitry which it is used together with. In another example, a non-volatile memory, e.g., a flash memory chip, may be associated with a DSP chip, e.g., a processor chip (microprocessor chip). Preferably, the memory chip is part of the processing circuit. That non-volatile memory chip can, upon first use of the processing circuitry together with the process interface circuitry, be filled with suitable controller information. Once the memory chip contains that information, a DSP chip (e.g., processor chip) may receive its programming information from that memory chip, whenever a restart occurs. On the first (initial) start, the controller information is transmitted to the processing circuitry from or via the process interface circuitry. E.g., the controller information may be fed into the process interface circuitry from a personal computer connected to the process interface circuitry.
In a very preferred embodiment at least one of the DSP chips (or the DSP chip) is a programmable gate array chip, in particular a field programmable gate array (FPGA). The use of a programmable gate array chip as DSP chip in circuit arrangements according to the invention is very advantageous, because such chips have a deterministic behaviour, which is crucial for achieving a great time precision in the controlling tasks. Processor chips on the other hand usually show a jitter of the order of milliseconds, which may be insufficient for various applications, e.g, in high or medium or low voltage switching or protection, in drive controlling tasks or in power conversion.
A DSP chip may also be an ASIC (application-specific integrated circuit) chip.
In another preferred embodiment, at least one of the DSP chips (or the DSP chip) is a (microprocessor chip) chip. A processor chip is very well suited for taking over the function of a controller (for further DSP chips) and of a communication interface. In particular, the use of at least one (or exactly one) processor chip together with at least one (or exactly one) programmable gate array chip is preferred, because a programmable gate array chip is very well suited for arithmetics and calculation tasks like filtering or modulation, which very well complements with the preferred tasks of a processor chip. For example, the processor chip may, among other functions, function as controller for the programmable gate array chip and provide the programmable gate array chip with suitable programming information upon any start/restart; the processor chip itself may receive its programming information (upon any start/restart) from a flash memory chip, which preferably is part of the processing circuit and itself is once programmed on an initial start of the controlling circuitry. The processor chip may also receive its programming information from a controller component of the process interface circuitry upon every start/restart.
In another preferred embodiment, the electronic circuit arrangement comprises at least one memory chip, and all memory chips of the electronic circuit arrangement are arranged in the processing circuitry. Memory chips have a very fast innovation cycle, so that it is very advantageous to design the electronic circuit arrangement such, that all the memory chips, which it comprises, are foreseen in the processing circuitry, so that all the memory chips are located in second PCBAs, whereas the first PCBA or PCBAs are free from memory chips.
In another preferred embodiment, the processing circuitry is provided with connections solely to the process interface circuitry. It is preferred that the processing circuitry is foreseen to cooperate with a suitable process interface circuitry and not, in addition, with another circuitry. This dedication of the processing circuitry to the process interface circuitry can reduce the susceptibility to failures/errors of the electronic circuit arrangement and thus enhance its stability.
In another preferred embodiment, the processing circuitry is realized in exactly one second printed circuit board assembly (PCBA), i.e. on one PCB. This enhances the manufacturability of the processing circuitry, allows for faster processing, and eases the handling.
In further preferred embodiments, the process device is, e.g., a high or medium voltage installation (device),
Accordingly, the invention also comprises, e.g., any process device,
Further preferred embodiments and advantages emerge from the dependent claims and the figures.
Below, the invention is illustrated in more detail by means of a preferred embodiment, which is illustrated in the included drawings. The figures show:
The reference symbols used in the figures and their meaning are summarized in the list of reference symbols. Generally, alike or alike-functioning parts are given the same reference symbols. The described embodiments are meant as examples and shall not confine the invention.
In the example to be discussed, the process 4 shall be assumed to be high or medium voltage switching. The process interface circuitry 1 receives process signals 5 from the process. Such process signals 5 may, e.g., be outputs from voltage or current sensors or status signals of relays or the like. In the process interface circuitry 1 the process signals 5 are converted, so as to obtain converted signals and/or digital data 6. These converted signals and/or digital data 6 are in a form suitable to be transmitted to the processing circuitry 2. Then, the converted signals and/or digital data 6 are processed in the processing circuitry 2.
Signals, like, e.g., the above-mentioned process signals 5 and converted signals 6, carry their information in a voltage level, which is to be interpreted. Digital data on the other hand, like, e.g., the above-mentioned digital data 6, carry their information in digital form; a protocol has to be used in order to interpret the digital data and decode the information.
As a result of the processing in the processing circuitry 2, processed signals and/or digital data 7 are obtained. These are transmitted to the process interface circuitry 1, in which they are converted into control signals 8. These control signals 8 are then transmitted to the process 4 and, e.g., result in an opening or closing of the high or medium voltage switchgear.
The first PCBA 10 comprises the process interface circuitry 1, whereas the second PCBA 20 comprises the processing circuitry 2. The two PCBAs 10 and 20 are interconnected by means of a connector 35. Through the connector 35, e.g. an DIMM connector, and through the layout of the first PCBA 10, a standardized interface for the second PCBA 20 may be defined. Through this standardization, a replacement of a second PCBA 20 and/or of the respective processing circuitry 2 may be realized even if replacement parts and components of the original PCBA 20 are no more available.
The process interface circuitry 1 may also be distributed on a number of PCBAs 10 (with one PCB each), and the processing circuitry 2 may also be distributed on a number of PCBAs 10 (with one PCB each).
The first PCBA 10 comprises, e.g., resistors 12, capacitors 13, metallically isolated inputs 15, which may be connected to the process device 40 (high or medium voltage switchgear, in
The second PCBA 20 comprises, e.g., two DSP chips, memory chips 23 and a quartz 24. The two DSP chips are a processor chip 21 and a programmable gate array chip 22 (preferably an FPGA 22). The quartz 24 is to provide for a clock signal for the DSP chips. A watchdog component is preferably also provided in the second PCBA 20 (not indicated in
A controller component may be part of the process interface circuitry 1 or be embodied in form of a non-volatile memory chip as part of the programming circuitry (to be programmed by or via the process interface circuitry 1 on an initial start); wherein the processor chip 21 may receive its programming information from such a memory chip, and the programmable gate array chip 22 may receive its programming information from the processor chip 21.
If the process is a power conversion process and the process device is a power converter, the preferred power level is above 50 kW, preferably between about 100 kW to about 50 MW. And preferred applications are in excitation systems, rectifier stations and in traction.
Special chip housings, like ball grid array (BGA), multi chip module (MCM), chip-scale packages (CSP) or the like are not considered to constitute a PCBA or comprise a PCB in the sense as PCBA and PCB is used in this application, and neither do chips sockets or other sockets or connectors.
For the definition of high, medium and low voltage it is basically referred to the definition in the “IEC dictionary”. In particular: High voltage means voltages generally above 1 kV, in particular above approximately 50 kV, typically 110 kV, 220 kV or 380 kV. Medium voltage means voltages approximately between 1 kV and 50 kV, typically 5, 10, 12, 20, 24 or 36 kV. Low voltage means voltages below 1 kV, typically 110, 220 or 380 V. The voltage values are rated voltages, for alternating currents.
| Number | Date | Country | Kind |
|---|---|---|---|
| 05405344.2 | May 2005 | EP | regional |
| Number | Date | Country | |
|---|---|---|---|
| Parent | PCT/CH2006/000256 | May 2006 | US |
| Child | 11976891 | Oct 2007 | US |
