Patent Application
20160148865
As the background art of the present technical field, there is Japanese Patent No. 3784341. In this gazette, there is described a circuit board that in the circuit board that a metal material used for cooling has been provided on the back surface side of an insulating ceramics substrate, the ceramics substrate is directly joined to the metal material without using an adhesive under a room temperature environment, the ceramics substrate includes a polycrystalline brittle material, a grain boundary layer including a glass layer is not present on an interface between crystals, and an interface between the ceramics substrate and the metal material is made as an anchor part that the ceramics substrate bites into the metal material.
In Japanese Patent No. 3784341, there is described the electronic circuit board in which the ceramics substrate has been directly formed on the metal material by an aerosol deposition method under the room temperature environment. A conductor property wiring is formed on the front surface of the ceramics substrate in order to load a semiconductor element such as an IC chip and so forth.
However, the inventors and others of the present invention have measured volume resistivity of the ceramics substrate fabricated by the method described in Japanese Patent No. 3784341, and found that it is low in comparison with the volume resistivity of a ceramics substrate fabricated by sintering. Accordingly, a problem has been clarified that when a DC voltage of several 100V has been continuously loaded on the ceramics substrate fabricated by the method described in Japanese Patent No. 3784341, a short-circuit duration is short and the insulation reliability becomes insufficient in comparison with the ceramics substrate fabricated by sintering.
In view of the abovementioned problem, the present invention aims to provide an electronic circuit board in which the volume resistivity of the ceramics substrate which has been fabricated by the aerosol deposition method is increased and the insulation reliability has been improved, a semiconductor device using it and a manufacturing method therefor.
In order to solve the abovementioned problem, the present invention provides an electronic circuit board which includes a metal material and an insulating layer which has been formed on a front surface of the metal material and includes an inorganic material containing a crystal of a grain diameter of 10 to 20 nm and in which the insulating layer is less than 0.08 g/cm3 in amount of moisture which it contains.
In addition, the present invention provides a manufacturing method for electronic circuit boards in which aerosol which contains particles configuring an insulating layer is injected to a metal material to form the insulating layer on a front surface of the metal material, and either the metal material front surface or the insulating layer front surface is heated.
According to the present invention, there can be provided the electronic circuit board in which the volume resistivity of the ceramics substrate which has been fabricated by the aerosol deposition method is increased and the insulation reliability has been improved, the semiconductor device using it and the manufacturing method therefor.
In the following, an embodiment will be described using the drawings.
A schematic diagram of an electronic circuit board in the present embodiment is shown in
As the inorganic material to be used in the insulating layer 2, any material can be used if it is electrically insulating. For example, Al2O3, AlN, TiO2, Cr2O3, SiO2, Y2O3, NiO, ZrO2, SiC, Tic, WC and so forth are given. The inorganic material to be used in the insulating layer 2 may be a mixture of them. Form the point of a high thermal conductivity, SiC, AlN, Si3N4, Al2O3 and so forth are desirable. Further, in the points of handling in the atmosphere and manufacturing cost of the inorganic material, Al2O3 is the most desirable.
A feature of the present embodiment is that an amount of moisture contained in the insulating layer 2 is less than 0.08 g/cm3. In the conventional structure described in Japanese Patent No. 3784341, since the insulating layer is formed under the room temperature environment, moisture which is present in the surroundings is adsorbed to, contained in the insulating layer and the volume resistivity of the insulating layer is lowered under the influence of the moisture contained therein. There is such a problem that the lower the volume resistivity is, the shorter becomes the short-circuit duration when a constant voltage has been continuously applied to the insulating layer, and the insulation reliability of the electronic circuit board cannot be ensured. On the other hand, in the present embodiment, the volume resistivity is increased by reducing the amount of moisture contained to less than 0.08 g/cm3 and the insulation reliability can be improved.
In the present embodiment, a process of forming the insulating layer 2 on the front surface of the metal material 1 by the aerosol deposition method will be described. A configurational explanatory diagram of an aerosol deposition device is shown in
Moisture which has been adhered to a chamber inner wall, moisture contained in the carrier gas, moisture which has been adhered to raw material particles remain in the vacuum chamber. In a case where this remaining moisture has adsorbed to the front surface of the insulating layer which is being formed, the moisture remains in the insulating layer. In order to reduce the moisture in the insulating layer, it is necessary to prevent adsorption of the moisture by heating the metal material which forms the insulating layer or the front surface of the insulating layer which is being formed. As methods therefor, there are, for example, irradiation of the insulating layer front surface with microwaves, heating of the metal material and the carrier gas by a heater and so forth. Since the vacuum chamber is under reduced pressure, a heating temperature may be not more than 100° C. which is the boiling point of water in the atmosphere. For example, in a case where the pressure in the vacuum chamber during formation of the insulating layer is several ten to several hundred Pa, it is possible to remove the moisture by setting the heating temperature to at least about 50° C. In addition, in a case where it is necessary to perform moisture removal in a short period of time, the heating temperature may be set to at least 100° C. At this time, film peeling caused by oxidation and thermal stress on the metal surface can be prevented by setting the heating temperature to not more than 150° C.
A relationship between the moisture content and the volume resistivity of the insulating layer 2 of the electronic circuit board fabricated in the present embodiment is evaluated. The relationship among the heating temperature of the metal material, the moisture content and the volume resistivity of the insulating layer 2 is shown in Table 1.
For the moisture content, an H amount H is measured by secondary ion mass spectrometry and the H amount is converted into the moisture (H2O) amount. In measurement of the H amount, in order to avoid the influence of the moisture adhered to the front surface of the insulating layer 2, a measurement point is etched off by about 500 nm by ion sputtering treatment and thereafter measurement of 3 μm is performed in a film thickness direction of the insulating layer 2. Cs+ ions of 5.0 kV in accelerating voltage are used as primary ions. A measuring region is 39 μm×39 μm. In addition, for measurement of the volume resistivity of the insulating layer 2, a circular electrode of 15 mm in diameter is formed on the insulating layer 2 with silver paste. A DC voltage of 100V is applied between the electrode and the metal material 1 and an electric resistance value is calculated from a current value obtained one minute after voltage application at which the current value is stabilized. A measurement temperature is 85° C. The volume resistivity is converted from this electric resistance value, an electrode area, a thickness of the insulating layer. In formation of the insulating layer, the insulating layer of 20 μm in film thickness is formed by the aerosol deposition method using normal soda easily sinterable Al2O3 particles of 2.5 μm in central particle diameter. The carrier gas is N2 and a gas flow rate is 4 L/min. For the metal material, a plate-shaped tough-pitch copper of 3 mm in thickness is used. As a method of removing the moisture, heating of the metal material is performed in formation of the insulating layer. Heating temperatures are 50° C., 75° C., 100° C., 125° C. In a conventional structure that the insulating layer is formed at room temperatures, the moisture amount is 0.11 g/cm3, the volume resistivity is 1.4×107 Ω·m. On the other hand, in the present embodiment that the metal material is heated, the amount of moisture is less than 0.11 g/cm3. In particular, for the amount of moisture of not more than 0.08 g/cm3, it is confirmed that the volume resistivity is at least 1.0×108 Ω·m, the insulating layer of the present embodiment is increased by about one digit in volume resistivity and is improved in insulation reliability in comparison with the conventional structure.
An example of a semiconductor device using the electronic circuit board in the present embodiment is shown in
In the electronic circuit board in the present embodiment, in addition to improvement of the insulation reliability of the semiconductor device, a heat dissipation characteristic of the semiconductor device is improved and thereby operational reliability of the semiconductor element is also improved. In the insulating layer (1.4×107 Ω·m in volume resistivity) of the conventional structure, in a case where the insulation resistance of the insulating layer of, for example, at least 108 Ω is needed, the film thickness of 710 μm is needed (assuming that a formation area of the insulating layer is 1 cm2). However, in the present embodiment, since the volume resistivity is increased (1.0×108 Ω·m in volume resistivity), the insulation resistance of 108 Ω can be realized with the film thickness of 100 μm. Since the necessary film thickness is reduced to not more than 1/7 and the thermal resistance of the insulating layer is also reduced to not more than 1/7 in comparison with the conventional structure, the heat dissipation characteristic of the semiconductor device is improved.
Another example of the semiconductor device using the electronic circuit board in the present embodiment is shown in
Low specific resistance and a thickness for lowering the electric resistance and reducing losses caused by Joule heat are required for a metal conductor plate 8 used in the power module. The thickness of a metal conductor has an effect of not only lowering the electric resistance but also diffusing generated heat of the semiconductor element in the metal conductor plate 8 and then making a heat flux which flows to the metal material small, and also contributes to reduction in thermal resistance of the semiconductor device. In the power module, use of a conductor of several 100 μm to several mm in thickness, not more than 3 μΩ·cm which is the same as an Al alloy plate material in specific resistance is desirable from the viewpoint of a working current and diffusion of the generated heat. In order to realize such a conductor, in the example shown in
As resins for the resin layer 7, epoxy resins, phenol resins, fluorine-based resins, silicon resins, polyimide resins, polyamide resins, polyamide-imide resins and so forth are given. As an application method for the resin layer 7, any of well-known methods such as the screen printing method, an inkjet method, a roll coater method, a dispenser method and so forth can be used. In addition, the resin layer 7 may be formed by arranging a sheet-shaped resin between the insulating layer 2 and the metal conductor plate 8 and making them adhere together by thermo-compression bonding. Thickness control of the resin layer 7 is facilitated by using the sheet having a desired thickness. In addition, the resin layer 7 may contain insulating inorganic particles of Al2O3, AlN, SiO2 and so forth as fillers. By containing the inorganic particles, the thermal conductivity of the resin layer 7 is improved. When the thermal conductivity of the resin layer 7 is improved, temperature rising of the semiconductor element which is in operation can be suppressed and therefore the operational reliability of the semiconductor device is improved.
The semiconductor element 5 is connected to the metal conductor plate 8 via the joining member 4. As the semiconductor element 5, the power semiconductor elements such as the IGBT and so forth for converting a DC current to an AC current by a switching operation, and a semiconductor element for use in a control circuit for controlling these power semiconductor elements are given. In addition, as the joining member 4, the solder of Pb—Sn system, Sn—Cu system, Sn—Ag—Cu system and so forth, the metals such as Ag and so forth and the metal filler containing resins and so forth are given. The upper surface of the semiconductor element 5 and the metal conductor plate 8 are connected together by the metal wire 6 such as Al and so forth. When the reliability in connection between the semiconductor element 5 and the metal wire 6 is insufficient under the influence of the thermal stress generated by heat generation and cooling of the semiconductor element, the metal ribbon such as Al, Cu and so forth with which the connection area can be expanded may be used, in place of the metal wire 6. An external connection terminal 9 is connected to the metal conductor plate 8. A resin case 10 is adhered around the metal plate 1 and a sealing agent 11 such as an insulating gel agent and so forth is packed into it.
Incidentally, the present invention is not limited to the abovementioned embodiment and various altered examples are included therein. For example, the abovementioned embodiment has been described in detail in order to comprehensibly describe the present invention and it is not necessarily limited to the ones which possess all of the described configurations. In addition, it is also possible to replace part of a configuration of one embodiment with a configuration of another configuration, and, in addition, it is also possible to add a configuration of another embodiment to a configuration of one embodiment. In addition, it is possible to perform addition, deletion, and replacement of another configuration in regard to part of a configuration of each embodiment.
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/JP2013/072044 | 8/19/2013 | WO | 00 |
