Patent Application
20240212929
The present invention relates to an electronic component and a mounting method and a mounting structure thereof.
With the miniaturization of electronic devices such as mobile phones and increasing speeds of CPUs, demands for multilayer ceramic capacitors (MLCC) are increasing.
As such multilayer ceramic capacitors, for example, Japanese Unexamined Patent Application Publication No. 2020-61537 discloses a multilayer ceramic electronic component which includes a ceramic body including dielectric layers and first and second internal electrodes stacked so as to be alternately exposed to the first and second outsides across the dielectric layers, and first and second external electrodes provided on the first and second outsides of the ceramic body so as to be connected to corresponding internal electrodes among the first and second internal electrodes, respectively, in which each of the first and second external electrodes includes first and second base electrode layers in contact with the first and second outer sides of the ceramic body, first and second nickel plated layers that cover the first and second base electrode layers, respectively, and first and second tin plated layers that cover the first and second nickel plated layers, respectively, and the center portion of each of the first and second tin plated layers has a thickness of greater than 5 μm.
In multilayer ceramic electronic components in each of which copper is contained in the (first and second) base electrode layers among the external electrodes, copper contained in the base electrode layers is likely to diffuse into the tin plated layer, and copper disappears from the base electrode layers at the time of joining to the land of the circuit board, such that mounting failure may occur. In this respect, in each of the multilayer ceramic electronic components of Japanese Unexamined Patent Application Publication No. 2020-61537, providing a nickel plated layer to cover the base electrode layer causes diffusion of copper from the base electrode layer to hardly occur.
However, even when a nickel plated layer is provided to cover the base electrode layer, in the reflow step of heating the solder on the circuit board to join the electronic components to the circuit board, when the joining temperature becomes high or exposure to a high temperature environment is lengthened, mounting defects may occur due to diffusion of nickel atoms contained in the nickel plated layer into the solder. Therefore, the multilayer ceramic electronic components described in Japanese Unexamined Patent Application Publication No. 2020-61537 still have room for improvement in heat resistance of the external electrode.
Example embodiments of the present invention provide electronic components each including external electrodes having excellent heat resistance and effective reduction or prevention of whisker generation due to thermal shock, and a mounting method and a mounting structure thereof.
According to an example embodiment of the present invention, an electronic component includes a base body including internal electrodes embedded therein, first and second main surfaces opposed to each other in a thickness direction, first and second lateral surfaces opposed to each other in a width direction orthogonal or substantially orthogonal to the thickness direction, and first and second end surfaces opposed to each other in a length direction orthogonal or substantially orthogonal to both the thickness direction and the width direction, and a pair of external electrodes respectively on the first and second end surfaces of the base body and respectively connected to the internal electrodes, in which the pair of external electrodes each include at least a Ni plated layer, and a Cu6Sn5 portion provided directly on the Ni plated layer or indirectly on the Ni plated layer via a Cu intervening portion with an island shape or a layered structure.
According to the example embodiments of the present invention, it is possible to provide electronic components each including external electrodes having excellent heat resistance and effective reduction or prevention of whisker generation due to thermal shock, and mounting methods and mounting structures thereof.
The above and other elements, features, steps, characteristics and advantages of the present invention will become more apparent from the following detailed description of the example embodiments with reference to the attached drawings.
Hereinafter, example embodiments of the present invention (hereinafter, referred to as “the present example embodiment”) will be described with reference to the drawings. The present invention is not limited to the example embodiments described hereinafter, and various modifications can be made without departing from the gist of the present invention.
Hereinafter, electronic components according to an example embodiment of the present invention will be described with reference to the drawings. In the present example embodiment, a multilayer ceramic capacitor will be described as an example of an electronic component. A normal two-terminal capacitor will be described as an example in the present example embodiment. However, the present invention is not limited thereto. Example embodiments of the present invention can be applied not only to a multilayer ceramic capacitor, but also to a multilayer LC filter including a coil and a capacitance, a multilayer ceramic inductor, and a multilayer ceramic thermistor. Example embodiments of the present invention can be applied further to electrodes connected to various external electronic components such as a coil around which an electrically conductive wire is wound, and a module in which an electronic component is embedded in a resin.
The electronic component 1 of the present example embodiment includes a base body 10 including internal electrodes 16a and 16b embedded therein, first and second main surfaces 12a and 12b opposed to each other in the thickness direction T, first and second lateral surfaces 13a and 13b opposed to each other in the width direction W orthogonal or substantially orthogonal to the thickness direction T, and first and second end surfaces 14a and 14b opposed to each other in the length direction L orthogonal or substantially orthogonal to both the thickness direction T and the width direction W, and a pair of external electrodes 20a and 20b respectively on the first and second end surfaces 14a and 14b of the base body 10 and respectively connected to the internal electrodes 16a and 16b. Here, the external electrodes 20a and 20b include at least a Ni plated layer 21 and a Cu6Sn5 portion 23 provided directly on the Ni plated layer 21 or indirectly on the Ni plated layer 21 via a Cu intervening portion 22 with an island shape or a layered structure.
Examples of the multilayer ceramic capacitor serving as the electronic component 1 of the present example embodiment include, as shown in
The base body 10 includes a plurality of ceramic layers 15 and the plurality of internal electrode layers 16a and 16b which are laminated therein. Further, the base body 10 includes a first main surface 12a and a second main surface 12b opposed to each other in the thickness direction T, a first lateral surface 13a and a second lateral surface 13b opposed to each other in the width direction W orthogonal or substantially orthogonal to the thickness direction T, and a first end surface 14a and a second end surface 14b opposed to each other in the length direction L orthogonal or substantially orthogonal to the thickness direction T and the width direction W. The dimensions of the base body 10 are not particularly limited. As shown in
The base body 10 is preferably rounded at corner portions and ridge portions of a rectangular parallelepiped. Here, the corner portion means a portion where three adjacent surfaces of the base body 10 intersect, and the ridge portion means a portion where two adjacent surfaces of the base body 10 intersect. Further, unevenness or the like may be provided in a portion or all of the first main surface 12a and the second main surface 12b, the first lateral surface 13a and the second lateral surface 13b, and the first end surface 14a and the second end surface 14b.
As shown in
The total number of the ceramic layers laminated in the base body 10 (including ceramic layers laminated in the inner layer portion 15b and the two outer layer portions 15a) is not particularly limited, but is preferably 15 pieces or more and 2000 pieces or less.
The outer dimension of the base body 10 is not particularly limited, but it is preferable that the dimension along the length direction L is about 0.08 mm or more and about 5.6 mm or less, the dimension along the width direction W is about 0.04 mm or more and about 4.9 mm or less, and the dimension along the thickness direction T is about 0.04 mm or more and about 2.9 mm or less, for example.
In a case in which each of the electronic components 1 is a multilayer ceramic capacitor, the ceramic layer 15 included in the base body 10 is preferably made of a dielectric material. Here, as the dielectric material, for example, a dielectric ceramic including a main component such as BaTiO3, CaTiO3, SrTiO3, or CaZrO3 can be used. In a case in which the dielectric material is contained as a main component, depending on the desired characteristics of the base body 10, for example, a subcomponent having a content smaller than that of the main component such as a Mn compound, an Fe compound, a Cr compound, a Co compound, or a Ni compound may be added.
Further, in a case in which each of the electronic components 1 is a thermistor element, the ceramic layer 15 included in the base body 10 is preferably made of semiconductor ceramic. Here, as the semiconductor ceramic material, for example, a spinel ceramic material can be used.
Further, in a case in which each of the electronic components 1 is an inductor element, the ceramic layer 15 included in the base body 10 is preferably made of magnetic ceramic. Here, as the magnetic ceramic material, for example, a ferrite ceramic material can be used. In this case, the internal electrodes 16a and 16b of the base body 10 are preferably made of a conductor having a coiled shape.
The thickness of each of the ceramic layers 15 included in the base body 10 is not particularly limited, but is preferably about 0.4 μm or more and about 20 μm or less, for example.
In the base body 10 shown in
Here, as shown in
Further, each of the second internal electrode layers 16b includes a second counter electrode portion 17b opposed to the first internal electrode layer 16a, and a second extension electrode portion 18b that defines and functions as one end (the other end) of each of the second internal electrode layers 16b, is adjacent to the second end surface 14b of the base body 10, and extends from the second counter electrode portion 17b to the second end surface 14b of the base body 10. The end portion of each of the second extension electrode portions 18b is exposed at the second end surface 14b, and is connected to the second external electrode 20b described later.
In the base body 10, as shown in
Each of the internal electrode layers 16 may be made of an appropriate conductive material such as a metal such as Ni, Cu, Ag, Pd, or Au, or an alloy including at least one of these metals such as an Ag—Pd alloy. Each of the internal electrode layers 16 may further include dielectric particles having the same composition as the ceramics contained in the ceramic layer 15.
The thickness of each of the internal electrode layers 16 is not particularly limited, but is preferably about 0.3 μm or more and about 2.0 μm or less, for example. Further, the total number of the internal electrode layers 16a and 16b is preferably equal or substantially equal to the total number of the ceramic layers, and more specifically, it is preferably in the range of 15 pieces or more and 2000 pieces or less.
As shown in
More specifically, the first external electrode 20a is provided at least on the surface of the first end surface 14a of the base body 10. In the example embodiment shown in
Further, the second external electrode 20b is provided at least on the surface of the second end surface 14b of the base body 10. In the example embodiment shown in
In the base body 10, each of the first counter electrode portions 17a of the first internal electrode layers 16a and each of the second counter electrode portions 17b of the second internal electrode layers 16b are opposed to each other with a respective one of the ceramic layers 15 interposed therebetween, such that capacitance is provided. Therefore, capacitance can be obtained between the first external electrode 20a to which each of the first internal electrode layers 16a is connected and the second external electrode 20b to which each of the second internal electrode layers 16b is connected, such that characteristics of the capacitor are developed.
One or both of the first external electrode 20a and the second external electrode 20b include at least the Ni plated layer 21 and the Cu6Sn5 portion 23 provided directly on the Ni plated layer 21 or indirectly via the Cu intervening portion 22 with an island shape or a layered structure. Here, the Ni plated layer 21 is preferably on the surface of the base body 10 with a base electrode layer 25 interposed therebetween. The Sn plated layer 24 is preferably on the surface of the Cu6Sn5 portion 23.
That is, in the electronic component of the present example embodiment, for example, as shown in
The base electrode layer 25 of the external electrode 20 has electrical conductivity and covers the first end surface 14a or the second end surface 14b of the base body 10. Here, it is preferable that the base electrode layer 25 is on the first end surface 14a or the second end surface 14b of the base body 10, and extends from the first end surface 14a or the second end surface 14b to cover a portion of each of the first main surface 12a, the second main surface 12b, the first lateral surface 13a, and the second lateral surface 13b.
Examples of the base electrode layer 25 include a layer including electrically conductive metal and glass. Examples of the electrically conductive metal included in the base electrode layer 25 include a metal such as Cu, Ni, Ag, Pb and Au, and an alloy such as a Ag—Pb alloy. Further, examples of the glass included in the base electrode layer 25 include a glass including one or more components selected from B, Si, Pd, Ba, Mg, Al, and Li, for example. The base electrode layer 25 may include a plurality of layers. The base electrode layer 25 may be provided by applying an electrically conductive paste including a glass and an electrically conductive metal to the base body 10 and firing the resulting product. More specifically, the base electrode layer 25 may be fired at the same time as the ceramic layer 15 and the internal electrode layer 16, or may be fired after firing the ceramic layer 15 and the internal electrode layer 16. The thickest portion of the base electrode layer 25 preferably has the thickness of about 10 μm or more and about 150 μm or less, for example.
The Ni plated layer 21 is on the end surface of the base body 10 directly or with the base electrode layer 25 interposed therebetween. It is more preferable that the Ni plated layer 21 is on the surface of the base electrode layer 25 which is on the first end surface 14a or the second end surface 14b of the base body 10 and extends from the first end surface 14a or the second end surface 14b to reach the first main surface 12a, the second main surface 12b, the first lateral surface 13a, and the second lateral surface 13b.
With such a configuration in which the Ni plated layer 21 is on the external electrode 20, it is possible to prevent each of the internal electrode layers 16 and the base electrode layer 25 from being eroded by the solder used in the reflow process when the electronic component 1 is mounted on the circuit board.
The thickness of the Ni plated layer 21 is not particularly limited, but is preferably about 1 μm or more and about 15 μm or less, for example.
The Cu intervening portion 22 is provided on the surface of the Ni plated layer 21 in various manners. Here, it is preferable that the Cu intervening portion 22 is a single intervening portion including a Cu3Sn portion 26 with an island shape or a layered structure on the Ni plated layer 21, or a composite intervening portion in which a Cu portion 27 including Cu with an island shape or a layered structure and the Cu3Sn portion 26 including Cu3Sn with the island shape or the layered structure are sequentially provided on the Ni plated layer 21.
That is, the Cu intervening portion may be a single intervening portion including a Cu3Sn portion 26C with an island shape on the Ni plated layer 21.
Further, the Cu intervening portion may be a composite intervening portion in which a Cu portion 27E including the Cu in an island shape and a Cu3Sn portion 26E including the Cu3Sn in an island shape are sequentially provided on the Ni plated layer 21.
Here, the Cu portion of the composite intervening portion in the Cu intervening portion 22 may have a layered structure as shown in the Cu portion 27G of
By providing such a Cu intervening portion 22, the generation of whiskers due to thermal shock (for example, thermal shock test under conditions of −55° C. to +125° C. and 30 cycles) can be effectively reduced or prevented. More specifically, by providing the Cu portions 27E to 27G in the Cu intervening portions 22E to 22G, the Cu3Sn portions 26 can be stably provided in the Cu intervening portions 22E to 22G, such that the formation of whiskers can be effectively reduced or prevented.
In particular, when the Cu3Sn portion 26 of the Cu intervening portion 22 is in a layered structure, the thickness t2 of the Cu3Sn portion 26 is preferably about 120 nm or more and about 460 nm or less, and more preferably about 160 nm or more and about 460 nm or less, for example. By setting the thickness t2 of the Cu3Sn portion 26 within this range, the Cu3Sn portion 26 having a higher density than the Cu6Sn5 portion 23 is generated and the compressive stress generated in the Sn plated layer 24 is reduced, such that the formation of whiskers can be reduced or prevented more effectively.
The Cu6Sn5 portion 23 is provided directly or indirectly on the Ni plated layer 21 via the Cu intervening portion 22. Since the electronic component 1 according to the present example embodiment includes the external electrode in which the Cu6Sn5 portion 23 is provided directly or indirectly on the Ni plated layer 21, the diffusion of the nickel atoms from the Ni plated layer 21 is prevented by the Cu6Sn5 portion 23 during the reflow step of joining the electronic component 1 to the circuit board by heating the solder on the circuit board, such that the heat resistance of the external electrode can be improved. As a result, it is possible to make mounting defects less likely to occur when the electronic component 1 is joined to the circuit board.
The Cu6Sn5 portion 23 has a layered structure and is on the Ni plated layer 21, or is dispersed on the Ni plated layer 21. Among them, the Cu6Sn5 portion 23 preferably has a layered structure. With such a configuration, the heat resistance of the external electrode 20 can be improved. Further, by increasing the smoothness of the surface of the Cu6Sn5 portion 23, even when the Sn plated layer 24 described later is provided, it is possible to prevent the occurrence of a stress gradient of compressive stress in the Sn plated layer 24 due to the growth of Cu6Sn5 along the grain boundary of Sn. As a result, the growth of whiskers can be reduced or prevented more effectively. The Cu6Sn5 portion 23 may include other components in addition to Cu6Sn5 as an additive component, and the form in which the additive component is present is not limited.
The thickness t1 of the Cu6Sn5 portion 23 is not particularly limited, but can be, for example, about 300 nm or more and about 620 nm or less, and preferably about 400 nm or more and about 620 nm or less, for example. Here, the thickness t1 of the Cu6Sn5 portion 23 may be larger than the thickness t2 of the Cu3Sn portion 26 of the Cu intervening portion 22, or may be smaller than the thickness t2 of the Cu3Sn portion 26.
The Sn plated layer 24 is on the Cu6Sn5 portion 23 and is on the outermost layer of the external electrode 20. In particular, by providing the Sn plated layer 24 on the outermost layer of the external electrode 20, when the electronic component 1 is mounted on the land of the circuit board, wettability with respect to solder used for mounting is improved, such that the electronic component 1 can be mounted on the circuit board more easily.
The Sn plated layer 24 covers the Cu6Sn5 portion 23. Here, it is preferable that the Sn plated layer 24 on the first external electrode 20a is on the surface of the Cu6Sn5 portion 23 along the first end surface 14a, and further reaches the surfaces of the Cu6Sn5 portion 23 along the first main surface 12a, the second main surface 12b, the first lateral surface 13a, and the second lateral surface 13b. Further, it is preferable that the Sn plated layer 24 on the second external electrode 20b is on the surface of the Cu6Sn5 portion 23 along the second end surface 14b, and further reaches the surfaces of the Cu6Sn5 portion 23 along the first main surface 12a, the second main surface 12b, the first lateral surface 13a, and the second lateral surface 13b.
The thickness t1 of the Cu6Sn5 portion 23 and the thickness t2 of the Cu3Sn portion 26 can be measured, for example, by performing element mapping for the cross section including the thickness direction of the external electrode 20 using an Analytical instrument: Scanning electron microscope (FE-SEM/EDX, FE-SEM: SU8230/EDX: 5060FQ, available from Hitachi High-Tech Corporation), under magnification: 10000 times. More specifically, the Cu6Sn5 portion 23 and the Cu3Sn portion 26 are distinguished by changing the color tone by element mapping, and when they can be distinguished, the cross-sectional areas of the portions occupied by the Cu6Sn5 portion 23 and the Cu3Sn portion 26 are calculated. Then, the average thickness of the Cu6Sn5 portion 23 can be calculated by dividing the cross-sectional area of the obtained Cu6Sn5 portion 23 by the width along the extending direction of the Cu6Sn5 portion 23 (when the Cu6Sn5 portion 23 has an island shape, the width of the void portion is excluded). Further, the average thickness of the Cu3Sn portion 26 can be calculated by dividing the cross-sectional area of the obtained Cu3Sn portion 26 by the width along the extending direction of the Cu3Sn portion 26 (when the Cu3Sn portion 26 has an island shape, the width of the void portion is excluded).
The thickness of the Sn plated layer 24 is not particularly limited, but is preferably about 1 μm or more and about 15 μm or less, for example.
The electronic component 1 of the present example embodiment preferably has a chip size ranging from 01 size to 32 size, for example. Among them, the 01 size has dimensions of 0.25 mm (length direction L)×0.125 mm (width direction W). The 02 size has dimensions of 0.4 mm (length direction L)×0.2 mm (width direction W). The 03 size has dimensions of 0.6 mm (length direction L)×0.3 mm (width direction W). The 15 size has dimensions of 1.0 mm (length direction L)×0.5 mm (width direction W). The 18 size has dimensions of 1.6 mm (length direction L)×0.8 mm (width direction W). The 31 size has dimensions of 3.2 mm (length direction L)×1.6 mm (width direction W). The 32 size has dimensions of 3.2 mm (length direction L)×2.5 mm (width direction W). Therefore, the dimension of the electronic component 1 along the length direction L is preferably about 0.25 mm or more and about 3.2 mm or less, for example. The dimension of the electronic component 1 along the width direction W is preferably about 0.125 mm or more and about 2.5 mm or less, for example. The dimension of the electronic component 1 along the thickness direction T is not particularly limited, but may be, for example, about 0.125 mm or more and about 2.5 mm or less.
Hereinafter, an example of a method of manufacturing the electronic component 1 of the present example embodiment will be described by exemplifying a method of manufacturing the multilayer ceramic capacitor serving as the electronic component 1 shown in
First, a ceramic green sheet for forming the ceramic layer 15, an internal electrode conductive paste for forming the internal electrode layer 16, and a base electrode layer conductive paste for forming the base electrode layer 25 of the external electrode 20 are prepared. Here, the ceramic green sheet, the conductive paste for internal electrode, and the conductive paste for base electrode layer include organic binders and organic solvents, and known organic binders and organic solvents can be used. As the conductive paste for the base electrode layer, a paste including glass and other materials in addition to metal is used.
Then, for example, the internal electrode conductive paste is printed on the ceramic green sheet in a predetermined pattern to form an internal electrode pattern on the ceramic green sheet. The internal electrode conductive paste can be printed by a well-known method such as screen printing or gravure printing.
Next, one or a plurality of ceramic green sheets are laminated on the internal electrode pattern in the thickness direction T to form a layer serving as a base of the ceramic layer 15, and an internal electrode pattern is formed by printing an internal electrode conductive paste thereon. After repeating this process over a predetermined number of times, a plurality of ceramic green sheets are laminated in the thickness direction T to form a layer serving as a base of the outer layer portion 15a, thereby manufacturing a multilayer block. If desired, the multilayer block may be crimped along the thickness direction T by means of a hydrostatic press or the like.
Then, the multilayer block is cut to have a predetermined size, such that multilayer body chips are cut out. At this time, the ridge portions and the corner portions of the multilayer body chips may be rounded by barrel polishing or the like. Thereafter, the cut-out multilayer body chip is fired to form the base body 10. The firing temperature of the multilayer body chip depends on the ceramic material and the internal electrode conductive paste material, but is preferably about 900° C. or higher and about 1300° C. or lower, for example.
Next, the first external electrode 20a is formed on the first end surface 14a of the base body 10, and the second external electrode 20b is formed on the second end surface 14b of the base body 10.
First, the base electrode layer 25 is formed on the surface of the base body 10 including the first end surface 14a and the second end surface 14b by applying and firing an electrically conductive paste for the base electrode layer on the surface of the fired base body 10 including the first end surface 14a and the second end surface 14b. The firing temperature at the time of forming the base electrode layer 25 is preferably about 700° C. or more and about 900° C. or less, for example. The conductive paste for the base electrode layer may be fired before forming the Cu plated layer and the Sn plated layer 24 after forming the Ni plated layer 21. The conductive paste used for forming the base electrode layer 25 may include metallic particles including Cu or metallic particles including Ni. On the other hand, when the multilayer body chip is fired to obtain the base body 10, the base electrode layer 25 may be formed on the surface of the obtained base body 10 by firing this electrically conductive paste together with the multilayer body chip.
Next, the Ni plated layer 21, the Cu plated layer, and the Sn plated layer 24 are sequentially formed on the base electrode layer 25, and then heat treatment is performed, such that a portion or all of the Cu plated layer formed on the Ni plated layer 21 is changed to the Cu6Sn5 portion 23 or to the Cu intervening portion 22 with an island shape or a layered structure and the Cu6Sn5 portion 23. Here, the temperature and time of the heat treatment when a portion or all of the Cu plated layer is changed to the Cu6Sn5 portion 23 may be about 120 C or more and about 170° C. or less, and may be about 30 minutes or more and about 5 hours or less, for example. Preferably, the temperature can be about 140° C. or more and about 160° C. or less and about 1 hour or more and about 2 hours or less, for example. At this time, the Cu plated layer can be changed to the Cu6Sn5 portion 23 through the Cu3Sn by adjusting the thicknesses and heating conditions of the Cu layer and the Sn layer, but the Cu intervening portion 22 having the Cu3Sn portion 26 and the Cu portion 27 may be formed in addition to the Cu6Sn5 portion 23.
Here, the formation of the Ni plated layer 21, the Cu plated layer, and the Sn plated layer 24 is not particularly limited, and a well-known method can be used.
In addition, an unreacted portion of the Cu plated layer becomes a Cu portion 27 with an island shape or a layered structure. Further, the unreacted portion of the Sn layer becomes the Sn plated layer 24.
By performing as described above, the multilayer ceramic capacitor serving as the electronic component 1 is manufactured.
The electronic component 1 of the present example embodiment can be mounted on the land 40 of the circuit board 4 by a well-known reflow process in which the solder 5 is melted by heating to join to the circuit board.
Further, in the electronic component 1 of the present example embodiment, as described above, it is preferable to perform heat treatment in which the Cu plated layer is changed to the Cu6Sn5 portion 23 or the Cu intervening portion 22 in a state where the base electrode layer 25, the Ni plated layer 21, the Cu plated layer, and the Sn plated layer 24 are sequentially formed on the surface of the base body 10 including the first end surface 14a and the second end surface 14b in the land 40 of the circuit board 4, and the solder is provided between the Sn plated layer 24 and the land 40. As a result, the solder 5 on the surface of the land 40 is reflowed by the heat treatment, and by the heat at this time, a resulting product from the sequential formation of the base electrode layer 25, the Ni plated layer 21, the Cu plated layer, and the Sn plated layer 24 can be changed to the external electrode 20 in a desired configuration, such that the resulting electronic component 1 can be mounted on the land 40 of the circuit board 4, while the external electrode 20 has the desired characteristics when in use.
By adopting such a mounting method to the electronic component 1 of the present example embodiment, it is possible to provide a mounting structure in which the external electrode 20 having at least the Ni plated layer 21 and the Cu6Sn5 portion 23 provided directly on the Ni plated layer 21 or indirectly on the Ni plated layer 21 via the Cu intervening portion with an island shape or a layered structure is joined to the land 40 of the circuit board 4 by the solder 5.
The present invention will be described in more detail using the following examples of the present invention. However, the present invention is not limited to the following examples of the present invention.
For each of the electronic components 1, a multilayer ceramic capacitor was fabricated in accordance with the above-described manufacturing method, and the printed circuit board was reflow-mounted using Sn—Ag—Cu (SAC) solder. Here, the thickness and heat treatment condition of the Cu plated layer formed on the base electrode layer 25 were varied, and the shape of the Cu portion 27 was evaluated for each of the obtained electronic components 1, and the shape and thickness t2 of the Cu3Sn portion 26 (only in the case of a layered structure) and the thickness t1 of the Cu6Sn5 portion 23 were measured. Each of the obtained electronic components 1 was evaluated for heat resistance and presence or absence of whiskers.
The specifications of the examples of the multilayer ceramic capacitors each serving as the electronic component 1 are as follows.
On the other hand, the multilayer ceramic capacitor of Comparative Example 1 was configured in the same manner as each of the multilayer ceramic capacitors of Inventive Example 1 except that the Sn plated layer 24 was provided on the surface of the Ni plated layer 21 provided on the base electrode layer 25 on the surface of the base body 10 without providing the Cu plated layer. Here, the multilayer ceramic capacitor obtained in Comparative Example 1 did not include the Cu6Sn5 portion 23 and did not have the Cu3Sn portion 26 and the Cu portion 27.
The heat resistance of each of the electronic components 1 was evaluated under the following conditions. Each of the electronic components 1 obtained in Inventive Examples 1 to 10 of the present invention was subjected to a heat resistance test in which each of the electronic components 1 was left in a thermostatic chamber at 175° C. for 500 hours, and then the cross sections of a central portion of the external electrodes 20a and 20b along the thickness direction T and the width direction W were observed by a scanning electron microscope (FE-SEM/EDX) (FE-SEM: SU8230/EDX: 5060FQ available from Hitachi Hi-Tech Corporation). As a result, the presence of the Ni plated layer 21 was confirmed in each of the external electrodes 20a and 20b.
Here, when the Ni plated layer 21 is changed to a compound of Ni—Sn—Cu by the heat resistance test and the Ni plated layer 21 covering the base electrode layer 25 is lost, the coverage ratio of the Ni plated layer 21 with respect to the base electrode layer 25 decreases. In the portion of the base electrode layer 25 that is not covered with the Ni plated layer 21, the base electrode layer 25 and the Cu intervening portion 22 or the Cu6Sn5 portion 23 are brought into direct contact with each other, and the base electrode layer 25 and they may react with each other, such that heat resistance tends to decline. In view of the above, for each of the portions before and after the heat resistance test, the length was determined of the portion of the external electrode 20a at which the base electrode layer 25 and the Ni plated layer 21 are in contact with each other, which is shown in the cross section at the central portion along the thickness direction T and the width direction W. At this time, when the ratio of the area of the Ni plated layer 21 coated on the base electrode layer 25 after the heat resistance test (hereinafter, referred to as “the coverage area of the Ni plated layer 21 after the heat resistance test”) to the area of the Ni plated layer 21 coated on the base electrode layer 25 before the heat resistance test (hereinafter, referred to as “the coverage area of the Ni plated layer 21 before the heat resistance test”) was greater than about 95%, the ratio was evaluated as very good (indicated by bullseye symbol (⊙)). Further, when the ratio of the coverage area of the Ni plated layer 21 after the heat resistance test to the coverage area of the Ni plated layer 21 before the heat resistance test was in the range of more than about 80% and less than about 95%, the ratio was evaluated as good (indicated by circle symbol (∘)). In addition, when the ratio of the coverage area of the Ni plated layer 21 after the heat resistance test to the coverage area of the Ni plated layer 21 before the heat resistance test was less than about 80%, the ratio was evaluated as poor (indicated by cross symbol (x)). The results are shown in Table 1.
In the evaluation of the presence or absence of whisker formation on each of the electronic components 1, each of the electronic components 1 obtained from Inventive Examples 1 to 10 of the present invention was left in a thermostatic chamber at 30° C. for 4000 hours, and the presence or absence of whisker was examined by observing the central region except for the peripheral region of 5 mm from the edge of the plated layer with a magnification ratio of 1000 times using a SEM, cases where no whiskers were observed were evaluated as very good (indicated by bullseye symbol (⊙)), cases where the maximum value of the whisker size was less than 20 μm were evaluated as good (indicated by circle symbol (∘)), cases of a whisker having a maximum whisker size of 20 μm or more and less than 40 μm were evaluated as fair (indicated by triangle symbol (Δ)), and cases of a whisker having a maximum whisker size of 40 μm or more were evaluated as poor (indicated by cross symbol (x)).
None
X
X
From the results of Table 1, each of the electronic components 1 of Inventive Examples 1 to 10 of the present invention included the external electrode 20 including the Ni plated layer 21 and the Cu6Sn5 portion 23 provided directly on the Ni plated layer 21 or indirectly on the Ni plated layer 21 via the Cu intervening portion 22 with an island shape or a layered structure, and each of the results of the heat resistance was evaluated as “O”.
Accordingly, each of the electronic components 1 of Inventive Examples 1 to 10 of the present invention included the external electrode 20 having sufficient heat resistance.
On the other hand, in the electronic component of Comparative Example 1 in which the Cu6Sn5 portion 23 was not provided in the external electrode 20, the ratio of the coverage area of the Ni plated layer 21 after the heat resistance test to the coverage area of the Ni plated layer 21 before the heat resistance test was less than about 80%, and the heat resistance did not reach an acceptable level.
While example embodiments of the present invention have been described above, it is to be understood that variations and modifications will be apparent to those skilled in the art without departing from the scope and spirit of the present invention. The scope of the present invention, therefore, is to be determined solely by the following claims.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2021-145860 | Sep 2021 | JP | national |
This application claims the benefit of priority to Japanese Patent Application No. 2021-145860 filed on Sep. 8, 2021 and is a Continuation Application of PCT Application No. PCT/JP2022/033469 filed on Sep. 6, 2022. The entire contents of each application are hereby incorporated herein by reference.
| Number | Date | Country | |
|---|---|---|---|
| Parent | PCT/JP2022/033469 | Sep 2022 | WO |
| Child | 18598294 | US |
