This application claims the benefit under 35 USC 119(a) of Korean Patent Application No. 10-2015-0010657, filed on Jan. 22, 2015, in the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference for all purposes.
1. Field
The following description relates to an electronic component embedded printed circuit board and a method of manufacturing the same.
2. Description of Related Art
Mobile phones and other electronic apparatuses in the field of information technology have become increasingly multi-functional, lighter, thinner and smaller. A heightened demand exist to insert integrated circuits, semiconductor chips or various electronic elements, such as active devices and passive devices, in a board. Recently, various methods to embed a component in a board have been developed.
A printed circuit board (PCB) is an electrically non-conductive board having a circuit line pattern printed thereon with a conductive material, such as copper, onto which electronic elements are installed therein. In other words, a PCB refers to a circuit board in which mounting positions of various electronic components are defined and circuit patterns to connect these electronic components are printed and fixed thereon. The circuit patterns are used to receive or to install the various electronic components on the board, in a concentrated manner.
Recently, these electronic components are installed by being embedded in the PCB, which is generally referred to as an embedded PCB.
A typical embedded PCB has a trench formed in an insulation layer of the board and has various electronic components, integrated circuits and/or semiconductor chips inserted in the trench. The electronic components are stabilized and an additional insulation layer is formed by coating an adhesive resin, such as prepreg, inside the trench and on the insulation layer in which the electronic components are inserted. The electronic components are electrically connected with external device(s) through via holes or through-holes formed in the insulation layer.
The via holes or through-holes have a plated layer and pattern formed therein and thereabove for use as means for electrical connection with the electronic components embedded in the board. An electronic component embedded multilayered PCB is manufactured by successively laminating insulation layers on an upper surface and a lower surface of the board.
This Summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.
In accordance with an embodiment, there is provided a printed circuit board, including: a first insulation layer including a trench formed therein; an electronic component installed in the trench; a second insulation layer formed above the first insulation layer and the electronic component; and a circuit layer formed on the first insulation layer and on the second insulation layer.
The printed circuit board may further include: a via formed in the first insulation layer and the second insulation layer and configured to be connected with the electronic component and the circuit layer.
The printed circuit board may further include: a build-up layer laminated on a surface of the first insulation layer and the second insulation layer.
The first insulation layer and the second insulation layer may be made of a resin material including glass fiber impregnated therein.
The printed circuit board may further include: a heat-dissipating plate formed in the first insulation layer.
The heat-dissipating plate may be formed by filling a metallic material including a height similar to a height of the electronic component
The heat-dissipating plate may be simultaneously formed when the trench may be formed to embed the electronic component.
The circuit layer may be formed on an external surface of the first insulation layer and on an external surface of the second insulation layer.
In accordance with an embodiment, there is provided a method of manufacturing a printed circuit board, including: forming a metal layer on both surfaces of a carrier member; forming a first metal block by etching the metal layer excluding an area thereof in which an electronic component may be to be installed; forming a first insulation layer to embed the first metal block; separating the carrier member; and forming a trench by etching the first metal block formed on one surface of a laminate separated from the carrier member.
The method may further include: forming a second insulation layer to embed the electronic component; forming a via hole by drilling the first and second insulation layers having the electronic component embedded therein; and forming a circuit layer by filling a metallic material in the via hole and patterning the metallic material.
The forming of the first insulation layer further may include forming a metal layer on both surfaces of the first insulation layer after the first insulation layer may be formed.
The metal layer may be made of copper.
The method may further include: forming a build-up structure by forming an insulation layer and a circuit layer above and below the first and second insulation layers.
A thickness of the metal layer formed on both surfaces of the substrate may correspond to a height of the electronic component.
The method may further include: forming areas in which electronic components are to be installed.
The forming of the metal block further may include forming a heat-dissipating plate.
In the forming of the metal block, the first metal block may be formed through one of a subtractive process, an additive process, which uses electroless copper plating and electrolytic copper plating, and a semi-additive process (SAP).
Other features and aspects will be apparent from the following detailed description, the drawings, and the claims.
Throughout the drawings and the detailed description, the same reference numerals refer to the same elements. The drawings may not be to scale, and the relative size, proportions, and depiction of elements in the drawings may be exaggerated for clarity, illustration, and convenience.
The following detailed description is provided to assist the reader in gaining a comprehensive understanding of the methods, apparatuses, and/or systems described herein. However, various changes, modifications, and equivalents of the methods, apparatuses, and/or systems described herein will be apparent to one of ordinary skill in the art. The sequences of operations described herein are merely examples, and are not limited to those set forth herein, but may be changed as will be apparent to one of ordinary skill in the art, with the exception of operations necessarily occurring in a certain order. Also, descriptions of functions and constructions that are well known to one of ordinary skill in the art may be omitted for increased clarity and conciseness.
The features described herein may be embodied in different forms, and are not to be construed as being limited to the examples described herein. Rather, the examples described herein have been provided so that this disclosure will be thorough and complete, and will convey the full scope of the disclosure to one of ordinary skill in the art.
Unless otherwise defined, all terms, including technical terms and scientific terms, used herein have the same meaning as how they are generally understood by those of ordinary skill in the art to which the present disclosure pertains. Any term that is defined in a general dictionary shall be construed to have the same meaning in the context of the relevant art, and, unless otherwise defined explicitly, shall not be interpreted to have an idealistic or excessively formalistic meaning.
Terms such as “first” and “second” can be used in describing various elements, but the above elements shall not be restricted to the above terms. The above terms are used only to distinguish one element from the other. In the accompanying drawings, some elements may be exaggerated, omitted or briefly illustrated, and the dimensions of the elements do not necessarily reflect the actual dimensions of these elements.
The first insulation layer 110 has the trench 112 formed therein such that the electronic component 120 is installed therein. In this example, the first insulation layer 110 is made of a thermosetting or thermoplastic polymer material, a ceramic, an organic or inorganic composite material, or any resin having glass fiber impregnated therein. In an example in which the first insulation layer 110 is made of a polymer resin, the polymer resin includes an epoxy insulation resin, for example, flame retardant 4 (FR-4), bismaleimide triazine (BT) or an ajinomoto build-up film (ABF). Alternatively, the polymer resin includes a polyimide resin.
In this example, in embedding the electronic component 120 in the first insulation layer 110, after the trench 112 is formed in the first insulation layer 110 using a common circuit forming method, the electronic component 120 is installed. The second insulation layer 115 is then formed and laminated such that the electronic component 120 is embedded within the trench 112. The first insulation layer 110 and the second insulation layer 115 are formed in two layers and are made of a same material or different materials.
Moreover, each of the first insulation layer 110 and the second insulation layer 115 has a via 132, which penetrates in a thickness direction, and a micro via 131, to connect with an electrode of the embedded electronic component 120, formed therein using a YAG laser or a CO2 laser.
The circuit layer 130 is formed using a subtractive process, which uses an etching resist to selectively remove a metallic material formed on an external surface of the first insulation layer 110 and the second insulation layer 115, an additive process, which uses electroless copper plating and electrolytic copper plating, a semi-additive process (SAP), or a modified semi-additive process (MSAP).
The electronic component 120 has an electrode formed on an outer portion of a top surface thereof and on an outer portion of a bottom surface thereof to electrically connect to the circuit layer 130.
The electronic component 120 may be an active device, such as a transistor, an integrated circuit (IC), or a large scale integrated circuit (LSI). The electronic component 120 may be a passive device, such as a resistor, a capacitor, or an inductor.
Descriptions of any elements that are identical with those of the first example shown in
The heat-dissipating plate 430 is simultaneously formed when a trench 112 is formed using a common circuit forming method in order to embed the electronic component 420. For instance, after a metal block is formed by etching a metal layer that is thickly coated on a carrier member, in order to embed the electronic component, the first insulation layer 410 is coated. Then, the trench 112 is formed by etching the metal block, and the unetched metal block is embedded in the first insulation layer 410 to be formed as the heat-dissipating plate 430.
In an example, the size of the heat-dissipating plate 430 corresponds to the size of the metal block and, in one example, is made of copper, however, other materials may be used, such as any metal having a good heat-dissipating property.
For example, the fifth example has a third insulation layer 550 and a second circuit layer 560 formed therein in addition to the two-layer structure of the fourth example. The sixth example has a fourth insulation layer 670 and a third circuit layer 680 formed therein in addition to the structure of the fifth example. Accordingly, the electronic component embedded printed circuit board, according to an embodiment, may be built up from two layers to four layers and six layers or from three layers to five layers and seven layers. In an example, build-up layers are not restricted to the examples described herein and may be additionally formed as needed.
As illustrated in
Hereinafter, each of the processes used in the method of manufacturing an electronic component embedded printed circuit board according to this embodiment will be further described. In one example, the electronic component embedded printed circuit board used in this example is shown in
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An outer circuit layer 130 is formed by filling a metallic material in the micro via 131 and the through-via 132. In this example, the outer circuit layer 130 is formed through a semi-additive process (SAP) or a modified semi-additive process (MSAP). Moreover, the various embodiments are not limited to the above-described processes, and it is possible to apply a common circuit forming process, including a subtractive process, the SAP or the MSAP.
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A metal block 21 is formed by etching the metal layer 20 at a location according to a size of the heat-dissipating plate 430 and a location corresponding to where the electronic component 420 is to be received or installed. In an example, the metal block 21 is formed using a subtractive process, which uses an etching resist to selectively remove a metallic material, an additive process, which uses electroless copper plating and electrolytic copper plating, or a semi-additive process (SAP). That is, the common circuit forming method of etching process is used to remove the metal layer 20, excluding an area where the electronic component 420 is to be received or installed.
A first insulation layer 410 and the metal foil layer 31 are formed on the substrate having the metal block 21 formed thereon. The first insulation layer 410 is formed by laminating a prepreg.
Then, an upper plate and a lower plate are separated from the detachable core substrate 10. The following description will be based on the lower plate.
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Then, a micro via hole and a through-via hole are formed by drilling the first insulation layer 410 and the second insulation layer 415 such that both electrodes of the electronic component 420 are exposed. In this example, the via holes are formed in the insulation layers 410, 415 using a YAG laser or a CO2 laser.
An outer circuit layer 440 is formed by filling a metallic material in the micro via hole and the through-via hole. In this example, the outer circuit layer 440 is formed through a semi-additive process (SAP) or a modified semi-additive process (MSAP). Moreover, the various embodiments are not limited to the above-described processes, and it is possible in the alternative to apply a common circuit forming process, including a subtractive process, the SAP or the MSAP.
While this disclosure includes specific examples, it will be apparent to one of ordinary skill in the art that various changes in form and details may be made in these examples without departing from the spirit and scope of the claims and their equivalents. The examples described herein are to be considered in a descriptive sense only, and not for purposes of limitation. Descriptions of features or aspects in each example are to be considered as being applicable to similar features or aspects in other examples. Suitable results may be achieved if the described techniques are performed in a different order, and/or if components in a described system, architecture, device, or circuit are combined in a different manner, and/or replaced or supplemented by other components or their equivalents. Therefore, the scope of the disclosure is defined not by the detailed description, but by the claims and their equivalents, and all variations within the scope of the claims and their equivalents are to be construed as being included in the disclosure.
Number | Date | Country | Kind |
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10-2015-0010657 | Jan 2015 | KR | national |