Fabrication of large grain polycrystalline silicon film by nano aluminum-induced crystallization of amorphous silicon

Abstract

One aspect of the present invention relates to a method for fabricating a polycrystalline silicon film. In one embodiment, the method includes the steps of providing a substrate having a thermally-grown silicon dioxide layer, forming an amorphous silicon film on the thermally-grown silicon dioxide layer of the substrate, forming an aluminum layer on the amorphous silicon film to form a structure having the substrate, the amorphous silicon film and the aluminum layer, and annealing the structure at an annealing temperature for a period of time in an N2 environment with a ramp-up time to crystallize the amorphous silicon film to form a polycrystalline silicon film.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings illustrate one or more embodiments of the invention and, together with the written description, serve to explain the principles of the invention. Wherever possible, the same reference numbers are used throughout the drawings to refer to the same or like elements of an embodiment, and wherein:

FIG. 1 shows schematically a cross-sectional view of a structure (sample) having a substrate with a thermally-grown silicon dioxide layer, an amorphous silicon film formed on the silicon dioxide layer and an aluminum layer formed on amorphous silicon film, used for a nanometer thick aluminum induced crystallization (nano-AIC) of a-Si:H according to one embodiment of the present invention;

FIG. 2 shows microscopy images of a polycrystalline silicon film fabricated by (a) a nano-AIC of a-Si:H according to one embodiment of the present invention, and (b) a traditional AIC of a-Si:H, respectively, where the inset in (b) is a scanning electron microscope (SEM) image showing details of small grains of the polycrystalline silicon film fabricated by the traditional AIC of a-Si:H;

FIG. 3 shows the relationship between the grain size in a polycrystalline silicon film and the ramp up time of the annealing temperature for fabricating the polycrystalline silicon film, showing that the grain size significantly increases with the ramp up time for the nano-AIC of a-Si:H according to one embodiment of the present invention, but changes little for the traditional AIC of a-Si:H;

FIG. 4 shows microscopy images of a polycrystalline silicon film fabricated by (a) a nano-AIC of a-Si:H according to one embodiment of the present invention, and (b) the traditional AIC of a-Si:H, respectively, where samples are annealed for about 20 hours of the annealing ramp up time;

FIG. 5 shows three-dimensional scanning probe microscope (3-D SPM) images showing the surface topography of (a) a-Si:H, and a polycrystalline silicon film fabricated by (b) a nano-AIC process according to one embodiment of the present invention, and (c) the traditional AIC process;

FIG. 6 shows X-ray diffraction (XRD) spectra of a-Si:H, a polycrystalline silicon film of a nano-AIC of a-Si:H according to one embodiment of the present invention, and a polycrystalline silicon film of a traditional AIC of a-Si:H, where the large peaks around 2θ=28.5 degree are Si (111), indicating the crystallization occurred for both the nano-AIC of a-Si:H and the traditional AIC of a-Si:H;

FIG. 7 shows a microscopy image of a polycrystalline silicon film according to one embodiment of the present invention, where the large grains is formed at a temperature about 280° C. by the nano-AIC process;

FIG. 8 shows the relationship between the annealing temperature and grain sizes of a polycrystalline silicon film fabricated by a nano-AIC process according to one embodiment of the present invention, where the average of five largest grain sizes increases with the decrease of the annealing temperature, and the lowest temperature for the crystallization is about 280° C.;

FIG. 9 shows XRD spectra of samples A and B produced according to embodiments of the present invention, where sample A has no bottom surface coating, while sample B is coated with about 100 nm a-Si:H on the bottom surface of the substrate;

FIG. 10 shows the relationship between the stress induced by the thickness of an aluminum film according to one embodiment of the present invention;

FIG. 11 shows optical images of polycrystalline silicon samples annealed at 250° C. for 30 min according to embodiments of the present invention, where (a) the sample is formed with an aluminum film of about 15 nm, and (b) the sample is formed with aluminum about 200 nm;

FIG. 12 shows XRD spectra of the samples with the aluminum thickness of 15 nm and 200 nm according to embodiments of the present invention, where both samples are annealed at about 250° C. for 30 min; and

FIG. 13 shows a microscopy image of a sample after annealing and removal of aluminum according to one embodiment of the present invention, where the crystallized lines and buses are covered by thinner aluminum before annealing, and no grains are observed in the area outside the lines and buses.

Claims

1. A method for forming a polycrystalline silicon film, comprising the steps of: a. providing a substrate having a thermally-grown silicon dioxide layer;b. forming an amorphous silicon film on the thermally-grown silicon dioxide layer of the substrate;c. forming an aluminum layer on the amorphous silicon film to form a structure having the substrate, the amorphous silicon film and the aluminum layer; andd. annealing the structure at an annealing temperature effective for a period of time in an N2 environment with a ramp-up time to crystallize the amorphous silicon film to form a polycrystalline silicon film.

2. The method of claim 1, further comprising the step of selectively etching off the aluminum layer from the annealed structure.

3. The method of claim 1, wherein the substrate comprises a silicon wafer.

4. The method of claim 3, wherein the thermally-grown silicon dioxide layer is adapted for preventing the crystal orientation of the substrate from affecting the crystallization of the amorphous silicon film, and wherein the thermally-grown silicon dioxide layer has a thickness, H1, in a range of about 1-3 μm.

5. The method of claim 1, wherein the amorphous silicon film has a thickness, H2, in a range of about 50-200 nm.

6. The method of claim 1, wherein the step of forming the amorphous silicon film is performed with a plasma-enhanced chemical vapor deposition (PECVD) process, and wherein the PECVD system is configured such that the RF power, chamber pressure, substrate temperature, and SiH4 flow rates are about 15 W, 0.5 Torr, 250° C., and 85 sccm, respectively.

7. The method of claim 1, wherein the step of forming the aluminum layer is performed by a metal evaporation process.

8. The method of claim 1, wherein the aluminum layer has a thickness, H3, in a range of about 5-100 nm, and wherein the aluminum layer is formed uniformly such that the thickness H3 of the aluminum layer is substantially constant or is formed variable over the aluminum layer with a desired pattern.

9. The method of claim 8, wherein the polycrystalline silicon film comprises a plurality of crystallites, each crystallite having a crystallite size, and wherein the crystallite size varies with the annealing temperature ramp-up time and/or the thickness H3 of the aluminum layer.

10. The method of claim 1, wherein the annealing temperature is in a range of about 50-450° C.

11. A polycrystalline silicon film formed according to the method of claim 1.

12. A system for fabricating a polycrystalline silicon film, comprising: a. means for forming an amorphous silicon film on a substrate;b. means for forming an aluminum layer on the amorphous silicon film to form a structure having the substrate, the amorphous silicon film and the aluminum layer; andc. means for annealing the structure at an annealing temperature for a period of time in an N2 environment with a ramp-up time to crystallize the amorphous silicon film into a polycrystalline silicon film,

13. The system of claim 12, further comprising means for selectively etching off the aluminum layer from the annealed structure.

14. The system of claim 12, wherein the means for forming the amorphous silicon film comprises a plasma-enhanced chemical vapor deposition (PECVD) system.

15. The system of claim 12, wherein the means for thermally forming the aluminum layer comprises a thermal evaporator.

16. A method for forming a desired pattern of polycrystalline silicon usable in a semiconductor device, comprising the steps of: a. forming an amorphous silicon film on a substrate;b. forming an aluminum layer on the amorphous silicon film to form a structure having the substrate, the amorphous silicon film and the aluminum layer;c. patterning the aluminum layer of the structure to form a desired pattern thereon; andd. annealing the patterned structure at an annealing temperature for a period of time in an N2 environment with a ramp-up time to crystallize the amorphous silicon film to form a polycrystalline silicon film with the desired pattern.

17. The method of claim 16, further comprising the step of selectively etching off the aluminum layer from the annealed structure.

18. The method of claim 16, wherein the substrate comprises a silicon wafer having a thermally-grown silicon dioxide layer on which the amorphous silicon film is formed.

19. The method of claim 16, wherein the amorphous silicon film has a thickness, H2, in a range of about 50-200 nm.

20. The method of claim 16, wherein the step of forming the amorphous silicon film is performed with a plasma-enhanced chemical vapor deposition (PECVD) process.

21. The method of claim 16, wherein the step of forming the aluminum layer is performed with a metal evaporation process.

22. The method of claim 16, wherein the step of patterning the aluminum layer comprises the steps of: a. spin-coating a photoresist layer on the aluminum layer of the structure;b. forming a desired pattern in the spin-coated photoresist layer by a photolithographic process to uncover a portion of the aluminum layer according to the desired pattern;c. thinning the uncovered portion of the aluminum layer according to the desired pattern; andd. removing the remaining portion of the photoresist layer to uncover the remaining portion of the aluminum layer.

23. The method of claim 22, wherein the step of thinning the uncovered portion of the aluminum layer is performed by a chemical process.

24. The method of claim 22, wherein the aluminum layer is patterned such that its thickness, H3, in the desired pattern is substantially thinner than that in the remaining portion of the aluminum layer, and wherein the thickness H3 of the aluminum layer in the desired pattern is in a range of about 5-100 nm.

25. The method of claim 16, wherein the annealing temperature is in a range of about 50-450° C.

26. A polycrystalline silicon film with a desired pattern formed according to the method of claim 16.