Claims
- 1. A process for forming electrical contacts to a molecular layer comprising:
coating a surface of a stamp with a metal layer; forming an attached layer of anchored molecules by covalently bonding first ends of said anchored molecules to one of either a conductive or semiconductive substrate or said metal layer; and placing the other of said conductive or semiconductive substrate or said metal layer in contact with said attached layer of anchored molecules, said conductive or semiconductive substrate or said metal layer covalently bonding to free ends of said anchored molecules.
- 2. The process as recited in claim 1 further comprising forming said stamp by:
form a pattern on a template said pattern comprising raised portions; coating said patterned template with a mixture of a prepolymer and a catalytic agent; curing said prepolymer to form a elastomeric rubber; and peeling said elastomeric rubber away from said template.
- 3. The process as recited in claim 1 wherein said coating is performed for a sufficient period to form said metal layer with a thickness of about 200 to about 300 Angstroms.
- 4. The process as recited in claim 3 wherein said coating process is selected from the group of processes comprising:
treatment with a metal solution; and metal evaporation.
- 5. The process as recited in claim 1 wherein said covalent bonding comprises:
placing said conductive or semiconductive substrate in a chamber; placing said molecules in said chamber; and maintaining said chamber at a temperature of about 23° C. and a pressure of less than about 0.001 Torr for at least about 15 minutes.
- 6. The process as recited in claim 1 wherein said covalent bonding comprises placing said conductive or semiconductive substrate in a solution containing said molecules.
- 7. The process of claim 1 wherein said first ends or said free ends comprise thiol functional groups.
- 8. A nanoscale electronic device, comprising:
a conductive or semiconductive substrate; a layer of anchored molecules having first and second ends, said first ends of said molecules being covalently anchored to said conductive or semiconductive substrate, said second ends able to rotate about said anchored first ends; and a printed metal layer covalently coupled to said second ends of said layer of anchored molecules.
- 9. The device as recited in claim 8 wherein said anchored molecules comprise one or more compounds characterized by the chemical formula:
- 10. The device as recited in claim 9 wherein said first functional moieties are selected from the group consisting of:
thiols; monocarboxylates; dicarboxylates; and alkoxides.
- 11. The device as recited in claim 9 wherein said second functional moieties are selected from the group consisting of:
thiols; and disulfides.
- 12. The device as recited in claim 9 wherein R comprises an alkane having the chemical formula: (—CH2—)n or an aromatic having the chemical formula: (—C6H4—)n, and 1≦n≦25.
- 13. The device as recited in claim 8 wherein said device is a diode.
- 14. The device as recited in claim 8 wherein said conductive or semiconductive substrate is selected from the group consisting of:
Gallium Arsenide; Silicon; Indium Phosphide; Gold; Tungsten; and Organic Semiconductors.
- 15. The device as recited in claim 8 wherein said layer of anchored molecules forms a one of a channel and a gate dielectric, said conductive or semiconductive substrate forms the other of a first electrode and a channel, and said printed metal layer forms a second electrode of a field effect transistor.
- 16. The device as recited in claim 8 wherein said device has a contact resistance between said printed metal layer and said conductive or semiconductive substrate that is at least about 10 times higher than a contact resistance for a substantially identical device except having an evaporated metal layer.
- 17. A method for manufacturing an integrated circuit, comprising:
forming active devices, including:
forming conductive electrodes on or in a substrate; forming a conductive or semiconductive layer over said conductive electrode and said substrate; forming a layer of molecules having first and second ends by anchoring said first ends to said conductive or semiconductive substrate wherein said second ends are capable of rotation about said anchored first ends; and imprinting a gate electrode by contacting a stamp having a metal layer located thereon with said second ends of said layer of molecules to form a bond between said metal layer and said second ends; and interconnecting said active devices to form an operative integrated circuit.
- 18. The method as recited in claim 17 wherein said anchoring comprises
placing said conductive or semiconductive substrate in a chamber; placing said molecules in said chamber; and maintaining said chamber at a temperature of about 23° C. and a pressure of less than about 0.001 Torr for at least about 15 minutes.
- 19. The method as recited in claim 17 wherein said contacting occurs for less than about 15 seconds at about 23° C.
- 20. The method as recited in claim 17 wherein said formed transistors have a contact resistance between said printed metal layer and said conductive or semiconductive substrate of greater than about 1×105 ohm cm2.
- 21. The method as recited in claim 17 wherein said formed transistors have a contact resistance within a factor of about 2 units.
- 22. A nanoscale electronic device, comprising:
a conductive or semiconductive substrate; a layer of anchored molecules having reactive ends and nonreactive ends, said reactive ends of said molecules being covalently anchored to said semiconductive substrate, said nonreactive ends able to rotate about said reactive ends; and a printed metal layer laminated to said nonreactive ends of said layer of anchored molecules.
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application is a continuation in part of U.S. patent application Ser. No. 10/178,471, entitled “FORMING ELECTRICAL CONTACTS TO A MOLECULAR LAYER,” filed on Jun. 24, 2002, and with U.S. patent application Ser. No. 10/098,202, filed Mar. 15, 2002, “FORMING NANOSCALE PATTERNED THIN FILM METAL LAYERS,” and patent application Ser. No. 10/098,201, filed Mar. 15, 2002, “THIN FILM TRANSISTORS,” all commonly assigned with the present application and incorporated herein by reference.
Continuation in Parts (3)
|
Number |
Date |
Country |
Parent |
10178471 |
Jun 2002 |
US |
Child |
10307642 |
Dec 2002 |
US |
Parent |
10098202 |
Mar 2002 |
US |
Child |
10307642 |
Dec 2002 |
US |
Parent |
10098201 |
Mar 2002 |
US |
Child |
10307642 |
Dec 2002 |
US |