Patent Application
20160222535
As the semiconductor industry continues to advance, new processing challenges continue to arise. For example, the use of a thinner seed layer can be beneficial in various electroplating contexts, but the thinner seed layer heightens the risk that the seed layer will dissolve before plating occurs. In order to combat this issue, deposition often occurs at a relatively high over-potential using electroplating solutions having low metal ion concentrations. Unfortunately, the limiting current in such electroplating applications is relatively low, which leads to a low throughput. While certain techniques may be used to increase throughput, these techniques may introduce various additional processing challenges.
Certain embodiments herein relate to methods and apparatus for electroplating material onto substrates. The apparatus used may be one having a peripheral passage that has particular dimensions optimized to minimize the likelihood that bubbles become trapped under the substrate during plating. This allows plating to occur at higher substrate rotation rates than would otherwise be possible. In one aspect of the embodiments herein, an apparatus for electroplating metal onto a substrate, the apparatus including: a substrate support for supporting the substrate at its periphery, where when the substrate is present in the substrate support, a plating face of the substrate is held in a substrate plating plane; a plating gap formed below the substrate plating plane and above an opposing surface positioned under the substrate plating plane; a pump for delivering electrolyte such that the electrolyte flows into the plating gap; a peripheral passage positioned radially outside of the substrate support, where the peripheral passage has a dimensionless peripheral passage parameter of about 2 or greater, and where electrolyte flows through the peripheral passage after the electrolyte exits the plating gap at the periphery of the plating gap and before the electrolyte reaches an electrolyte-air interface; and a controller having instructions to control electroplating in a manner that does not result in the passage of air through the peripheral passage and under the substrate.
In some embodiments, the peripheral passage is at least partially defined by the substrate support. In these or other embodiments, the peripheral passage may be at least partially defined by a ring positioned radially outside of the substrate support. The ring may be a dual cathode clamp ring or a shielding ring in some cases. The ring may be made of an electrically insulating material.
The peripheral passage may have a dimensionless peripheral passage parameter between about 2-10 in some embodiments, for example between about 2-3.5. The peripheral passage may have a height of at least about 0.1 inches, for example between about 0.1-1 inches in some cases. The electrolyte-air interface has a resting position when the substrate is not being rotated. In some embodiments, a vertical distance between the substrate plating plane and the resting position of the electrolyte-air interface is at least about 10 mm. The peripheral passage is annularly shaped in some embodiments. In other embodiments, the peripheral passage is not annularly shaped. In one example, the apparatus may further include an inlet above a channeled ionically resistive plate (CIRP) for providing electrolyte to the plating gap and an outlet above the CIRP for receiving electrolyte from the plating gap, the inlet and outlet each extending between about 90-180° around the plating gap, the inlet and outlet positioned on opposite sides of the plating gap, where the peripheral passage is positioned proximate the outlet. In certain cases the plating gap may have a height between about 0.5-6 mm, or between about 1-2 mm.
In certain embodiments, the electrolyte follows a flow path after exiting the plating gap and before reaching the electrolyte-air interface, the flow path having a tortuosity of at least about 1.1. The peripheral passage may be at least partially defined between a first surface that is substantially stationary during electroplating and a second surface that rotates during electroplating. In various cases, the apparatus further includes a substrate rotation mechanism for rotating the substrate within the substrate plating plane, where the controller has instructions to rotate the substrate within the substrate plating plane via the substrate rotation mechanism.
As noted above, the opposing surface positioned under the substrate plating plane may be a surface of a channeled ionically resistive plate (CIRP), the CIRP including a number of through-holes, where the pump delivers electrolyte such that the electrolyte passes from below the CIRP, through the through-holes in the CIRP, and into the plating gap. In some cases at least a portion of the through-holes are oriented at a non-normal angle with respect to the substrate plating plane.
In another aspect of the disclosed embodiments, a method of electroplating metal onto a substrate is provided, the method including: positioning the substrate in a substrate support; immersing the substrate in electrolyte in an electroplating chamber; supplying current to cause metal to electroplate onto the substrate; flowing electrolyte into a plating gap defined between the substrate and an opposing surface positioned under the substrate such that the electrolyte impinges upon the substrate, and flowing electrolyte from a periphery of the plating gap through a peripheral passage positioned radially outside of the substrate support, where electrolyte flows through the peripheral passage before reaching an electrolyte-air interface, where the peripheral passage has a dimensionless peripheral passage parameter of at least about 2; where during electroplating, air does not travel through the peripheral passage and under the substrate.
In some embodiments, the peripheral passage is at least partially defined by the substrate support. In these or other cases, the peripheral passage may be at least partially defined by a ring positioned radially outside of the substrate support. For instance, the ring may be a dual cathode clamp ring or a shielding ring. The ring may be made of an insulating material.
In certain implementations, the opposing surface positioned under the substrate is a surface of a channeled ionically resistive plate (CIRP), the CIRP including a plurality of through-holes, where electrolyte flows from below the CIRP, through the through-holes of the CIRP, and into the plating gap. At least a portion of the through-holes may be oriented at a non-normal angle with respect to the substrate in some implementations. In various embodiments, the substrate is rotated during electroplating.
These and other features will be described below with reference to the associated drawings.
In this application, the terms “semiconductor wafer,” “wafer,” “substrate,” “wafer substrate,” and “partially fabricated integrated circuit” are used interchangeably. One of ordinary skill in the art would understand that the term “partially fabricated integrated circuit” can refer to a silicon wafer during any of many stages of integrated circuit fabrication thereon. A wafer or substrate used in the semiconductor device industry typically has a diameter of 200 mm, or 300 mm, or 450 mm. Further, the terms “electrolyte,” “plating bath,” “bath,” and “plating solution” are used interchangeably. The following detailed description assumes the invention is implemented on a wafer. However, the invention is not so limited. The work piece may be of various shapes, sizes, and materials. In addition to semiconductor wafers, other work pieces that may take advantage of this invention include various articles such as printed circuit boards, magnetic recording media, magnetic recording sensors, mirrors, optical elements, micro-mechanical devices and the like.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the presented embodiments. The disclosed embodiments may be practiced without some or all of these specific details. In other instances, well-known process operations have not been described in detail to not unnecessarily obscure the disclosed embodiments. While the disclosed embodiments will be described in conjunction with the specific embodiments, it will be understood that it is not intended to limit the disclosed embodiments.
Certain electroplating processes utilize electrolyte having low metal ion concentrations. These electrolytes are particularly useful when plating on very thin seed layers. For instance, in various cases the seed layer may be between about 1-10 nm thick, for example between about 2-5 nm thick. Unfortunately, the use of low metal ion concentration electrolyte results in a relatively low limiting current, which results in relatively long processing times and a low throughput. In some cases, the limiting current for such electrolytes may be between about 0.7-15 A for 300 mm wafers (or between about 1-25 mA/cm2 in terms of current density), depending on the composition of the electrolyte and the rotation speed of the substrate. Various embodiments herein are presented in the context of electroplating copper. However, the invention is not so limited, and the disclosed methods and apparatus may also be used to electroplate other materials including, but not limited to, cobalt, nickel, gold, silver, and metal alloys.
i
l,c=0.620 nFAD02/3ω1/2ν−1/6Co* (Eq 1)
The experiments involved determining the limiting current at about 25° C. and an electrolyte flow rate of about 6 LPM. The limiting current was determined at various different substrate rotation rates between about 12-175 RPM. This data closely followed the correlation predicted by the Levich Equation, which was used to extrapolate the data at the higher substrate rotation rates shown in
Notably, the limiting current scales with the square root of the substrate rotation speed (ω). As the substrate rotation speed increases, the limiting current also increases.
Where currents higher than the limiting current are used, metal ion depletion may occur. Metal ion depletion arises when the mass transfer of metal ions to the plating surface is too low for the given current (e.g., when the metal ion concentration is too low, or when the electrolyte is insufficiently turbulent) such that there is insufficient metal ion concentration at the plating surface to sustain the reduction reaction. Where this is the case, parasitic reactions begin to occur to sustain the current delivered to the substrate. For example, the electrolyte itself may begin to decompose and generate gases at the plating interface, which can result in significantly non-uniform plating and even nodular growths on the substrate in some cases.
One method for increasing the throughput when electroplating with low metal ion concentration electrolyte is to increase the rate at which a substrate is rotated during electroplating. Substrate rotation is commonly used during electroplating to help provide uniform plating results over the face of the substrate. The use of high rate substrate rotation is beneficial at least because it increases the mass transfer within the electrolyte, thereby increasing the limiting current for the system and reducing the risk of metal ion depletion at the plating interface.
However, the use of higher rates of substrate rotation presents certain problems not encountered at lower rates of rotation. Specifically, at higher rates of rotation, air bubbles are much more likely to become trapped under the substrate. These entrained air bubbles have greater resistance than the electrolyte, and can therefore lead to higher plating voltages, which can sometimes exceed the voltage limits of the power supply, leading to failure of the electroplating process. Further, even if the electroplating process does not fail entirely, the presence of entrained bubbles under the substrate surface leads to significant plating non-uniformities and low quality plating.
In these or other cases, electrolyte may also be delivered through one or more inlets (not shown) positioned above the channeled ionically resistive element 270. In some cases, an inlet and outlet are provided above the channeled ionically resistive element, the inlet and outlet being positioned on opposite sides of the plating face of the substrate, such that electrolyte enters at one edge of the substrate, travels across the plating face of the substrate, then exits at the outlet on the opposite side of the substrate. The outlet may provide less resistance to exiting electrolyte (e.g., a wider opening, or the only available opening) compared to other areas (i.e., areas that are not the outlet or inlet) around the periphery of the substrate. Such cross-flowing electrolyte is beneficial in certain embodiments for improving flow and plating uniformity. Any combination of these electrolyte inlets may be used.
Channeled ionically resistive elements such as 270 can be used to provide uniform impinging flow upon the wafer plating surface. In some cases, channeled ionically resistive elements include vertically oriented, non-intersecting through-holes. In other cases, the through holes may intersect. In some embodiments, the through-holes may be angled such that electrolyte leaving the through holes is directed toward the substrate at a non-normal angle. Such angled through holes may be present on the entire channeled ionically resistive element, or on only a portion (or portions) of the element. For instance, in some cases the channeled ionically resistive element includes angled holes near the center portion of the element, and vertically oriented holes outside of this center portion. Further, a mix of angled and vertically oriented through holes may be present on certain portions of the plate. In another example, the center portion of a channeled ionically resistive element includes both angled through-holes and vertically oriented through-holes, with only vertically-oriented through holes present in regions outside of the center portion of the channeled ionically resistive element. Where angled through-holes are used, the angled holes may point in the same or different directions. The holes may be radially symmetric in some cases.
Channeled ionically resistive elements, sometimes referred to as high resistance virtual anodes (HRVAs) are further discussed in the following U.S. Patents and Patent Applications, each of which is incorporated herein by reference in its entirety: U.S. Pat. No. 8,308,931; U.S. Pat. No. 8,475,636; and U.S. patent application Ser. No. 14/251,108, filed Apr. 11, 2014, and titled “ANISOTROPIC HIGH RESISTANCE IONIC CURRENT SOURCE (AHRICS).” Electroplating apparatus utilizing cross-flowing electrolyte above the channeled ionically resistive element are further discussed in the following U.S. Patents and Patent Applications, each of which is herein incorporated by reference in its entirety: U.S. Pat. No. 8,795,480; U.S. patent application Ser. No. 13,893,242, filed May 13, 2013, and titled “CROSS FLOW MANIFOLD FOR ELECTROPLATING APPARATUS”; and U.S. patent application Ser. No. 14/103,395, filed Dec. 11, 2013, and titled “ENHANCEMENT OF ELECTROLYTE HYDRODYNAMICS FOR EFFICIENT MASS TRANSFER DURING ELECTROPLATING.”
Detrimental air bubble entrainment is more likely to occur at high rates of substrate rotation for several reasons. First, at higher RPMs, the electrolyte is more turbulent, making the surface of the electrolyte more choppy/agitated and less smooth. This increases the risk that the electrolyte-air interface dips below the surface of the substrate, at which point the air can get under the substrate and become entrained. By contrast, at lower RPMs, the electrolyte-air interface is somewhat smoother, with less risk that the interface dips to a point at which air can get under the substrate.
Another factor that affects the likelihood of air bubble entrainment is the flow rate of electrolyte through the electroplating apparatus. Specifically, air bubbles are more likely to be a problem when the flow rate of electrolyte is relatively low. One reason is that where the flow rate of electrolyte is higher, the electrolyte exiting at the substrate periphery has greater momentum, making it more difficult for air to get under the substrate.
Another parameter that affects the likelihood of bubble entrainment is the height of the plating gap. This height is measured as the vertical distance between the plating face of the substrate and an upper surface of an element over which electrolyte flows before exiting the gap. This upper surface is often positioned at or near the periphery of the CIRP 270, and in many cases is a shielding ring/insert (e.g., see element 930 in
A related parameter that affects the likelihood of bubble entrainment is the liquid replenishment rate, which is proportional to the flow rate of electrolyte passing through the plating gap divided by the height of the plating gap.
Electrolyte is present in an anolyte region 915, a catholyte region 916, and the plating gap 905. The anolyte region 915 and the catholyte region 916 are separated from one another by a membrane 912. The membrane 912 is often a cationic membrane, though other types of membranes may be used as appropriate. In many embodiments, the electrolyte contains certain plating additives, such as accelerators, suppressors, levelers, brighteners, wetting agents, etc. The additives are organic in many cases. It is often beneficial to keep the anolyte substantially free of such additives, such that the additives do not come into contact with the anode, where they are likely to degrade and form unwanted byproducts. The membrane 912 allows for additives to be present in the catholyte region 916 and the plating gap 905 (where they are useful) while maintaining the anolyte region 915 substantially additive-free. Further, the membrane 912 prevents any species generated/present in the anolyte from reaching and contaminating the substrate 901. During plating, electrolyte travels up from the catholyte region 916, through the through-holes in the CIRP 914, and into the plating gap 905. The flow of electrolyte is shown by the dotted lines. After the electrolyte leaves the through-holes in the CIRP 914, the electrolyte impinges upon the plating face of the substrate 901. The electrolyte then travels outward toward the periphery of the substrate (left in
Positioned radially outside of the CIRP 904 is an annularly shaped ring 910. In the embodiment of
The DC clamp ring 910 contains a series of channels (not shown) to provide ionic communication between the catholyte (which contains plating additives) and electrolyte in the dual cathode chamber 909 (which typically does not contain plating additives). The DC clamp ring 910 also provides a physical barrier (e.g., with an additional membrane (not shown)) between the catholyte and the electrolyte in the dual cathode chamber 919. In this way, the additives do not degrade from coming into contact with the dual cathode, which is often made of titanium, and which may have copper on the outer surface. Another function of the DC clamp ring 910 is to physically hold/clamp the membrane 912 in place to seal the electroplating chamber. In various embodiments the DC clamp ring 910 is made of an insulating material such as plastic, polyethylene, polypropylene, polyvinylidene difluoride (PVDF), polytetrafluoroethylene (PTFE, e.g., Teflon), ceramic, (PET), polycarbonate, glass, etc.
After the electrolyte travels under the substrate holder 902, it travels upward/outward between the substrate holder 902 and the ring 910. From here, the electrolyte may flow over a weir wall 921. The electrolyte may be recycled as appropriate. The electrolyte-air interface is shown by line 920. If any portion of the electrolyte-air interface 920 dips below the bottom surface of substrate holder 902 at any time during plating, air bubbles can become entrained under the substrate 901. In various embodiments, the shape of certain electroplating hardware is modified to alter the shape of the fluid path that the electrolyte follows after traveling past the periphery of the substrate. In particular, the fluid path is modified to be taller/narrower in the region between the substrate holder 902 and the ring 910. This modification makes it more difficult for air at the electrolyte-air interface 920 to reach under the substrate holder 902 where it could become entrained.
With reference to
In various examples herein, the average width of the peripheral passage is calculated (for the sake of simplicity) to be the average between the width at the top of the peripheral passage and the width at the bottom of the peripheral passage, though one of ordinary skill in the art would understand that the average widths can be calculated more accurately. In the context of
Where the dimensionless peripheral passage parameter, δ, is higher, the peripheral passage is relatively taller and/or narrower, making it more difficult for air bubbles to travel down through the peripheral passage and under the substrate. As such, by increasing the dimensionless peripheral passage parameter, bubble-free plating can be extended to higher substrate rotation rates. The use of higher substrate rotation rates allows deposition to occur at higher limiting currents, which consequently increases throughput. Therefore, by plating with hardware having a higher dimensionless peripheral passage parameter, throughput can be increased.
Similarly, the electrolyte flow path can be characterized by its tortuosity. Tortuosity relates to the shape of the flow path and how difficult it is for fluid to traverse the flow path. Where the flow path is more tortuous, it is more difficult for air to traverse the path and end up under the substrate. In certain embodiments, the fluid path between the point at which electrolyte passes out from under the substrate and the point at which electrolyte contacts the electrolyte-air interface is designed to be particularly tortuous. For instance, in some cases, the path may have a tortuosity of at least about 1.1, for example at least about 1.2. As used herein, tortuosity (τ) is measured by the arc-chord ratio, which is the ratio of the length of the fluid path (L) to the linear distance between the ends of the path (C): τ=L/C. Tortuosity can be increased by making various modifications to the shape of the fluid path, for example by making variations on the shape of the substrate support/cup, the height and diameter of the weir wall, etc.
In some embodiments where the peripheral passage 1022 is defined between the substrate support 902 and a ring 1010, the peripheral passage 1022 may have a height (H3) between about 0.1-1 inches, for example between about 0.1-0.7 inches. In some cases, the height of the ring 1010, and therefore the height of the peripheral passage 1022 may extend all the way up to the electrolyte-air interface. In this embodiment, the ring 1010 extends up to the same height/vertical position as the weir wall 921. The peripheral passage 1022 may have an average width between about 0.02-0.5 inches, for example between about 0.06-0.22 inches. The dimensionless peripheral passage parameter may be at least about 1.6, at least about 2, at least about 3, or at least about 5 in various embodiments. In some cases the dimensionless peripheral passage parameter may be between about 1.6-10, or between about 2-10, or between about 2-5, or between about 2-3.5, for example between about 2.2-2.6. The above dimensions can be applied to other annular fluid pathways used with substrate holders in electroplating apparatus.
In one particular example of the embodiment shown in
In these or other embodiments where the peripheral passage 1023 is defined between the substrate support 902 and a shielding ring 1011 (or a weir wall or other piece of hardware radially outside the substrate support in the horizontal plane near the bottom of the substrate support), the peripheral passage 1023 may have a height (H4) between about 0.1-1 inches, for example between about 0.1-0.7 inches. In some cases, the height of the shielding ring 1011, and therefore the height of the peripheral passage 1023 may extend all the way up to the electrolyte-air interface. In such an embodiment, the shielding ring 1011 extends up to the same height/vertical position as the weir wall 921. The peripheral passage 1023 may have an average width between about 0.02-0.5 inches, for example between about 0.06-0.22 inches. The dimensionless peripheral passage parameter may be at least about 1.6, at least about 2, at least about 3, or at least about 5 in various embodiments. In some cases the dimensionless peripheral passage parameter may be between about 1.6-10, or between about 2-10, or between about 2-5, or between about 2-3.5, for example between about 2.2-2.6. As with other specific embodiments presented herein, these dimensions and parameter values can be applied to other annular fluid pathways used with substrate holders in electroplating apparatus. In other words, the disclosed dimensions may describe any peripheral passage through which electrolyte flows after exiting the plating gap and before reaching the electrolyte-air interface.
In one particular example of the embodiment shown in
Though many of the embodiments herein have been presented in the context of a peripheral passage that is defined between a substrate support and some type of annular ring that sits outside the substrate support during plating (e.g., a DC clamp ring or a shielding ring/insert), the embodiments are not so limited. The disclosed dimensionless peripheral passage parameter may also describe a peripheral passage that is defined between other surfaces. Generally speaking, in order to be considered a relevant peripheral passage, electrolyte should pass through the peripheral passage after leaving the plating gap at the periphery of the substrate. Further, electrolyte should travel through the peripheral passage before being exposed to the electrolyte-air interface (although in some cases the electrolyte-air interface is located right at the top of a relevant peripheral passage, for example where a DC clamp ring or shielding ring extends all the way up to the weir wall of the electroplating cell). In the context of
The shape of the peripheral passage through which electrolyte passes after exiting the plating gap near the periphery of the substrate has a substantial effect on the maximum substrate rotation rate (and the throughput). As noted above in relation to
In certain embodiments, the height of the plating gap (measured as defined above) is between about 0.2-6 mm, or between about 0.5-2 mm. The height of the plating gap may be limited by certain process and/or hardware limitations. In these or other cases, the flow rate of electrolyte through the plating gap may be between about 3-45 LPM, or between about 6-25 LPM. The flow rate of electrolyte may be limited by certain hardware limitations such as pump capacity, pipe diameter, etc. The maximum substrate rotation rate in these or other embodiments may be between about 150-450 RPM, for example between about 200-380 RPM. In some embodiments, the maximum substrate rotation rate is at least about 200, for example at least about 230. The use of relatively higher liquid replenishment rate and/or hardware having a relatively higher dimensionless peripheral passage parameter allows for the use of relatively higher maximum substrate rotation rate.
Another factor that can affect the likelihood that bubbles become entrained under the substrate is the height of the electrolyte-air interface, and more particularly, the vertical distance between the substrate (when installed in the substrate support/cup) and the electrolyte-air interface. By increasing this height/distance (e.g., by increasing the height of the weir walls where electrolyte spills over), the likelihood of air bubble entrainment is reduced. In certain embodiments, the vertical distance between the plating face of the substrate (when installed in the substrate support and in a plating position) and the electrolyte-air interface (which in many cases is controlled by the height of the weir wall) is between about 10-25 mm, for example between about 15-20 mm. In some embodiments, this distance is at least about 10 mm, for example at least about 15 mm.
Returning to the graph shown in
Additional experimental results demonstrating the benefits of the disclosed embodiments are presented in the Experimental section, below.
In a related embodiment mentioned above, electrolyte may also be provided above the CIRP, with an inlet on one side of the plating face of the substrate and an outlet on the opposite side of the plating face of the substrate. In this embodiment, the electrolyte that contacts the substrate originates from either (a) below the CIRP, or (b) the inlet on one side of the substrate. Electrolyte that originates from below the CIRP is delivered through the CIRP to impinge upon the substrate surface. Electrolyte that originates from the inlet on one side of the substrate passes over the entire surface of the substrate in a cross-flow/shearing manner before exiting primarily or exclusively at the outlet on the opposite side of the substrate. All electrolyte exits primarily or exclusively at the outlet. Where the electrolyte exits primarily (but not exclusively) at the outlet, electrolyte may exit the plating gap at other areas, though at a lower rate than through the outlet. The outlet provides less resistance to electrolyte flow compared to the other areas, for example by providing a larger gap for fluid to flow through. Where the electrolyte exits exclusively at the outlet, all the electrolyte is directed to the outlet, and none escapes through other portions around the periphery of the plating gap. In some cases the inlet and/or outlet span between about 90-180°, for example between about 90-120° around the periphery of the substrate. In certain embodiments where the electrolyte exclusively exits the plating gap at the outlet, the relevant peripheral passage is confined to the area where the outlet is located (rather than being annular and extending around the entire periphery of the substrate).
The disclosed embodiments allow substrates to be electroplated at higher rates of substrate rotation. While this is beneficial for the reasons described above, the high rotation rate can also introduce certain difficulties in some cases. In particular, where the substrate rotation rate is sufficiently high, the flow of electrolyte in the plating gap can become turbulent or partially turbulent (e.g., turbulent in the peripheral region of the substrate where the flow rate and fluid velocity are relatively greater and laminar in the central region of the substrate where the flow rate and fluid velocity are relatively lower) in some circumstances. The most relevant region to consider when determining the laminar/turbulent nature of the electrolyte flow is the area adjacent to the stagnant or diffusion region at the substrate surface. The flow through the apparatus can be modeled to predict the Reynolds number for the flow at different radial positions of the substrate (with higher Reynolds numbers expected toward the periphery of the substrate).
In some cases where a portion of the substrate experiences laminar flow and another portion of the substrate experiences turbulent flow, the quality of the plating may be poor. For instance, there may be a sharp variation in film quality between these two portions of the substrate, as evidenced by a difference in film properties such as film thickness, reflectivity, smoothness, and/or defect density. In some cases, one region of a substrate may appear smooth and reflective and another region of the substrate may show ridges or other artifacts arising from irregular copper (or other metal) growth. Without wishing to be bound by theory or mechanism of action, such differences may result from a difference in additive behavior in the laminar vs. turbulent flow regions. For example, the plating thickness may be thicker in regions that experience turbulent flow (e.g., the peripheral region of the substrate) and thinner in regions that experience laminar flow (e.g., the central region of a substrate). The thickness difference may result from the additives in the turbulent region not diffusing into recessed features at the same rate as in the laminar region. It is desirable to minimize these differences and deposit a film of uniformly high quality.
One advantage of the disclosed embodiments is the flow near the substrate is less likely to become turbulent or partially turbulent during plating at a given RPM. The presence of bubbles under the substrate can promote a more turbulent flow. As such, the absence of bubbles under the substrate helps maintain the electrolyte flow relatively more laminar than would otherwise be the case at the same RPM using hardware that is not designed to eliminate bubbles under the substrate. In some embodiments, relatively high RPM plating is used and the flow under the substrate remains laminar at all radial positions of the substrate. In other embodiments, the substrate may be rotated at a rate that achieves turbulent flow over at least a portion of the substrate. The turbulent flow is most likely to occur toward the periphery of the substrate, and may occur even in cases where the disclosed hardware is used and no bubbles are present under the substrate. In these cases, it may be beneficial to choose an additive package (e.g., accelerator, suppressor, leveler, etc.) whose behavior is relatively less dependent (or independent) of the laminar/turbulent nature of the electrolyte flow. Where the additive behavior is less dependent on the nature of the electrolyte flow, the risk of forming film with widely varying properties/quality is minimized. In this way, the problems related to having both laminar and turbulent regions on the substrate during plating can be minimized.
The methods described herein may be performed by any suitable apparatus that is configured as described herein. A suitable apparatus typically includes hardware for accomplishing the process operations and a system controller having instructions for controlling process operations in accordance with the present invention. For example, in some embodiments, the hardware may include one or more process stations (e.g., electroplating chambers) included in a process tool.
In some implementations, a controller is part of a system, which may be part of the above-described examples. Such systems can comprise semiconductor processing equipment, including a processing tool or tools, chamber or chambers, a platform or platforms for processing, and/or specific processing components (a wafer pedestal, a gas flow system, etc.). These systems may be integrated with electronics for controlling their operation before, during, and after processing of a semiconductor wafer or substrate. The electronics may be referred to as the “controller,” which may control various components or subparts of the system or systems. The controller, depending on the processing requirements and/or the type of system, may be programmed to control any of the processes disclosed herein, including the delivery of electrolyte and other fluids, temperature settings (e.g., heating and/or cooling), pressure settings, vacuum settings, potential, current, and/or power settings, flow rate settings, fluid delivery settings, positional and operation settings, wafer transfers into and out of a tool and other transfer tools and/or load locks connected to or interfaced with a specific system.
Broadly speaking, the controller may be defined as electronics having various integrated circuits, logic, memory, and/or software that receive instructions, issue instructions, control operation, enable cleaning operations, enable endpoint measurements, and the like. The integrated circuits may include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application specific integrated circuits (ASICs), and/or one or more microprocessors, or microcontrollers that execute program instructions (e.g., software). Program instructions may be instructions communicated to the controller in the form of various individual settings (or program files), defining operational parameters for carrying out a particular process on or for a semiconductor wafer or to a system. The operational parameters may, in some embodiments, be part of a recipe defined by process engineers to accomplish one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and/or dies of a wafer.
The controller, in some implementations, may be a part of or coupled to a computer that is integrated with, coupled to the system, otherwise networked to the system, or a combination thereof. For example, the controller may be in the “cloud” or all or a part of a fab host computer system, which can allow for remote access of the wafer processing. The computer may enable remote access to the system to monitor current progress of fabrication operations, examine a history of past fabrication operations, examine trends or performance metrics from a plurality of fabrication operations, to change parameters of current processing, to set processing steps to follow a current processing, or to start a new process. In some examples, a remote computer (e.g. a server) can provide process recipes to a system over a network, which may include a local network or the Internet. The remote computer may include a user interface that enables entry or programming of parameters and/or settings, which are then communicated to the system from the remote computer. In some examples, the controller receives instructions in the form of data, which specify parameters for each of the processing steps to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process to be performed and the type of tool that the controller is configured to interface with or control. Thus as described above, the controller may be distributed, such as by comprising one or more discrete controllers that are networked together and working towards a common purpose, such as the processes and controls described herein. An example of a distributed controller for such purposes would be one or more integrated circuits on a chamber in communication with one or more integrated circuits located remotely (such as at the platform level or as part of a remote computer) that combine to control a process on the chamber.
Without limitation, example systems may include a plasma etch chamber or module, a deposition chamber or module, a spin-rinse chamber or module, a metal plating chamber or module, a clean chamber or module, a bevel edge etch chamber or module, a physical vapor deposition (PVD) chamber or module, a chemical vapor deposition (CVD) chamber or module, an atomic layer deposition (ALD) chamber or module, an atomic layer etch (ALE) chamber or module, an ion implantation chamber or module, a track chamber or module, and any other semiconductor processing systems that may be associated or used in the fabrication and/or manufacturing of semiconductor wafers.
As noted above, depending on the process step or steps to be performed by the tool, the controller might communicate with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout a factory, a main computer, another controller, or tools used in material transport that bring containers of wafers to and from tool locations and/or load ports in a semiconductor manufacturing factory.
In various embodiments, a system controller controls some or all of the operations of a process tool. The system control software implemented on the system controller may include instructions for controlling the timing, flow rate of electrolyte, mixture of electrolyte components, inlet pressure, plating cell pressure, plating cell temperature, wafer temperature, current and potential applied to the wafer and any other electrodes, wafer position (and therefore plating gap geometry), wafer rotation, wafer immersion speed, and other parameters of a particular process performed by the process tool. System control software may be configured in any suitable way. For example, various process tool component subroutines or control objects may be written to control operation of the process tool components necessary to carry out various process tool processes. System control software may be coded in any suitable computer readable programming language.
Other computer software and/or programs may be employed in some embodiments. Examples of programs or sections of programs for this purpose include a substrate positioning program, an electrolyte composition control program, an electrolyte flow control program, a pressure control program, a heater control program, a substrate rotation control program, and a potential/current power supply control program.
In some cases, the controllers control one or more of the following functions: wafer immersion (translation, tilt, rotation), fluid transfer between tanks, etc. The wafer immersion may be controlled by, for example, directing the wafer lift assembly, wafer tilt assembly and wafer rotation assembly to move as desired. The controller may control the fluid transfer between tanks by, for example, directing certain valves to be opened or closed and certain pumps to turn on and off. The controllers may control these aspects based on sensor output (e.g., when current, current density, potential, pressure, etc. reach a certain threshold), the timing of an operation (e.g., opening valves at certain times in a process) or based on received instructions from a user.
The various hardware and method embodiments described above may be used in conjunction with lithographic patterning tools or processes, for example, for the fabrication or manufacture of semiconductor devices, displays, LEDs, photovoltaic panels and the like. Typically, though not necessarily, such tools/processes will be used or conducted together in a common fabrication facility.
Lithographic patterning of a film typically comprises some or all of the following steps, each step enabled with a number of possible tools: (1) application of photoresist on a workpiece, e.g., a substrate having a silicon nitride film formed thereon, using a spin-on or spray-on tool; (2) curing of photoresist using a hot plate or furnace or other suitable curing tool; (3) exposing the photoresist to visible or UV or x-ray light with a tool such as a wafer stepper; (4) developing the resist so as to selectively remove resist and thereby pattern it using a tool such as a wet bench or a spray developer; (5) transferring the resist pattern into an underlying film or workpiece by using a dry or plasma-assisted etching tool; and (6) removing the resist using a tool such as an RF or microwave plasma resist stripper. In some embodiments, an ashable hard mask layer (such as an amorphous carbon layer) and another suitable hard mask (such as an antireflective layer) may be deposited prior to applying the photoresist.
Under condition 1 (15 A, 120 RPM, 6 LPM, 2 mm PG), both the baseline hardware and the modified hardware showed fairly good plating results, with no obvious signs of bubble entrainment, and relatively low non-uniformity. At higher substrate rotation rates under condition 2, (25A, 300 RPM, 15 LPM, 1 mm PG), the baseline hardware shows significantly worse results than the modified hardware. The wafer surface shows clear signs of bubble entrainment and the non-uniformity ranges between 5.5-8.8% (depending on the degree of edge exclusion). Comparatively, where the modified hardware is used under condition 2, the wafer surface is still very smooth, and the non-uniformity is much lower than in the baseline case. Under condition 3 (25 A, 300 RPM, 15 LPM, 2 mm PG) and condition 4 (25 A, 300 RPM, 12 LPM, 2 mm PG), the baseline hardware showed clear signs of severe bubble entrainment. The quality of the plated film on the wafer surface is very bad, and the power supply experienced a voltage error due to the presence of air under the substrate, leading to failure of the electroplating process. However, where the modified hardware was used, the plating results were still very good under condition 3, with a fairly smooth wafer surface and non-uniformity ranging between about 1.7-2.3% (depending on the degree of edge exclusion). Under condition 4, the wafer surface was somewhat less smooth, with non-uniformity increasing to between about 3.2-3.8% (depending on the degree of edge exclusion). Although the modified hardware shows some signs of bubble entrainment under condition 4, the results are still much better compared to the baseline hardware under condition 4.
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It is to be understood that the configurations and/or approaches described herein are exemplary in nature, and that these specific embodiments or examples are not to be considered in a limiting sense, because numerous variations are possible. The specific routines or methods described herein may represent one or more of any number of processing strategies. As such, various acts illustrated may be performed in the sequence illustrated, in other sequences, in parallel, or in some cases omitted. Likewise, the order of the above described processes may be changed.
The subject matter of the present disclosure includes all novel and nonobvious combinations and sub-combinations of the various processes, systems and configurations, and other features, functions, acts, and/or properties disclosed herein, as well as any and all equivalents thereof.
