Patent Application
20090001537
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This invention relates to encapsulated integrated circuit and microelectromechanical systems (MEMS) devices. More particularly, this invention relates to the prevention, reduction, elimination or purification of outgassing and trapped gases in such devices.
The ability to maintain a low pressure or vacuum for a prolonged period in a microelectronic package is sought after in such diverse areas as display technologies, microelectromechanical systems (MEMS) and high density storage devices. For example, computers, displays, and personal digital assistants may all incorporate devices which utilize electrons to traverse a vacuum gap to excite a phosphor in the case of displays, or to modify a media to create bits in the case of storage devices, for example.
Microelectromechanical systems (MEMS) are very small moveable structures made on a substrate using lithographic processing techniques, such as those used to manufacture semiconductor devices. Microdevices may be moveable actuators, sensors, valves, pistons, or switches, for example, with characteristic dimensions of a few microns to hundreds of microns. One example of a microdevice is a microfabricated cantilevered beam, which may be used to detect the presence of a particular material, for example, a biological pathogen. By coating the MEMS cantilever with a suitable reagent, the pathogen may bind with the reagent resulting in mass added to the cantilevered beam. The additional mass may be detected by measuring a shift in the characteristic vibration frequency of the cantilevered beam. However, because air is viscous, the cantilevered beam may be required to operate in a vacuum, so that the viscosity of ambient air does not broaden the resonance peak.
In another example, the microdevice may be a detector or emitter of infrared (IR) radiation, so that the emitter may need to be surrounded by vacuum in order to reduce the absorption of the IR radiation by the atmosphere. Accordingly, microdevices such as cantilevered beams and IR emitters/detectors may require vacuum packaging, in order to increase the signal-to-noise level of the detector or the output of the emitter to an acceptable level.
The packaging of the microdevice may be accomplished by bonding a lid wafer with a device wafer. The microdevices, such as the cantilevered beams, are first fabricated on the device wafer. The lid wafer is then prepared by etching trenches or cavities in the lid wafer which will provide clearance for the microdevice on the device wafer. Before bonding, the lid wafer is aligned with the device wafer, so that the device cavity in the lid wafer is registered above the device on the device wafer, providing clearance for the height of the microdevice and for its anticipated range of motion.
The lid wafer and device wafer assembly may then be loaded into a wafer bonding chamber, which is then evacuated. The lid wafer is then permanently bonded to the device wafer with a hermetic bond, so that the evacuated environment within the device cavity does not equilibrate with the outside environment by leakage over time. The formation of this hermetic seal may require heating to temperatures in excess of 400 degrees centigrade.
One of the major problems with vacuum packaging of electronic devices, including MEMS is the continuous outgassing of hydrogen, water vapor, carbon monoxide, and other components found in ambient air, and from the internal components of the electronic or microdevice. Typically, to minimize the effects of outgassing, one uses gas-absorbing materials commonly referred to as getter materials. Generally a getter material is a metal alloy, for example, an alloy of zirconium (Zr), vanadium (V), and iron (Fe) such as that described in U.S. Pat. No. 4,312,669, incorporated by reference herein in its entirety, that is sputter deposited on the surface of the lid wafer. The getter material may be deposited on either or both of the lid wafer and the device wafer. The getter material may then be activated by heating to a predefined temperature, so that the getter desorbs or diffuses the gases already absorbed and is ready to function in the device.
When the getter material, deposited on a substrate surface, is heated to activate the getter, the temperature of the structure may reach 400 degrees centigrade or more. Heating of the getter may also occur when the device wafer is bonded to the lid wafer, in order to cure the adhesive. If the getter material has a substantially different coefficient of thermal expansion (CTE) relative to the substrate, the getter film may delaminate, peel or flake away from the substrate surface during this heating. The debris generated may interfere with the functioning of the device, or of the getter, or both. The tendency for the getter film to delaminate may be worse when it is deposited over rough or corrugated surfaces.
In order to prevent the delamination of the getter material from the device wafer or lid wafer when the wafers are heated for bonding or activation of the getter material, the getter material may be formulated so that its temperature coefficient of thermal expansion (CTEs) more closely matches that of the wafer substrate material. For example, if the wafer material is silicon with a CTE of 3 ppm per degree centigrade and the getter material is zirconium (Zr), vanadium (V), titanium (Ti) and iron (Fe), a relative weight percentage of 60/20/15/5 may create an alloy with a more closely matched CTE than the prior art composition of 50/25/15/10, manufactured by Getter Technologies International, Ltd. of Hong Kong, and as described, for example, at http://getters.com/ZirconiumVanadiumTitaniumIron.aspx. The ability of the novel formulation of the getter material to remain adhered to a surface may be particularly important when it is applied to a surface having corrugation, or indentation features formed therein, in order to increase the surface area of the getter. Such an indented surface is described more fully below, as well as in co-pending U.S. patent application Ser. No. 11/433,435 (Attorney Docket No. IMT-Getter, the '435 application), incorporated by reference herein in its entirety.
This alloy composition is a specific example of a more general formulation of an alloy composition which is adjusted to match the CTE of a wafer, while substantially maintaining the gettering ability of the alloy. A formulation such as, for example, greater than about 50% Zr, and less than about 8% Fe, with the balance of the material being vanadium and titanium, may more closely match the CTE of silicon, and therefore resist delamination.
The systems and methods therefore include determining the CTE of the intended substrate, and adjusting the getter alloy until it has a CTE that more closely approximates that of the substrate. For example, a silicon substrate has a measured CTE of about 3 ppm per degree. The getter composition of a ZrVTiFe getter is then adjusted to increase the Zr composition, with its relatively low CTE of 2.9 ppm per degree, and reduce the Fe composition, with its relatively high CTE of 11.6 ppm. Thus, the new alloy has a CTE that more closely matches silicon, and associated problems of delamination, cracking, and flaking of the getter alloy into the microdevice cavity are reduced or avoided. The getter is thereby better able to perform its intended function of absorbing impurity gases and reducing the pressure of the ambient environment in the microdevice cavity.
The new getter composition may be applied to an indented lid design, as disclosed in the incorporated '435 application. The indented lid design may have indentation features formed therein, which increase the surface area, and therefore the gettering ability of a getter material formed on the indented lid. Because of the details of the shape of the indented lid, matching the CTEs of the getter material with the lid substrate may provide particular benefits of promoting the adhesion of the getter material to the indented substrate.
These and other features and advantages are described in, or are apparent from, the following detailed description.
Various exemplary details are described with reference to the following figures, wherein:
The systems and methods described herein may be particularly applicable to vacuum encapsulated moveable microelectromechanical (MEMS) devices, such as sensors, actuators, emitters, detectors, switches, cantilevers, or the like. However, they may also be applicable to any integrated circuit formed on a device wafer and encapsulated with a getter material under a lid wafer. Accordingly, the improved getter formulation may be applied to many other types of microdevices, as well as the specific embodiment described below.
Furthermore, the systems and methods are described with respect to an indented lid embodiment, wherein the improved getter material is deposited in a cavity having a plurality of indentation features formed therein. However, it should be understood that this embodiment is exemplary only, and that the improved getter material may be applied to other designs, such as an unindented lid. The improved getter material may be applied to a lid or device wafer with no device cavity formed therein, wherein the lid wafer is held aloft from the device wafer by a rigid standoff, for example. The systems and methods may also be applied to a device and lid system comprising 3 or more bonded substrates. Exemplary embodiments are described below, with the first portion directed to fabrication of the devices on the device wafer, the next portion directed to the fabrication of the lid wafer, then the deposition of the improved getter material, followed by the sealing of the device wafer with the lid wafer.
The device wafer 100 may be composed of any number of satisfactory substrate materials, such as silicon, gallium arsenide, silicon-on-insulator (SOI), glass, sapphire, and the like. In one embodiment, the device wafer 100 is silicon, about 675 μm thick, and the microdevice 120 may be an infrared (IR) emitter, such as that described in U.S. application Ser. No. 11/605,312 (Attorney Docket No. IMT-NiMn IR, the '312 application), incorporated by reference herein in its entirety. A plurality of like microdevices 120 may be formed on the surface of the device wafer 100, using, for example, surface machining processes. For example, the IR emitter microdevice may be fabricated by first forming a layer of platinum over a dielectric layer on a substrate, forming an array of holes in the platinum, and then annealing the platinum on the substrate. Finally, after etching a serpentine pattern in the platinum layer, the layer may emit IR radiation when current is driven through the serpentine pattern. Further details as to the fabrication of the IR emitter as the microdevices 120 are set forth in the incorporated '312 application. However, it should be understood that the microdevices 120 may be any of a number of devices other than the IR emitter described in the incorporated '312 application, such as accelerometers, sensors, actuators, and the like. Since the details of the microdevices 120 are not necessary to the understanding of the systems and methods described here, they are depicted only schematically in
The pitch of the device cavities 220 may be the same as the pitch of the microdevices 120 formed on the device wafer 100. The device cavities 220 may be formed on one side of the lid wafer using a dry etch process, such as deep reactive ion etching (DRIE) or reactive ion etching (RIE). However, the device cavity 220 may also be formed using a cheaper, wet process such as a liquid chemical etch. For example, the lid wafer 200 may first be covered with photoresist and patterned to expose the portions of the lid wafer 200 which will be removed to form the device cavities 220. The photoresist may be developed, and the lid wafer submerged in a solution of potassium hydroxide (KOH) solution to etch the device cavities 220 to a depth of about 150 μm. It should be understood that any other depth may be chosen, in order to give adequate clearance for the any movement of the microdevice that might be required. The span of the cavity is chosen to allow an adequate perimeter around the microdevice and room for its movement, while still minimizing the wafer area lost to such overhead. The width of the device cavity may be, for example, about 6 mm.
The chemical etching may be isotropic, and may form the device cavity 220 in the lid wafer with a wall slope of about 57 degrees, that is, the angle defined by the sidewall and a line parallel to the plane of the wafer is about 57 degrees.
Within each device cavity may be a plurality of indentation features 260. The term “indentation feature” should be understood to mean one or more features formed on a surface of at least a portion of a surface of the device cavity, which extend to some depth into or out from the surface, such that their sidewalls give the device cavity more surface area than it would otherwise have. The word “indentation” is therefore not intended to refer to a specific shape of a hole or groove, but may instead refer to any feature which may be formed as one or more depressions in the device cavity surface. The indentation features 260 may be an array of blind holes, for example, etched into the device cavity surface. Furthermore, the term “indentation feature” may also refer to a feature formed by the deposition of material on the lid wafer, in order to form a set of pillars or posts, providing additional surface area. Such deposited indentation features may be formed by electroplating or ion beam deposition of the additional material onto the surface of the lid wafer. Although the indentation features are shown formed on the lid wafer, it should be understood that the indentation features may be formed either on the lid wafer or on the device wafer, or both.
In general, the indentation features may be substantially smaller than the dimensions of the device cavity, such that a plurality of indentation features may be placed within a single device cavity. For example, a characteristic dimension of the indentation features may be at least about ten times smaller than the width of the device cavity.
The indentation features 260 may be formed before or after the device cavity is formed. For example, the plurality of holes 260 may be formed on the otherwise flat surface of the lid wafer, before the formation of the device cavity 220. The holes 260 may be formed by, for example, patterning photoresist and DRIE or wet etching the lid wafer through the apertures in the patterned photoresist. Photoresist may then be reapplied to the lid wafer and patterned in areas corresponding to the device cavity. The device cavity may then be formed by DRIE or wet etching the surface which formed the lands between the plurality of small holes 260. In other exemplary embodiments, the indentation features may be formed in the device cavity surface when the lid wafer 200 is stamped or molded.
Alternatively, in another exemplary embodiment, the indentation features 260 may be formed after the device cavity 220 has been etched. After forming the device cavity 220, photoresist is reapplied to the lid wafer surface and patterned according to the locations and shapes of the indentation features 260. The indentation features 260 are then etched into the surface of the device cavity 220 using, for example, DRIE or wet etching.
Other alternative methods for making the indentation features 260 include ion milling, dry etching, stamping, and molding. Finally, the indentation features may be made by depositing material on the lid wafer 200. For example, features such as posts, columns or pillars may be deposited by electroplating or ion beam deposition, to create the indentation features.
In each of the exemplary embodiments described here, the indentation features are formed on the lid wafer. However, in other exemplary embodiments, the indentation features may be placed in an unused area of the device wafer, although this is typically less desirable as it may interfere with the efficient layout of devices on the device wafer.
In the exemplary embodiment described here, both the device wafer and the lid wafer may be, for example, silicon, which has a CTE of about 3 ppm per degree centigrade. Importantly, the getter material which is to be deposited over the indentation features 260 may have a formulation designed to better match the CTE of the substrate, such that the getter material adheres well to the substrate and better resists the tendency to delaminate.
Although
The seal between the lid wafer and the device wafer may be formed by applying an adhesive to surface 240 shown in
Although specific dimensions are described for the formation of the array of blind holes, it should be understood that these dimensions are exemplary only, and that any of a range of other dimensions may be chosen, depending on the requirements of the application. Accordingly, the invention should not be limited to these particular embodiments.
In various exemplary embodiments, the indentation features 260 are disposed in a rectangular array. The pitch between the indentation features 260 may be nearly the diameter of the blind holes, such that their outer diameters nearly touch. Alternatively, the blind holes may be placed at a distance of about twice the diameter of the blind holes, such that the outer walls of the blind holes do not touch. The larger separation may result in a lid of greater mechanical strength which may resist cracking during further downstream handling and processing, although there will be less surface area available for the getter material 270 in this embodiment. The indentation features 260 may alternatively be disposed in a close-packed hexagonal array, or any other regular or irregular pattern. The pitch between the features in the array may also vary over different portions of the wafer surface, rather than being regularly spaced over the whole wafer surface. Finally, the indentation features 260 may be placed near the perimeter of the device cavity, in order to reduce their effect on the transmission of the generated IR radiation through the lid wafer.
Having completed the formation of the lid wafer device cavity 220 with indentation features 260, the lid wafer 200 may then have the novel getter material 270 deposited thereon, as shown in
For example, to better match the 3 ppm per degree CTE of the silicon substrate, a getter material may be formed from constituent components zirconium (Zr), vanadium (V), titanium (Ti) and iron (Fe). A getter alloy containing the following mixture of components may be effective:
Such an alloy may have a closer match to the CTE of silicon than the prior art alloy of 50/25/15/10, as described in http://getters.com/ZirconiumVanadiumTitaniumIron.aspx, and manufactured by Getter Technologies International, Ltd., of Hong Kong. By “approximate weight percentage,” it should-be understood that a range of compositions around the nominal value may also be effective for the novel alloy, for example, Zr in a weight percentage of greater than about 50% and at most about 70% and Fe in a weight percentage of greater than about 2% and at most about 8% Fe.
The metals or metal alloys of the getter material may be formed by depositing the getter material 270 from an appropriately formed target. The target may be formed from metal powders which are weighed to have the appropriate weight ratios and then melted to form a metal alloy target with the intended stoichiometry. The target may be formed using vacuum arc remelting, wherein a plasma arc is used to melt the metal powders in a vacuum to form the target material. In vacuum arc remelting, the metal materials act as an electrode, and are melted by striking an arc between a charged electrode and the metal materials. The arc beam may be rastered around the target with an electric field generated by another pair of parallel plates, for example. A suitable vacuum arc remelting furnace is manufactured by Retech Systems LLC, of Ukiah, Calif. A target having the desired stoichiometry may be made from powders mixed in the appropriate weight percentages shown in Table 1. In one embodiment, the target is formed in a high vacuum, that eliminates air that would otherwise contaminate the getter target material.
The target material may then be deposited on the lid wafer by sputter deposition, vacuum evaporation or ion beam deposition. A shadow mask may be used over the prepared lid wafer 200, to deposit the getter material 270 into the device cavities 220. Magnetron sputtering, evaporation or ion beam deposition are preferred methods because the getter material 270 may be deposited in a high vacuum (low pressure). When deposited under these conditions, the getter has less gas incorporated into the getter material 270. Large amounts of gas incorporated in the getter material 270 may reduce the ability of the getter material 270 to absorb additional gas, because it may be closer to saturation. A pressure below 10 mTorr is desirable for getter deposition, and the gas within the getter deposition chamber may be an inert gas, such as argon, nitrogen, xenon, krypton or neon, with xenon and krypton being more preferable. Deposition rates of about 20 angstroms/sec are typical.
The novel getter film 270 may be deposited over the indentation features substantially uniformly, as shown in
The novel getter film 270 may be deposited with a layer of gold (not shown) covering the novel getter film 270. The purpose of the gold film may be to prevent the getter film from absorbing impurity gasses and becoming saturated, before it is installed in the device cavity 220 over the microdevice 120. After installation in the device cavity 220 as described below, the novel getter film 270 with the gold layer may be heated to a temperature at which the gold film diffuses into the novel getter film 270, exposing the surface of the getter film to the environment in the device cavity 220. At this point, the getter film may begin its operation. Alternatively, the novel getter film 270 on the lid wafer 200 may be heated to desorb any absorbed gases, before, after or during installation and bonding with the devices 120 on the device wafer 100. This activation of the novel getter film 270 may require temperatures of about 450 degrees centigrade, as described further below.
Having deposited the novel getter film 270 over the indented lid wafer 200, the lid wafer 200 is ready for assembly with the device wafer 100. The lid wafer 200 may first be aligned to the device wafer 100, so that the device cavity 220 is properly registered over the device 120. With the lid wafer 200 in the adjusted position relative to the device wafer 100, the lid wafer 200 may be clamped to the device wafer 100, to form a wafer assembly 300, shown in
The wafer bonding tool may be equipped with a wafer chuck to hold the wafer assembly 300 and a pressure chuck which may apply pressure to the wafer assembly 300. The wafer bonding tool may also have a heat source, which may apply heat to the adhesive that may bond the lid wafer 200 to the device wafer 100, and activate the novel getter film 270. For example, if the adhesive is a glass frit, the wafer bonding tool may heat the wafer assembly 300 to a temperature of about 450 degrees centigrade for at least about 10 minutes, and apply a force between the lid wafer 200 and the device wafer 100 of about 50 N to about 4000 N. This heating step for sealing the adhesive may also serve to diffuse the gold layer over the getter film 270, as described above, and/or activate the getter film 270. By using the novel getter alloy, the getter film 270 may have a reduced tendency to delaminate from the lid wafer 200 during this heating step. After the lid wafer 200 is sealed with the device wafer 100, enclosing either the preferred gas or vacuum within the device cavity 220, the wafer assembly 300 may be removed from the wafer bonding tool. The individual devices 120 may then be singulated from the device wafer 100 by sawing or grinding, for example, to form the encapsulated individual device packages.
Although the indented lid 200 is shown in
It should be understood that the steps shown in
The systems and methods described here may result in improved getter performance because novel getter alloy may have a CTE which is more closely matched to that of the substrate, therefore reducing the tendency of the getter film to delaminate, especially when disposed over indentation features. Such indentation features may increase the surface area of the getter which is exposed to the environment in the device cavity.
While various details have been described in conjunction with the exemplary implementations outlined above, various alternatives, modifications, variations, improvements, and/or substantial equivalents, whether known or that are or may be presently unforeseen, may become apparent upon reviewing the foregoing disclosure. For example, while the systems and methods are described with respect to a system using an array of blind holes formed in a lid wafer as the indentation features, it should be understood that this embodiment is exemplary only, and that the systems and methods disclosed here may be applied to any number of alternative shapes for providing indentation features, or even an unindented lid, or a lid or device wafer with no cavity, wherein the lid wafer is held aloft from the device wafer by a rigid standoff. The systems and methods may also be applied to a device and lid system comprising 3 or more bonded substrates. Furthermore, the indented features may be formed by depositing material on the wafer surface, as well as removing material from the wafer surface. Accordingly, the exemplary implementations set forth above, are intended to be illustrative, not limiting.
