Baird et al., An Artwork Verification System, Jan. 1975, Proceedings of the 12th design automation conference, pp. 414-420.* |
Yoshida et al., A Layout Checking System For Large Scale Integrated Circuits, Jun. 1988, Papers on Twenty-five years of electronic design automation, p. 163-171.* |
H. S. Baird, Fast algorithm for LSI artwork analysis, Jun. 1988, Papers on Twenty-five years of electronic design automation, p. 154-162.* |
Surendra Nahar, Sartaj Sahni, A time and space efficient net extractor, Jul. 1986, Proceedings of the 23rd ACM/IEEE conference on Design automation, p. 411-417.* |
Laurin Williams, Automatic VLSI layout verification, Jun. 29-Jul. 1, 1981, Proceedings of the eighteenth design automation conference on Design automation, p. 726-732.* |
Foley, van Dam, Feiner, Hughes, Computer Graphics: Principles and Pratice: Second Edition in C, Addison-Wesley, Second Edition, pp. 660-663. |