Claims
- 1. An optoelectronic device with Group III Nitride active layer, said device comprising:
a silicon carbide substrate; an optoelectronic diode with a Group III nitride active layer; an aluminum gallium nitride buffer layer between said silicon carbide substrate and said optoelectronic diode; and a plurality of discrete crystal portions selected from the group consisting of gallium nitride and indium gallium nitride on the surface of said silicon carbide substrate for minimizing or eliminating the heterobarrier between said silicon carbide substrate and said aluminum gallium nitride buffer structure.
- 2. An optoelectronic device according to claim 1 wherein said discrete crystal portions are present in an amount sufficient to minimize or eliminate the heterobarrier, but less than the amount that would detrimentally affect or destroy the function of any resulting diode device built on said silicon carbide substrate.
- 3. An optoelectronic device according to claim 2 wherein said discrete crystal portions are present in an amount of between about 40 and 60 per square micron.
- 4. An optoelectronic device according to claim 2 wherein said discrete crystal portions are between about 0.01 and 0.1 microns in diameter.
- 5. An optoelectronic device according to claim 1 wherein the sizes of said discrete crystal portions are large enough to minimize or eliminate the heterobarrier, but smaller than a size that would detrimentally affect or destroy the function of any resulting diode device built on said silicon carbide substrate.
- 6. An optoelectronic device according to claim 1 wherein the amount and size of said discrete crystal portions are sufficient to withstand normally expected levels of electrostatic discharge.
- 7. An optoelectronic device according to claim 1 comprising a light emitting diode.
- 8. A pixel that incorporates a light emitting diode according to claim 7.
- 9. A display that incorporates a plurality of pixels according to claim 8.
- 10. An optoelectronic device according to claim 1 comprising a laser diode.
- 11. An optoelectronic device according to claim 1 wherein said aluminum gallium nitride buffer layer has an atomic fraction of aluminum of between about 10 and 15 percent.
- 12. A wafer precursor for Group III nitride devices, said wafer precursor comprising:
a silicon carbide substrate wafer; an aluminum gallium nitride buffer layer on said silicon carbide substrate; and a plurality of discrete crystal portions selected from the group consisting of gallium nitride and indium gallium nitride on the surface of said silicon carbide substrate for minimizing or eliminating the heterobarrier between said silicon carbide substrate and said aluminum gallium nitride buffer layer.
- 13. A wafer precursor according to claim 12 wherein said discrete crystal portions are present in an amount sufficient to minimize or eliminate the heterobarrier, but less than the amount that would detrimentally affect or destroy the function of any resulting diode device built on said silicon carbide substrate.
- 14. A wafer precursor according to claim 13 wherein said discrete crystal portions are present in an amount of between about 40 and 60 per square micron.
- 15. A wafer precursor according to claim 12 wherein the sizes of said discrete crystal portions are large enough to minimize or eliminate the heterobarrier, but smaller than a size that would detrimentally affect or destroy the function of any resulting diode device built on said silicon carbide substrate.
- 16. A wafer precursor according to claim 15 wherein said discrete crystal portions are between about 0.01 and 0.1 microns in diameter.
- 17. A wafer precursor according to claim 12 wherein said discrete crystal portions are present in a size and amount sufficient for a resulting diode device to withstand normally expected levels of electrostatic discharge.
- 18. A wafer precursor according to claim 12 wherein said aluminum gallium layer has an atomic fraction of aluminum of between about 10 and 15 percent.
- 19. An optoelectronic device with a Group III Nitride active layer, said device comprising:
a conductive silicon carbide substrate; an ohmic contact to said substrate; an optoelectronic diode with a Group III nitride active layer; a buffer structure selected from the group consisting of gallium nitride and indium gallium nitride between said silicon carbide substrate and said optoelectronic diode; and a stress-absorbing structure comprising a predetermined pattern of small mesa structures on said substrate formed of a material upon which the growth of the selected buffer material is disfavored, and a pattern of predetermined stress-relieving areas propagated from said substrate into the crystal structure of said buffer structure, so that stress-induced cracking that occurs in said buffer structure occurs at said predetermined areas rather than elsewhere in said buffer structure.
- 20. An optoelectronic device according to claim 19 wherein said buffer structure is conductive.
- 21. An optoelectronic device according to claim 19 comprising a light emitting diode.
- 22. A pixel that incorporates a light emitting diode according to claim 21.
- 23. A display that incorporates a plurality of pixels according to claim 22.
- 24. An optoelectronic device according to claim 19 comprising a laser diode.
- 25. An optoelectronic device according to claim 19 wherein said diode is selected from the group consisting of p-n homojunctions, p-n single and double heterojunctions, and p-n quantum junction well structures.
- 26. An optoelectronic device according to claim 19 wherein said silicon carbide substrate has a polytype selected from the group consisting of the 3C, 4H, 6H, and 15R polytypes.
- 27. An optoelectronic device according to claim 19 wherein said Group III nitride active layer comprises gallium nitride.
- 28. An optoelectronic device according to claim 19 wherein said Group III nitride comprises indium gallium nitride.
- 29. An optoelectronic device according to claim 19 wherein said small mesa structures are selected from the group consisting of silicon dioxide (SiO2), silicon nitride, and aluminum oxide.
- 30. A wafer precursor for Group III nitride devices, said precursor wafer comprising:
a silicon carbide substrate wafer; a buffer layer on said substrate and selected from the group consisting of gallium nitride and indium gallium nitride; and a stress-absorbing structure comprising a predetermined pattern of small mesa structures on said substrate formed of a material upon which the growth of the selected buffer material is disfavored, and a pattern of predetermined stress-relieving areas propagated from said substrate into the crystal structure of said buffer structure, so that stress-induced cracking that occurs in said buffer structure occurs at said predetermined areas rather than elsewhere in said buffer structure.
- 31. A wafer precursor according to claim 30 wherein said small mesa structures are selected from the group consisting of silicon dioxide (SiO2), silicon nitride, and aluminum oxide.
- 32. A wafer precursor according to claim 30 wherein said silicon carbide substrate has a polytype selected from the group consisting of the 3C, 4H, 6H, and 15R polytypes.
CROSS-REFERENCE TO RELATED APPLICATION
[0001] This application is a continuation of copending U.S. application Ser. No. 08/944,547, filed Oct. 7, 1997.
Continuations (2)
|
Number |
Date |
Country |
Parent |
09718654 |
Nov 2000 |
US |
Child |
09966789 |
Sep 2001 |
US |
Parent |
08944547 |
Oct 1997 |
US |
Child |
09718654 |
Nov 2000 |
US |