The invention relates to a handle wafer and, more particularly, to a handle wafer which prevents edge cracking of the wafer and method of using the handle wafer for grinding processes.
Semiconductor wafer manufacturing utilizes very sophisticated wafer processing procedures and complicated manufacturing systems. In efforts to reduce the size of the semiconductor package, manufacturers have reduced component sizes including the thickness of the wafer, itself. For example, wafer thinning can be performed by a grinding method to achieve a wafer thickness on the order of 100 microns and less. These thin wafers, though, are very fragile and brittle. Of particular concern is chipping at the edges of the thinned wafers during processing (e.g., grinding).
More specifically, backside wafer thinning is required for integrated circuits for a number of reasons: smaller form factor for mobile devices, 3D stacking, and ground through silicon vias (TSVs) for power amplifiers. However, edge chipping is commonly observed during backside thinning, because the thinned wafer is especially thin at the edges due to a curvature of the bevel region.
For example, in order to perform wafer thinning, the wafer is bonded to a planar substrate. These substrates are typically planar glass or silicon substrates; whereas, the wafers have a curvature at the edges. The edges of the wafers are thus not supported during the grinding process. Once bonded to the substrate, the wafer undergoes a grinding process using conventional processes. However, the edges of wafer can crack during the grinding process due to a number of factors, including but not limited to: (i) forces applied at the edge of the wafer and (ii) the edges of the wafer being unsupported during the thinning process. That is, as the curved edges have no mechanical support, they have a tendency to crack or chip during the grinding process. A number of processes have been proposed to minimize edge chipping, including “adhesive fillet” and edge trimming; however, these processes require extra processing, which increases cost.
In an aspect of the invention, a handle wafer comprises a body portion with a bottom surface. A square edge portion is provided about a circumference of the bottom surface.
In an aspect of the invention, a handle wafer comprises a body portion and a lip portion about a circumference of the body portion. A recessed portion is within confines of the lip portion.
In an aspect of the invention, a method of grinding an underside of a wafer comprises: placing adhesive on at least one of an underside of a handle wafer and the wafer; aligning the wafer within a recessed portion of the handle wafer or a square edge of the handle wafer; applying pressure to the handle wafer and the wafer such that the adhesive extends to a curved edge of the wafer at the square edge or a lip of the recessed portion of the handle wafer; and performing grinding processes to the wafer.
The present invention is described in the detailed description which follows, in reference to the noted plurality of drawings by way of non-limiting examples of exemplary embodiments of the present invention.
The invention relates to a handle wafer and, more particularly, to a handle wafer which prevents edge cracking during a thinning process and method of using the handle wafer for grinding processes. More specifically, the present invention is directed to a handle wafer structured to reduce active wafer edge chipping through a pocket structure such as a handle wafer recess, a tapered recess, or a square edge as examples. In embodiments, these structures will provide additional or increased support to the edge of the wafer during backside processing, thereby minimizing edge chipping. Although there is extra cost associated with processing of the handle wafer, there is no additional cost with processing the device wafers which leads to reduced manufacturing cost and cycle time.
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In the embodiments shown in
As shown in an alternative embodiment of
As previously described, the lip portion 14″″ can be provided about the entirety of the circumference or a portions thereof, and formed in the processes as already described herein with regard to
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A method is also provided for using the handle wafer in a grinding process. In this method, adhesive is placed on an underside of the handle wafer and/or the wafer. The wafer is then placed within the recessed portion of the handle wafer or aligned with the square edge of the handle wafer. Pressure is applied to the handle wafer and/or the wafer such that the adhesive extends to a curved edge of the wafer at the square edge or a lip of the recessed portion of the handle wafer. Grinding can then be performed to the surface of the wafer.
The method(s) as described above is used in the fabrication of integrated circuit chips. The resulting integrated circuit chips can be distributed by the fabricator in raw wafer form (that is, as a single wafer that has multiple unpackaged chips), as a bare die, or in a packaged form. In the latter case the chip is mounted in a single chip package (such as a plastic carrier, with leads that are affixed to a motherboard or other higher level carrier) or in a multichip package (such as a ceramic carrier that has either or both surface interconnections or buried interconnections). In any case the chip is then integrated with other chips, discrete circuit elements, and/or other signal processing devices as part of either (a) an intermediate product, such as a motherboard, or (b) an end product. The end product can be any product that includes integrated circuit chips, ranging from toys and other low-end applications to advanced computer products having a display, a keyboard or other input device, and a central processor.
The descriptions of the various embodiments of the present invention have been presented for purposes of illustration, but are not intended to be exhaustive or limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein was chosen to best explain the principles of the embodiments, the practical application or technical improvement over technologies found in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.
Number | Name | Date | Kind |
---|---|---|---|
5703493 | Weeks et al. | Dec 1997 | A |
6729875 | Goodman | May 2004 | B2 |
7070660 | Keeton et al. | Jul 2006 | B2 |
7601224 | Foree | Oct 2009 | B2 |
7670434 | Shimizu et al. | Mar 2010 | B2 |
20020134503 | Hussinger et al. | Sep 2002 | A1 |
20040242003 | Murayama | Dec 2004 | A1 |
20100194014 | Huang et al. | Aug 2010 | A1 |
20110140244 | Schwarzenbach | Jun 2011 | A1 |
20110215071 | Mitrovic | Sep 2011 | A1 |
Number | Date | Country |
---|---|---|
339279 | Nov 1989 | EP |
200426610 | Jan 2004 | JP |
2004266104 | Sep 2004 | JP |
2007280974 | Oct 2007 | JP |
2010239020 | Oct 2010 | JP |
2012064735 | Mar 2012 | JP |
2012069635 | Apr 2012 | JP |
2013131614 | Jul 2013 | JP |
201327714 | Jul 2013 | TW |
2013094491 | Jun 2013 | WO |
WO 2013094491 | Jun 2013 | WO |
Entry |
---|
Amazon.com “Round Glass Tabletop Ashtray”, Jun. 12, 2010, https://web.archive.org/web/20100612151800/http://www.amazon.com/KegWorks-Round-Glass-Tabletop-Ashtray/dp/B002THN6P8. |
Bai, D. et al., “Edge Protection of Temporarily Bonded Wafers during Backgrinding”, ECS Transactions, vol. 18, No. 1, 2009, pp. 757-762. |
Matthias, T. et al., “Processing of Thin Wafers Using Temporary Bonding and Debonding”, EV Group Inc., Unknown Date, 1 page. |
Huemoeller, R., “Thin Wafer Handling Challenges”, SemiCON West—Amkor Technology, Inc, Jul. 14, 2010, 19 pages. |
Unknown Author, “Semiconductor Wafer and Die Backside External Visual Inspection”, JEDEC Solid State Technology Association, Mar. 2011, 18 pages. |
Number | Date | Country | |
---|---|---|---|
20150132527 A1 | May 2015 | US |